Bayes estimation of hazard and acceleration in accelerated testing

Bayes estimation of hazard and acceleration in accelerated testing

World Abstracts on Microelectronics and Reliability Estimators for type-lI censored (log) normal samples. JAMES A. LECHNER. IEEE Trans. Reliab. 40, 54...

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World Abstracts on Microelectronics and Reliability Estimators for type-lI censored (log) normal samples. JAMES A. LECHNER. IEEE Trans. Reliab. 40, 547 (1991). Three common estimators for the parameters of the lognormal distribution are evaluated for censored samples. Correction factors which eliminate essentially all the bias, and formulas for the standard deviations of the estimators, are presented. The Persson-Rootzen estimators are about as good as the maximum likelihood estimators, without the penalty of requiring iterative (computer) optimization. Also, the estimators resulting from (lease squares) fitting a line to the plot of log lifetimes on normal (Gaussian) probability paper are reasonably good. Formulas are given for obtaining these latter estimators without actually plotting the points. We simulated 5 k to 30 k samples (more samples for smaller N) for each case, and calculated: the means, standard deviations, and third moments of each estimator; correlations between the two members of each pair; comparisons between the estimators, and simple corrections to improve the performance of the estimators. Our conclusions are: • one does not need a maximum likelihood program (which is necessary iterative for censored samples), because the Persson-Rootzen estimator is just as good and much easier to use • the rough-and-ready technique corresponding to fitting a straight line on probability paper, while neither the best nor the easiest method, is not as bad as one might anticipate (in that two basic assumptions justifying the optimality of the technique are violated) • all of these estimators need correction for bias when analyzing censored data. VLSI technology requirements for an ATM variable bit rate video codec. P. GUEBELSet al. Elect. Commun. 65, 140 (1992). The availability of ATM based BISDN video terminals in the 1997 time frame is mandatory to boost the initial market growth of the BISDN services. The key is the maximum integration of the future ubiquitous video terminal in order to reduce its volume and cost. The paper describes to what extent the ATM Variable Bit Rate Video coding and transmission system puts requirements on the VLSI technology, and, conversely, to what extent VLSI technology puts its constraints on the system integration. The challenge is the design and manufacturing of VLSI video codec chips which will integrate up to 3.5 million transistors processing pixels at 54 Mhz. These VLSIs will eventually mix analog (RAM, ADCs and DACs) and digital circuitry on the same silicon die. Estimation of network reliability using graph evolution models. T. ELPERIN, I. GERTSBACKH and M. LOMOr~OSOv. IEEE Trans. Reliab. 40, 572 (1991), Monte Carlo techniques for estimating various network reliability characteristics, including terminal connectivity, are developed by assuming that edges are subject to failures with arbitrary probabilities and nodes are absolutely reliable. The core of our approach is introducing network time-evolution processes and using certain graph-theoretic machinery resulting in a considerable increase in accuracy for Monte Carlo estimates, especially for highly reliable networks. Simulation strategies and numerical results are presented and discussed. Reliability assessment based on accelerated degradation: a case study. MICHELE BOULANGERCAREY and REED H. KOENXG. IEEE Trans. Reliab. 40, 499 (1991). This paper describes an analysis strategy (experimental and analytic) to extract reliability information from the measured degradation of devices submitted to elevated stress. The strategy is applied to the estimation of the reliability of an integrated logic family (ILF). The ILF is an element of the Supervisory Logic Circuit, a component of a new generation of submarine cables. The experiment consisted of monitoring several electrical parameters while aging the devices under

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elevated temperature. We model changes observed in one of these electrical parameters (propagation delay) and identify and quantify various sources of variability observed in the data. We use these models to predict (with 95£ confidence) that a randomly selected device operating at 40°C will see a change of no more than 2 ns in propagation delay in 25 years, the lifetime of a submarine cable. An analysis of the degradation rate leads to the conjecture that the observed change in propagation delay is due to the diffusion of impurities (Na) through the bulk of the oxide layer (SiO2). Bayes estimation of hazard and acceleration in accelerated testing. PRAMOD K. PATHAK, ASHOK K. SINGH and WILLIAM J. ZIMMER. IEEE Trans. Reliab. 40, 615 (1991). In accelerated life testing, the time transformation function O(t) is often unknown, even if that function is assumed to be linear. If O(t) is known, data in the accelerated condition can be adjusted to provide information about the failure time distribution in the use condition. If O(t) is unknown, the usual estimation procedures require data from the use condition as well as data from the acceleration condition. Since the purpose of accelerated life testing is to compensate for unusually long failure times in the use condition, the usual procedures suffer this contradiction. With our Bayes model, O(t)= Ot, as well as the hazard rate in the use condition, can be estimated using only data from the acceleration condition. These parameters can be estimated even where a non-informative prior for 0 is assumed. Technology constraints in the VLSI implementation of digital mobile radio terminals. D. RABAEYet al, Elect. Commun. 65, 119 (1992). In 1991, the pan-European GSM digital cellular radiotelephone system will be introduced, providing open fully digital communication channels for voice and data. From the user's viewpoint, mobile digital transmission means a range of new services. However, from the development viewpoint, it has required a number of major breakthroughs at the technology level. The paper highlights the most significant challenges faced by the design team, from the initial architecture concept to final VLSI samples. Appropriate architecture choices, supported by state-of-theart CMOS and bipolar processing technologies and advanced design methodologies, led to a maximum integration solution. Optimal designs of (k, n - - k + l)-out-of-n :F systems (subject to 2 failure modes). HOANGPHAM and MICHELLEPHAM. IEEE Trans. Reliab. 40, 559 (1991). We treat the problem of achieving optimal system size (n) for [k,n - k + 1]-out-of-n systems, assuming that failure may take either of two forms. We assume that components are i.i.d, and that the two kinds of system failures can have different costs. We determine the optimal k or n that maximize mean system-profit. We study the effect of system parameters on the optimal k or n, and show that there does not exist a pair (k,n) maximizing the mean system-profit. Integrated circuits for the $560 undersea transmission system. M. CAMPESE et al. Elect. Commun. 65, 188 (1992). Optical fiber submarine transoceanic links are fitted with submerged repeaters. These devices must be highly reliable to avoid costly repairs. The increasing trattic requirements result in higher channel throughputs, making it necessary to use highspeed technologies for the active circuits. Integration makes it possible to achieve the required speed and reliability. The $560 repeater is built around six main ICs: preamplifier, automatic gain control, decision and regeneration, clock recovery, laser control and low frequency supervision. Made using ALCATEL-CIT's propriety technology DIFOX IA/B, these chips undergo a drastic screening procedure before installation. After an introduction to the system, the authors describe the ECL technology and discuss each IC in detail.