Microprocessor-based simulator of a variable time delay Dejan Staji6 describes the use of the microcomputer in analogue computer simulation of dynamic systems with time delays The simulator is built around a Motorola MC6800 microprocessor 2 with the following additional parts:
This article outlines a method for the simulation of a pure time delay element in analogue simulation o f dynamic systems using a microcomputer. The hardware of the simulator and the flowchart of its operation are illustrated and described. The main characteristics o f the realized simulator, the I/0 voltage range, the manually variable time delay, the sampling period and the time o f operation are provided with suggested modifications for improved performance. microprocessors -- analogue
The 8-bit A/D converter is an ADS70; it uses the successive approximation method of conversion with conversion time of 25 #s. It includes an inbuilt reference voltage, oscillator and 3-state buffer. The A/D converter requires B&C 2/~s long strobe signal to begin a conversion. This signal is provided by the program via the adaptor PIA which in the set/ reset mode of operation generates the strobe pulse for A/D conversion on its CA2 control line. After having received it, the A/D converter inputs data to the adaptor PIA's output register A. The 8-bit D/A converter is an MC1408. It does not need any strobe signal, so it performs D/A conversion immediately after storing data in the PIA's output register B. The one-shot multivibrator (74121) receives an input pulse generated by the program on the PIA's CB2 control line. This pulse is delayed, depending on the value of the RC constant (R is variable), for ~-seconds on the output of one-shot multivibrator and comes back to the PIA on its CB1 control line. This signal causes the interrupt request (IRQ). The simulator hardware is illustrated in Figure 1 and the program flowchart of its operation is presented in Figure 2. The software of the simulator consists of two routines: the restart routine and the interrupt service routine. The restart
- simulation
The analogue computer simulation of dynamic systems has several well known advantages over digital computer simulation. However in the case of processes including large and possible variable transport lag (or time delay), the simulation of a pure time delay element becomes a problem. The well known ~ approximations oI the transfer function exp(-s~) (for example the Pad~ approximation) are unsatisfactory for analogue computer simulation because of stability and accuracy problems, except in the case of a small delay in comparison with a dominant time constant of the 'delay-free' part of the system. In analogue computing there is a problem of storing data. Since the hybrid computer provides all the facilities of analogue computing, this article describes a method for the simulation of a pure time delay element by using a microprocessor-based device. Its dimensions are comparable to analogue computer elements used for the simulation of 'delay-free' parts of a dynamic system. The microprocessor-based simulator possesses the interface components (A/D and D/A converters) for analogue signal processing at a standard analogue computer. So the simulator is ready for use in analogue computing simulation of dynamic systems with time delays. The user need not possess a knowledge of realtime programming (as in the case of a hybrid computer simulation). The time delay ~-can be continuously manually changed by a potentiometer. The sampling rate and the time delay of the simulator have been chosen so that the simulator can be applied for slow or iterative, but not repetitive operation, of an analogue computer. The sampling rate is high enough so that the device can be considered as a continuous element in analytical studies.
ul. Olge Alkalaj 9/101, 11050 Beograd, Yugoslavia
vol 6 no 2 march 1982
• clock oscillator MC6871A (1 MHz) • RAM storage MCM6810 ~512 byte) • EPROM storage $6834 (512 byte) • peripheral interface adaptor (PIA) MC6820.
I
Clock
(IMHz)
IMicroprocessor
E PR0 M storage
storage
Microprocessor system buses
Anologue_..J A/D in / converter
PIA
~
D/A L Anologue converter l out
Figure 1. Hardware configuration of the simulator
0141--9331/82/060073--03 $03.00 © 1982 Butterworth & Co (Publishers) Ltd
73
Restart routine
(
I
I I
x-o
I
1
EPROM
Interrupt service (IRQ) routine
( Stort )
,R° ) routine
I Loading of iteration I counter for number I of A/D and D/A
Initialization
conversion
Generation of pulse on CB2 for I-shot multi
LI
I×--SaveX,o I I Generation at pulse on CA2
Generation of pulse on CA2 for A/D conversion
I I
for period
of
sampling ;
] transfer J PIAo~RAM locationI
Inputdata
transfer PIAa ~RAM location
[
I
tSavex-x+, X Ao ~ X I X-- SaveXOA
I
Output data tra nsfe r RAMIoc -N ~PIAb (D/A conversion)
Save XAD~X Save XDA~O
1 X-- X+I
Xo.- x II I
Decrement at iteration counter i dumpto
No
) Figure 2. Operation program flowchart of the simulator
routine begins after operating the restart switch. After initialization of the P[A and the generation of the pulses for the timer and A/D converter the restart routine starts a timing loop for sampling period (T s) and performs storing of input data in the RAM storage. The number of A/D conversions depends on the value of the time delay, but it is limited to 90 conversions. The interrupt service routine starts after receiving an interrupt request signal. This routine is similar to the restart routine, however it does not generate a pulse for the timer but, after every A/D conversion it performs a D/A conversion of data that has been stored in the RAM storage T seconds ago (the difference is N locations where N = T/T s). The loading of a counter of iterations to 384 (A/D to D/A conversions) means the duration of the interrupt service routine is limited to the product of 384 and the sampling period. The realized simulator is relatively simple. It has the following main characteristics: • I/O voltage range: 0 to 10 V (or -5 V to +5 V) • manually variable time delay: T = 1 to 6 s • sampling period: T s = 73 ms • time of operation (i.e. observation): Top = T + 28 s • one analogue signal channel However a number of improved characteristics of the simulator could be achieved by the following modifications: •
74
Port A
Input data
[
RQ routine )
RAM Input data area Stack area Locations for saving ordinal number of current: A/D conversion (SAVXAD) D/A conversion (SAVXDA)
time of operation can be made longer by adding more
E009- E05A E060-E097 EOAO~EOAI
0000--01D F 01EO 0 1 F F 01EO-01Et 01 E2--01 E3
PIA
Timing loop
Timing loop for period of sampling
t x-x+,
Restart routine area Interrupt request routine area Software interrupt routine area
for A/D conversion
I
I
1
(Hexadecimal address)
Port B
data direction/output register (DDRA/PORA) control register (CRA)
data direction/output register (DDRBJPORB) control register (CRB)
8004 8005 8006 8007
ADC connected to PORA and CA2 line DAC connected to PORB Timer connected to CB2 and CBI line
Figure 3. Memory map for the simulator (see appendix) RAM storage with a small change in the program • for longer time delays (say several minutes) the programmable timer MC6840 could be used which requires two additional small routines. In the given program a corresponding increase in the sampling period should also be made • by adding an analogue multiplexer, one more adaptor PIA, two more D/A converters and more RAM storages, it is possible to make a 3-channel simulator (for simultaneous processing of three analogue signals). Demultiplexing can be easily performed by cyclic addressing the three output registers (of two PIAs) during D/A conversions • if it is required (for example in the simulation of an adaptive control system I ) it is possible to change automatically the time delay by changing the sampling rate via a voltage controlled oscillator. Such a simulator has been tested by using an evaluation kit (MEK6800 D2). It produces a linear relation between the time delay and a controlled voltage but, because of a maximum allowable sampling period, it has a limited range of variable time delay All described versions of the simulator are intended for laboratory purposes, since they have limited time of operation. However, with changes in hardware and software, it is possible to realize the simulator for continuous operation. This type of simulator could be used, for example, for a realization of continuous compensator of time delay for Smith's method I for automatic control of processes with long time delays. Microprocessor-based simulator, because of its flexibility, has several advantages over some other digital devices (for example shift registers) that could be used for the simulation of a pure time delay.
REFERENCES
1 Marshall, J E Control of time delay systems Peter Peregrinus Ltd, Stevenage, UK (1979) 2 M5800 Microprocessor programming manual Motorola, USA (1975)
microprocessors and microsystems
E058 26 DD E05A 3F
APPENDIX
BNEL1 SWI
Branch if not Go to SWl routine
LDABSFF
Initialize Ace. B to 255 iterations Store 1 in carry bit Set interrupt mask Point X to ordinal No. of A/D conversion
M6800 system for time delay simulation I R Q routine:
Restart routine E009 8 E 0 1 F F E00C OF E00D C6 59
LDS$01FF SEI LDAB$59
E00F CE0000 E012 FF 01EO E015 FF 01E2
LDX~00 STXSAVXAD STXSAVXDA
E018 4F E019 B78005
CLRA STAACRA
E01C E01F E022 E023 E026 E027
STAACRB STAADDRA COMA STAADDRB CLRA LDAA$35
B7 B7 43 B7 4F 86
8007 8004 8006 35
E029 B7 8007
STAACRB
E02C E02D E02E E02F E032 E034
NOP NOP CLRA STAAPORB LDAA$3D STAACRB
01 01 4F B7 8006 86 3D B7 8007
E037 86 3D LI L D A A $ 3 D E039 B7 8005 STAACRA E03C E03D E03F E042 E043 E046 E047 E049 E04A
4F CLRA 86 35 LDAA$35 B7 8005 STAACRA OE CLI CE 23A5 LDX~$23A5 09 TSDEX 26 FD BNETS OF SEI FE01E0 LDXSAVXAD
E04D 4F E04E B 6 8 0 0 4 E051 A 7 0 0
CLRA LD AAPORA STAAMEMLOC,X
E053 08 E054 FF01E0
INX STXSAVXAD
E057 5A
DECB
vol 6 no 2 march 1982,
Define top of stack area Set interrupt mask Initialize counter to max. 90 A/D conversions
E060 C6 FF
E062 59 ROLB E063 OF SEI E064 F E 0 1 E O L 2 L D X S A V X A D
Zeros to save locations for ordinal numbers o f current A/D and D/A conversions Clear Acc. A PIA's data direction registers are addressed
E067 01 E068 B 6 8 0 0 4
NOP LDAAPO RA
E06B A 7 0 0 E06D 08 E06E FF01E0
STAAMEMLOC,X INX STXSAVXAD
PIA's A port is input Ones to Ace. A PIA's B port is output
E071
LDXSAVXDA
On CB2 line pulse for timer starts PIA's output register B is addressed
Clear PIA's output register B Pulse f o r timer is ended; IRQB1 isset on high to low transition on CB1 line On CA2 line pulse for ADC starts
Pulse f o r ADC is ended Sampling period is 73 ms Timing loop Set interrupt mask Point X to ordinal No. of D/A conversion
FE01E2
Point X to next location X to save location for A/D conversion Point X to ordinal No. o f D/A conversion
E074 A 6 0 0 E076 B 7 8 0 0 6 E079 E07A E07D E07E E080 E083 E084 E086 E089 E08C E08D E08F E090 E092 E094 E095 E097
L D A A M EMLOC,X STAAPORB Get data stored before in RAM for D/A conversion 08 INX Point X to next location FF01E2 STXSAVXDA X to save location for D/A conversion 01 NOP 86 3D LDAA$3D B7 8005 STAACRA On CA2 line pulse for ADC starts 01 NOP 86 35 LDAA$35 B7 8005 STAACRA Pulse for ADC is ended CE23A5 LDX#=$23A5 Sampling period is 73 ms 09 TSDEX -I iming loop 26 FD BNETS 5A DECB Done all conversions? 26 D2 BNEL2 Branch i f not 24 03 BCCEND Branch if carry clear 56 RORB Load Ace. B to 80 more iterations 20 CD BRAL2 Go to L2 3F ENDSWl Go to SWl routine
SWl routine: EOA0 01 EOA1 20 FD
Store input sample to location in RAM Point X to next location X to save location for A/D conversion Done all 90 A/D conversions?
Store input sample to location in RAM
L NOP BRAL
Infinite loop
I nterrupt vectors: EOF8 EOFA EOFC EOFE
E060 EOAO EOBO EOO9
I RQ interrupt vector Software interrupt vector NMI interrupt vector Restart interrupt vector
75