Microprocessor trends by Michael Smolin t
Microprocessor capabilities are continuing to expand at an amazing pace. Some of these capabilities along with other new features, and their justification, are discussed. Projections for the future are also considered.
1.
Introduction
1.1
Background
Recent advances in integrated circuit processing technology have already given us monolithic devices which can out perform any electronic device of only one decade earlier. The growth of the complexity (number of gates) of microprocessors, as seen in Fig. 1, can be seen to be doubling about every two years, which is the growth rate for semiconductor memory density as well.
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may no longer exist on an actual performance basis. New features not found in even the largest computers today will shortly be seen in microprocessors. This paper discusses some of the improvements now occurring in the microprocessor area.
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Fig. 1 Microprocessor complexity. This increased microprocessor complexity has been accompanied by a corresponding growth in the use of microprocessors, as shown in Fig. 2 for the various generations of series 80 microprocessors. Many microprocessor users are now quite sophisticated in what they demand and accept. This leads to new and better features and additional capabilities continually being built into microprocessors as the technology evolves and the market pressures increase. These improvements appear across the entire product range from low-end (high-volume, low-cost) through to the high-end (relatively expensive, low volume, feature laden) of the product line. Many features formerly found in minicomputers are now appearing in microprocessors, as indeed are those associated with main-frame computers. The very distinction between microcomputers and minicomputers, which was quite clear only a decade ago, tNational Semiconductor Corporation, Santa Clara, Calif., USA.
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Fig. 2 Series80 growth•
2. 16-bit evolution The development and usage of microprocessors seems to have been an evolutionary process. After having learned by usage with 4-bit and 8-bit devices, designers are now ready to tackle tasks of much greater complexity. It makes sense to go to 16 bits for more complicated instructions, larger memory space, and sheer throughput. This happens to correlate in time with the development of such high density technologies as XMOS and HMOS. These technologies allow the chip designers to incorporate sophisticated architectural features so that the resulting microprocessor is more than just a 16-bit version of the former 8-bit CPUs. Merely having a 16-bit microprocessor chip is not enough. The PACE has been around for a few years, and the 9900 is not exactly new, but acceptance has been slow. The combination of support tools, adequate performance, and sophisticated application designers is only now coming together in the marketplace. The 16-bit devices now coming out will support a true systems language. Having a high level language in which to write makes for time-efficient programming. The extra cost of a sophisticated CPU microprocessor chip is
MICROELECTRONICS JOURNALVol. 10 No. 3 © 1979 Mackintosh Publications Ltd., Luton.
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Microprocessor trends continued from page 5
more than offset by a few of the hours saved by HLL programming. Additionally, much scientific software written in, for example, FORTRAN, is now in the public domain and available for common use.
3.
CPUvscontroller
The microprocessor as a CPU is the glamorous leader of the chip pack. New features have been continuously suggested by the examination of minicomputer and main-frame computer designs. However, CPUs account for a minority of the microprocessor sales, even at the 16-bit level. Far more numerous are controllers. These include industrial, appliance and intelligent peripheral controllers. While the evolution of the CPU microprocessor is towards a supercomputer on a chip, the intelligent controller acquires more and more features specific to its application. Ultimately, we should expect to see systems evolve which have highly sophisticated central microprocessor CPUs surrounded by many intelligent microprocessor controllers. For markets with a large enough purchasing volume, even that might be integrated on to one chip, given the densities predicted for electron beam technology. A good part of the current success that the 8-bit microprocessors are enjoying is due to the availability of compatible 8-bit peripheral chips. Definition of a bus standard to which new devices can be designed would obviously ease the job of the application design engineer. As yet, there is not one industry wide bus standard. We hope that the standards committee examining this problem agrees to a standard before the new 16-bit peripheral parts are available in more than sample quantities. 8-bit peripheral chips will certainly be used with 16-bit CPUs, but in the long l:un, will be replaced in many applications by 16-bit versions with better performance. When the intelligent peripheral speaks the same software and hardware language as the central processor, the system interfaces become more straightforward.
4.
Memory
Three vital areas of memory utilisation evolution are of specific microprocessor concern: memory space, location, and speed. 4.1 M e m o r y space Formerly; any microprocessor with 16-bit address bus accessing 64K bytes of memory was considered to have a large address space. Today, we hear of chips with 20-bit (eg, 8086), 23-bit (eg, Z8000), and larger address busses, and see no reason that, with current multiplexing techniques, 32-bit address busses (>4 billion addresses) shouldn't be around the corner. Unfortunately, several of the implementation schemes for the recently designed microprocessors with extended address busses are limited by the page/segment structure of the address modes forced on the microprocessor by the nature of the address-manipulation registers.
4.2 Location With chip density increasing geometrically with time, more and more memory can appear on-chip. It has reached the point that we can now consider many of
these memory intensive CPUs not so much to be microprocessors with on-chip memory, as to be actual intelligent memories. This distributed intelligence-inmemory has several very interesting and intriguing applications in multiprocessing. Intelligent ROM (MPU with mostly ROM memory on-chip) lends itself nicely to distributed processing, such as with intelligent I/O processors, number crunchers, processor controlles, etc. Intelligent RAM (MPU with mostly RAM memory on-chip) seems ideal for another type of multi-processing scheme. In such a multiprocessing system, each processor working on a problem would down-load into its local memory from main memory a part of the problem on which it is to work, and then would free the bus most of the time while working from its own local memory. 4.3 Speed The speed bottleneck in current microprocessor systems is usually the memory cycle time. Increasing the bus width (eg, to 16 bits from 8 bits) and speeding up the memory cycle are a couple of obvious ways to increase the system bandwidth (in the range of an order of magnitude compared to the 8080). On-chip cache memory would help further since it would act, in the case of data accessing, as a high speed extension to the main memory. Also, having cache memory would allow the main memory to be written into simultaneously with the cache memory being read.
5. Instructions Instruction sets are becoming more efficient from the points of view of both the large system designer and the small user. It is now possible to design an instruction set which will efficientlyexecute compiled code for a class of high level languages. Programming microprocessors in some suitable high level language, such as PASCAL, FORTRAN, or BASIC, is available now, and it currently looks as though PASCAL usage will become wide spread. On one hand, with a suitably designed architecture, the memory overhead due to high level language programming becomes insignificant (it may actually take less memory to store a HLL source program and an interpreter than the corresponding object code), and the concomitant software development cost/time savings becomes extremely significant. On the other hand, the execution time overhead is very variable, depending on such factors as the efficiency of the compiler or interpreter, the compatibility of the machine code with the high level language being used, the efficiency of the programmer in using that language, etc. Also, the possibility of software portability, virtually absent in the microprocessor field till now, is of considerable interest to both manufacturers of system families and the ultimate user. The OEM of system families can sell 'stepping up' with hardware and software compatibility while effecting cost-reduction for their systems through LSI usage. And ultimately the user himself benefits by keeping his options open for alternate hardware systems. It is no longer necessary to obsolete his existing software (protection of software investment) nor to have to learn a new assembly language, when hardware systems are finally changed, Furthermore, operating system efficiencies can be realised with some
optimisation of the architecture in the areas of memory protection, multi-user implementation, etc.
6. Data types Data manipulating instructions now or very soon will exist for directly handling data in bit, nibble, byte, word (16-bit), double word (32-bit), string (bit, byte, and word), block, BCD, multiple precision, and floating point format. 7. Other features 7.1 Multiprocessing Various multiprocessing schemes have been implemented with microprocessor. The latest devices incorporate hardware features to facilitate diverse multiprocessing designs. Techniques are known and being used which allow almost limitless numbers of CPUs to be interconnected in hardware. The next major hurdle in the industry will be to develop appropriate software techniques for transparently parsing the software problem. The function of this parsing would be to efficiently utilise all of the CPUs in a system. Additionally, more dedicated CPUs (intelligent ROM) can now be incorporated into the system since, although their utilisation efficiency may be low, so too is their cost when compared to other elements of the system.
7.2 Production features When E-beam technology is actively applied to the production of LSI, the CPU part of a chip will shrink to about 10% of its present area. This in turn will free about 90% of the current chip area for new functions. That this is around the corner is evidenced by the fact that many of the IC houses already have E-beam facilities. Current production technology is already pushing the 2-3 micron line size. The first ideas microprocessor users usually have about on-chip features are to put the clock circuitry and the system memory on-chip. This has been done and is being done today wherever possible. Then they naturally want any other support chips incorporated on to the CPU chip. Further ideas are usually application
driven. Some possibilities are given in Table 1. While the features of Table 1 may be market driven and other features may be needed just to accomplish those in a reasonable way. They could include: - application of code compression, - larger packages (>40 pins), - operating systems in firmware, architectures capitalising on advanced LSI technology, - more addressing modes, - memory protection. -
Table 1 Possible future features Muchmoreon-chipmemory Memorymanagementon-chip Better interruptfacility User micro-programming OS residentin silicon Residentdiagnostics Residentassembler/compiler ProgrammableI/O features DedicatedI/O features Opticalports A/D & D/A featureson chip Analoguecomparators ~udio outputs Direct keyboardinterface Numbercrunchingcapability Programmable/readablecounters Additionalinstructions Highcurrentoutputs Incorporationof existingperipheralchip functions Inexpensivesemi-customising.
8. Conclusions The microprocessor revolution is in full swing. In the ease of the CPU, the most sophisticated computer functions of today will be available on a single chip in the foreseeable future. The need for connections will be resolved by pin multiplexing, larger packages, and different pin geometries. Controllers will be as intelligent as CPUs of today while acquiring more features, including programmability, intelligence and local memory.