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A new experimental method to evaluate creep fatigue life of flip-chip solder joints with underfill
Microelectronics Reliability 40 (2000) 1191±1198
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A new experimental method to evaluate creep fatigue life of ¯ip-chip solder joints with under®ll D.J. Xie * Electronic Packaging Group, Packaging Reliability Centre, Gintic Institute of Manufacturing Technology, 71 Nanyang Drive, Singapore 638075, Singapore Received 19 June 1999
Abstract A new accelerated stress test method was developed to evaluate creep life of ¯ip-chip solder joints with under®ll. With this method, a cyclic creep test can be done simply by applying a displacement to the FR-4 printed circuit board (PCB) board in the axial direction. The creep fatigue test was performed under displacement control with real-time electrical continuity monitoring. Test results show that the displacement arising from the force is equivalent to the thermal stress during thermal expansion. It was found that the magnitude of displacement was proportional to the inelastic strain sustained by the solder joints. This indicates that the creep fatigue life obtained will not only re¯ect the quality of the solder joints, but can also be used to characterize the reliability of the ¯ip-chip assembly. Finite element modeling was also performed to con®rm the agreement of deformation of the solder joints under mechanical and thermal loading. Results suggest that deformation and strain of the ¯ip-chip assembly are consistent or comparable between the mechanical and thermal cycling. The failure analysis indicates that fatigue cracks often initiate from the top edge of a corner solder joint in the creep fatigue test, which is similar to what would happen in thermal cycling test. Lastly, the eect of under®ll on the creep fatigue test is discussed. It is postulated that the test method is applicable to other ¯ip-chip assemblies, such as conductive adhesive interconnections. Ó 2000 Elsevier Science Ltd. All rights reserved.
1. Introduction Flip-chip technology was introduced as C4 soldering technology [1] and is getting more popular now in microelectronics packaging as it makes use of direct chip bonding. Direct chip bonding is able to achieve miniaturization, high interconnection density and high electrical performance. Being small in size, compared with conventional surface mount technology (SMT) components, these assemblies have been the subject of a large amount of development work, and are now widely implemented in the electronic industries, especially, telecommunication and consumable electronics products.
*
Tel.: +65-793-8509; fax: +65-792-2779. E-mail address: [email protected] (D.J. Xie).
Since the chip is attached directly onto the board, there is no compliant layer between the silicon chip and substrate, unlike other plastic ball grid array (PBGA) packages. The coecient of thermal expansion (CTE) mismatch between the silicon chip and FR-4 board is normally more than 10 ppm/°C, thereby causing a signi®cant thermal stress on the solder interconnections during temperature ¯uctuations. To decrease the thermal stress, the solder interconnections are normally encapsulated with under®ll materials so that the solder joints can sustain a longer life. In the development of this packaging process, one critical failure mechanism is creep fatigue failure. Creep fatigue is a common failure mechanism in solder joints or solder interconnections under service condition and during thermal cycling tests. Currently, the only available method to evaluate the creep fatigue properties of solder joints is the thermal cycling test. However, the thermal cycling test is very time consuming and not cost eective. It normally takes
0026-2714/00/$ - see front matter Ó 2000 Elsevier Science Ltd. All rights reserved. PII: S 0 0 2 6 - 2 7 1 4 ( 0 0 ) 0 0 0 4 6 - 9
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D.J. Xie / Microelectronics Reliability 40 (2000) 1191±1198
three months to a year to complete a thermal cycling test. The objective of this work is to develop a methodology to rapidly test and assess the creep failure life of ¯ip-chip interconnections and to investigate the creep failure mechanism. 2. Methodology 2.1. Specimen preparation A standard ¯ip-chip assembly process was used to prepare specimen ¯ip-chip parts. An FB-500 ¯ip chip, made by Flip-chip Technologies, was used in the test, which is peripheral array die with 96 I/O. The procedure is shown in Fig. 1. A water-soluble ¯ux was applied on the FR-4 board before mounting. An SRTâ pick and place machine was used to mount the ¯ip chip to the FR-4 board and then the whole assembly was re¯owed under IR with convection air oven. 2.2. Creep fatigue test After assembly, an electrical continuity check was performed to ensure that good solder joint connections had been formed. The board was then cut into pieces to include one component each, as shown in Fig. 2. In order not to damage the under®ll layer, the PCB board was not cut in the center as suggested by previous method [2,3]. Thus, the eects of under®ll on the solder interconnections are well represented as this type of specimen is exactly the same as the specimen used in thermal cycling test. During the creep fatigue test, the specimen was ®xed at one end and a mechanical force was applied on the other end. A square wave loading form was used in the mechanical cycling test as shown in
Fig. 1. Flip-chip assembly process.
Fig. 3, which is to simulate the eect of thermal cycling. To increase the contribution of creep in the mechanical cycling, tests were conducted in a thermal chamber. It was found that a temperature of 90°C is suitable to run the creep test. A strain gauge was attached to the specimen to monitor force and deformation information. Real-time electrical continuity was also monitored and recorded using a computer. Typical response waveforms of displacement and electrical resistance are shown in Fig. 3. Two failure criteria were used: 10% resistance increase and open circuit with in®nite resistance. It was found that for most specimens tested, both criteria are applicable. The dierence between them is normally within 10±20% [4]. As shown in Fig. 4, the resistance becomes in®nite shortly after an increase of 10% in the resistance has been reached. 2.3. Finite element modeling FEM simulation was carried out using a quarter model consisting of 8-node and 3D element shown in Fig. 5. The model in Fig. 5 is applicable to both thermal cycling and mechanical cycling tests. Elastic±plastic and creep analysis was done for both thermal and mechanical creep tests. The thermal cycle temperature range is ÿ40°C to 125°C. The materials properties are shown in Table 1. For the model in Fig. 5, during thermal or mechanical loading, the nodes at the center plane (x 0) are ®xed at the x-direction. 3. Results on ¯ip-chip interconnection 3.1. Finite element modeling To obtain a suitable loading condition in the creep fatigue test, FEM was performed. In thermal cycling as shown in Fig. 6, the maximum equivalent plastic strain was found to be concentrated at the top of the solder joints at the corner joint. The strain concentration is close to the die side, suggesting that cracks may initiate and propagate from this location. This was observed for both ¯ip chip with and without under®ll. Table 2 lists the maximum plastic strain and von Mises stress as obtained in the solder joints with and without under®ll. The table shows that the under®ll can greatly decrease plastic strain and stress and hence increase fatigue life. In the creep test, the temperature was kept constant at 90°C. Loading was applied through displacement control. Deformation of the PCB board and strain distribution in the corner solder joints is shown in Figs. 6 and 7, respectively. Both thermal cycling and creep test results are shown in the ®gures for comparison. It can be seen from the FEM results that displacement of the PCB and plastic strain distribution are quite similar for the thermal cycling and mechanical cycling creep tests. In
D.J. Xie / Microelectronics Reliability 40 (2000) 1191±1198
Fig. 2. Creep fatigue test setup.
Fig. 3. Typical waveforms obtained in the creep test. (F: force, d: displacement, R: resistance).
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D.J. Xie / Microelectronics Reliability 40 (2000) 1191±1198
Fig. 4. Failure de®nition: 10% resistance increase vs. open circuit.
Fig. 5. FEM model of ¯ip chip on board.
the mechanical cycling test, the magnitude of plastic strain is adjustable by changing the displacement. The relationship between the PCB displacement and maxi-
mum plastic strain in the solder joints is shown in Fig. 8. The maximum plastic strain increases linearly in the log± log plot with the displacement. This is also true for
D.J. Xie / Microelectronics Reliability 40 (2000) 1191±1198
1195
Table 1 Materials properties used in FEA Materials
YoungÕs modulus (GPa)
PoissonÕs ratio
CTE (ppm/°C)
Silicon die Copper pad FR-4 PCB (25°C)
162 132.9 19.3 19.3 12.0 8.5 31.68
0.27 0.25 0.145 0.145 0.02 0.3 0.35
2.08 17.3 18.1 13.3 81.3 30 24.5
Under®ll Sn63Pb37
thermal cycling. It is clearly shown that the curves for plastic strain under mechanical and thermal cycling are parallel to each other. Under the same PCB displacement, the maximum plastic strain obtained in the mechanical cycling is higher than that in thermal cycling. The PCB board may displace 0.06 mm at point A when heated to 125°C. The maximum plastic strain is about 0.25%, which corresponds to a mechanical cycling with displacement of 0.003 mm. Comparing displacements at points A and B, both mechanical cycling and thermal cycling are consistent. This suggests that the mechanical cycling test can replace the thermal cycling as an accelerated reliability test.
Yield strength (MPa)
Tested results in Gintic
38.5 (ÿ40°C)
3.2. Failure mechanism study SEM was employed to examine cracks in the failed ¯ip-chip assemblies after the thermal cycling and the creep test. As shown in Fig. 9, cracks are mainly found in the top corner close to the die in the solder joints after creep fatigue test. The cracks may propagate and extend to the whole cross-section, leading to the joint becoming open circuit (Fig. 9c). From Fig. 9, it is also found that the delamination occurred at the interface between solder and under®ll, while cracks in the solder joints are still very small. This suggests that the under®ll may lose its protection for the solder joints well earlier before
Fig. 6. Plastic strain distribution: creep fatigue test vs. thermal cycling.
Table 2 The maximum plastic strain and stress in ¯ip chip with and without under®ll Flip chip without under®ll Flip chip with under®ll
Plastic strain ÿ40°C
Von Mises stress ÿ40°C
Plastic strain 125°C
Von Mises stress 125°C
0.213 0.0027
256.3 96.0
0.262 0.0025
197.7 120.4
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D.J. Xie / Microelectronics Reliability 40 (2000) 1191±1198
Fig. 7. Comparison of displacement between (a) mechanical loading, x 0:12 mm and (b) thermal loading to 125°C.
cracks propagate. The delamination may also extend to the under®ll/PCB interface as shown in Fig. 10. For the failed ¯ip-chip solder joints in the thermal cycling test, cracks appeared in the same location as those in mechanical cycling as shown in Fig. 11. This illustrates that the failure mechanism of solder joints in the creep test is similar to that in thermal cycling. 3.3. Fatigue life test and prediction An attempt was made to correlate creep fatigue life with thermal cycling test. Both cycling tests were done concurrently on the same patch of ¯ip-chip specimen. Fatigue life obtained for creep fatigue cycling is shown in Table 3. As described earlier, a 10% resistance increase was employed as failure criteria. From Table 3, it is seen that creep fatigue life varies from 113 to 255 min
Fig. 8. Comparison of displacement and plastic strain between creep fatigue test and thermal cycling.
under a total displacement of 0.076 mm. The thermal cycling test results also listed in the table, shows that the thermal fatigue life varies from 911 to 1359 cycles with an average of 1080 cycles or 58 330.8 min. Hence, the accelerated factor (AF) is 313.9 for the creep fatigue test compared with the thermal cycling. This suggests that 1 min of creep fatigue cycling corresponds to approximately 313.9 min of thermal cycling. Certainly, the AF could be smaller if the total displacement in the creep fatigue test decreases. It should be noted that a bigger sample size is needed to obtain a more accurate estimation by using the creep fatigue test.
4. Conclusions A creep fatigue life test methodology was developed for ¯ip-chip interconnection. Reliability testing can be completed within one or two days using this method, while it could take several months for thermal cycling. The creep fatigue test can be carried out using the displacement control. The magnitude of displacement determines cycle life in the creep test. Testing temperature was set to about 90°C to ensure that the failure mechanism was creep fatigue of the solder interconnections. Compared with the conventional mechanical fatigue test, the unique approach of this method is to do the mechanical testing as follows: (1) The test is performed using actual specimens, so that results can be referred directly. (2) Creep is the dominant portion in the fatigue failure so the test simulates thermal creep experienced during thermal cycling.
D.J. Xie / Microelectronics Reliability 40 (2000) 1191±1198
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Fig. 9. Cracks appear in the failed ¯ip-chip solder joints after creep fatigue test.
(5) Failure mechanism for ¯ip-chip assemblies after the creep fatigue test was found to be solder failure, which is similar to that in thermal cycling. Crack initiation and propagation in the solder joints are quite similar to each other in both the creep fatigue test and thermal cycling test. (6) The creep fatigue test is a suitable candidate to replace thermal cycling, especially in parametric studies and prototyping. As creep failure is the dominant failure mode in adhesive bonded ¯ip-chip interconnections, the creep fatigue test may be applicable to those packages as well, which is worthy of further evaluation. Fig. 10. Delamination of under®ll in mechanical testing.
(3) Continuous monitoring of resistance and displacement is performed so that the failures of interconnections and solder joints can accurately and promptly be recorded. (4) PCB deformation and strain distribution in the solder joints using this creep fatigue test are comparable with those in thermal cycling test.
Acknowledgements This work was funded by Gintic Institute of Manufacturing Technology, Singapore. The author wishes to thank Stephen Wong and Dr. Kuo Min in Gintic, and Dr. Gautam Sarkar in Nanyang Technological University for the valuable discussions and technical support.
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D.J. Xie / Microelectronics Reliability 40 (2000) 1191±1198
Fig. 11. Cracks appear in the failed ¯ip-chip solder joints after thermal cycling test. Table 3 Creep fatigue life and thermal cycling life ¯ip-chip assembly Sample
Creep fatigue: T 90°C, total displacement 0:076 mm (min)
Thermal cycling: ÿ40°C to 125°C (cycles)
1 2 3 4 5
124 255 113 188 249
1018 1094 1359 1019 911
Average AF
185.8 313.9
1080
References [1] Davis EM, Hardy WE, Schwartz RS, Corning JJ. IBM J Res Develop 1964;8:102. [2] Xie DJ. Thermal fatigue life prediction of BGA solder joints using mechanical fatigue test. GlobalTronics Ô96, Suntec City, Singapore, 7±11 October, 1996: Technical Session 6, 1±6. [3] Chan YC, Xie DJ, Lai JKL. A direct method of measuring fatigue life of surface mount solder joints, IEEE Trans. on Components, Packaging and Manufacturing Technology/ Advanced Packaging 1996;19(4):148±52. [4] Xie DJ. Final Report of Creep Fatigue Life Test and Assessment for Chip Scale Package and Flip-chip Interconnections, Gintic, 1999.
www.elsevier.com/locate/microrel
A new experimental method to evaluate creep fatigue life of ¯ip-chip solder joints with under®ll D.J. Xie * Electronic Packaging Group, Packaging Reliability Centre, Gintic Institute of Manufacturing Technology, 71 Nanyang Drive, Singapore 638075, Singapore Received 19 June 1999
Abstract A new accelerated stress test method was developed to evaluate creep life of ¯ip-chip solder joints with under®ll. With this method, a cyclic creep test can be done simply by applying a displacement to the FR-4 printed circuit board (PCB) board in the axial direction. The creep fatigue test was performed under displacement control with real-time electrical continuity monitoring. Test results show that the displacement arising from the force is equivalent to the thermal stress during thermal expansion. It was found that the magnitude of displacement was proportional to the inelastic strain sustained by the solder joints. This indicates that the creep fatigue life obtained will not only re¯ect the quality of the solder joints, but can also be used to characterize the reliability of the ¯ip-chip assembly. Finite element modeling was also performed to con®rm the agreement of deformation of the solder joints under mechanical and thermal loading. Results suggest that deformation and strain of the ¯ip-chip assembly are consistent or comparable between the mechanical and thermal cycling. The failure analysis indicates that fatigue cracks often initiate from the top edge of a corner solder joint in the creep fatigue test, which is similar to what would happen in thermal cycling test. Lastly, the eect of under®ll on the creep fatigue test is discussed. It is postulated that the test method is applicable to other ¯ip-chip assemblies, such as conductive adhesive interconnections. Ó 2000 Elsevier Science Ltd. All rights reserved.
1. Introduction Flip-chip technology was introduced as C4 soldering technology [1] and is getting more popular now in microelectronics packaging as it makes use of direct chip bonding. Direct chip bonding is able to achieve miniaturization, high interconnection density and high electrical performance. Being small in size, compared with conventional surface mount technology (SMT) components, these assemblies have been the subject of a large amount of development work, and are now widely implemented in the electronic industries, especially, telecommunication and consumable electronics products.
*
Tel.: +65-793-8509; fax: +65-792-2779. E-mail address: [email protected] (D.J. Xie).
Since the chip is attached directly onto the board, there is no compliant layer between the silicon chip and substrate, unlike other plastic ball grid array (PBGA) packages. The coecient of thermal expansion (CTE) mismatch between the silicon chip and FR-4 board is normally more than 10 ppm/°C, thereby causing a signi®cant thermal stress on the solder interconnections during temperature ¯uctuations. To decrease the thermal stress, the solder interconnections are normally encapsulated with under®ll materials so that the solder joints can sustain a longer life. In the development of this packaging process, one critical failure mechanism is creep fatigue failure. Creep fatigue is a common failure mechanism in solder joints or solder interconnections under service condition and during thermal cycling tests. Currently, the only available method to evaluate the creep fatigue properties of solder joints is the thermal cycling test. However, the thermal cycling test is very time consuming and not cost eective. It normally takes
0026-2714/00/$ - see front matter Ó 2000 Elsevier Science Ltd. All rights reserved. PII: S 0 0 2 6 - 2 7 1 4 ( 0 0 ) 0 0 0 4 6 - 9
1192
D.J. Xie / Microelectronics Reliability 40 (2000) 1191±1198
three months to a year to complete a thermal cycling test. The objective of this work is to develop a methodology to rapidly test and assess the creep failure life of ¯ip-chip interconnections and to investigate the creep failure mechanism. 2. Methodology 2.1. Specimen preparation A standard ¯ip-chip assembly process was used to prepare specimen ¯ip-chip parts. An FB-500 ¯ip chip, made by Flip-chip Technologies, was used in the test, which is peripheral array die with 96 I/O. The procedure is shown in Fig. 1. A water-soluble ¯ux was applied on the FR-4 board before mounting. An SRTâ pick and place machine was used to mount the ¯ip chip to the FR-4 board and then the whole assembly was re¯owed under IR with convection air oven. 2.2. Creep fatigue test After assembly, an electrical continuity check was performed to ensure that good solder joint connections had been formed. The board was then cut into pieces to include one component each, as shown in Fig. 2. In order not to damage the under®ll layer, the PCB board was not cut in the center as suggested by previous method [2,3]. Thus, the eects of under®ll on the solder interconnections are well represented as this type of specimen is exactly the same as the specimen used in thermal cycling test. During the creep fatigue test, the specimen was ®xed at one end and a mechanical force was applied on the other end. A square wave loading form was used in the mechanical cycling test as shown in
Fig. 1. Flip-chip assembly process.
Fig. 3, which is to simulate the eect of thermal cycling. To increase the contribution of creep in the mechanical cycling, tests were conducted in a thermal chamber. It was found that a temperature of 90°C is suitable to run the creep test. A strain gauge was attached to the specimen to monitor force and deformation information. Real-time electrical continuity was also monitored and recorded using a computer. Typical response waveforms of displacement and electrical resistance are shown in Fig. 3. Two failure criteria were used: 10% resistance increase and open circuit with in®nite resistance. It was found that for most specimens tested, both criteria are applicable. The dierence between them is normally within 10±20% [4]. As shown in Fig. 4, the resistance becomes in®nite shortly after an increase of 10% in the resistance has been reached. 2.3. Finite element modeling FEM simulation was carried out using a quarter model consisting of 8-node and 3D element shown in Fig. 5. The model in Fig. 5 is applicable to both thermal cycling and mechanical cycling tests. Elastic±plastic and creep analysis was done for both thermal and mechanical creep tests. The thermal cycle temperature range is ÿ40°C to 125°C. The materials properties are shown in Table 1. For the model in Fig. 5, during thermal or mechanical loading, the nodes at the center plane (x 0) are ®xed at the x-direction. 3. Results on ¯ip-chip interconnection 3.1. Finite element modeling To obtain a suitable loading condition in the creep fatigue test, FEM was performed. In thermal cycling as shown in Fig. 6, the maximum equivalent plastic strain was found to be concentrated at the top of the solder joints at the corner joint. The strain concentration is close to the die side, suggesting that cracks may initiate and propagate from this location. This was observed for both ¯ip chip with and without under®ll. Table 2 lists the maximum plastic strain and von Mises stress as obtained in the solder joints with and without under®ll. The table shows that the under®ll can greatly decrease plastic strain and stress and hence increase fatigue life. In the creep test, the temperature was kept constant at 90°C. Loading was applied through displacement control. Deformation of the PCB board and strain distribution in the corner solder joints is shown in Figs. 6 and 7, respectively. Both thermal cycling and creep test results are shown in the ®gures for comparison. It can be seen from the FEM results that displacement of the PCB and plastic strain distribution are quite similar for the thermal cycling and mechanical cycling creep tests. In
D.J. Xie / Microelectronics Reliability 40 (2000) 1191±1198
Fig. 2. Creep fatigue test setup.
Fig. 3. Typical waveforms obtained in the creep test. (F: force, d: displacement, R: resistance).
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D.J. Xie / Microelectronics Reliability 40 (2000) 1191±1198
Fig. 4. Failure de®nition: 10% resistance increase vs. open circuit.
Fig. 5. FEM model of ¯ip chip on board.
the mechanical cycling test, the magnitude of plastic strain is adjustable by changing the displacement. The relationship between the PCB displacement and maxi-
mum plastic strain in the solder joints is shown in Fig. 8. The maximum plastic strain increases linearly in the log± log plot with the displacement. This is also true for
D.J. Xie / Microelectronics Reliability 40 (2000) 1191±1198
1195
Table 1 Materials properties used in FEA Materials
YoungÕs modulus (GPa)
PoissonÕs ratio
CTE (ppm/°C)
Silicon die Copper pad FR-4 PCB (25°C)
162 132.9 19.3 19.3 12.0 8.5 31.68
0.27 0.25 0.145 0.145 0.02 0.3 0.35
2.08 17.3 18.1 13.3 81.3 30 24.5
Under®ll Sn63Pb37
thermal cycling. It is clearly shown that the curves for plastic strain under mechanical and thermal cycling are parallel to each other. Under the same PCB displacement, the maximum plastic strain obtained in the mechanical cycling is higher than that in thermal cycling. The PCB board may displace 0.06 mm at point A when heated to 125°C. The maximum plastic strain is about 0.25%, which corresponds to a mechanical cycling with displacement of 0.003 mm. Comparing displacements at points A and B, both mechanical cycling and thermal cycling are consistent. This suggests that the mechanical cycling test can replace the thermal cycling as an accelerated reliability test.
Yield strength (MPa)
Tested results in Gintic
38.5 (ÿ40°C)
3.2. Failure mechanism study SEM was employed to examine cracks in the failed ¯ip-chip assemblies after the thermal cycling and the creep test. As shown in Fig. 9, cracks are mainly found in the top corner close to the die in the solder joints after creep fatigue test. The cracks may propagate and extend to the whole cross-section, leading to the joint becoming open circuit (Fig. 9c). From Fig. 9, it is also found that the delamination occurred at the interface between solder and under®ll, while cracks in the solder joints are still very small. This suggests that the under®ll may lose its protection for the solder joints well earlier before
Fig. 6. Plastic strain distribution: creep fatigue test vs. thermal cycling.
Table 2 The maximum plastic strain and stress in ¯ip chip with and without under®ll Flip chip without under®ll Flip chip with under®ll
Plastic strain ÿ40°C
Von Mises stress ÿ40°C
Plastic strain 125°C
Von Mises stress 125°C
0.213 0.0027
256.3 96.0
0.262 0.0025
197.7 120.4
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D.J. Xie / Microelectronics Reliability 40 (2000) 1191±1198
Fig. 7. Comparison of displacement between (a) mechanical loading, x 0:12 mm and (b) thermal loading to 125°C.
cracks propagate. The delamination may also extend to the under®ll/PCB interface as shown in Fig. 10. For the failed ¯ip-chip solder joints in the thermal cycling test, cracks appeared in the same location as those in mechanical cycling as shown in Fig. 11. This illustrates that the failure mechanism of solder joints in the creep test is similar to that in thermal cycling. 3.3. Fatigue life test and prediction An attempt was made to correlate creep fatigue life with thermal cycling test. Both cycling tests were done concurrently on the same patch of ¯ip-chip specimen. Fatigue life obtained for creep fatigue cycling is shown in Table 3. As described earlier, a 10% resistance increase was employed as failure criteria. From Table 3, it is seen that creep fatigue life varies from 113 to 255 min
Fig. 8. Comparison of displacement and plastic strain between creep fatigue test and thermal cycling.
under a total displacement of 0.076 mm. The thermal cycling test results also listed in the table, shows that the thermal fatigue life varies from 911 to 1359 cycles with an average of 1080 cycles or 58 330.8 min. Hence, the accelerated factor (AF) is 313.9 for the creep fatigue test compared with the thermal cycling. This suggests that 1 min of creep fatigue cycling corresponds to approximately 313.9 min of thermal cycling. Certainly, the AF could be smaller if the total displacement in the creep fatigue test decreases. It should be noted that a bigger sample size is needed to obtain a more accurate estimation by using the creep fatigue test.
4. Conclusions A creep fatigue life test methodology was developed for ¯ip-chip interconnection. Reliability testing can be completed within one or two days using this method, while it could take several months for thermal cycling. The creep fatigue test can be carried out using the displacement control. The magnitude of displacement determines cycle life in the creep test. Testing temperature was set to about 90°C to ensure that the failure mechanism was creep fatigue of the solder interconnections. Compared with the conventional mechanical fatigue test, the unique approach of this method is to do the mechanical testing as follows: (1) The test is performed using actual specimens, so that results can be referred directly. (2) Creep is the dominant portion in the fatigue failure so the test simulates thermal creep experienced during thermal cycling.
D.J. Xie / Microelectronics Reliability 40 (2000) 1191±1198
1197
Fig. 9. Cracks appear in the failed ¯ip-chip solder joints after creep fatigue test.
(5) Failure mechanism for ¯ip-chip assemblies after the creep fatigue test was found to be solder failure, which is similar to that in thermal cycling. Crack initiation and propagation in the solder joints are quite similar to each other in both the creep fatigue test and thermal cycling test. (6) The creep fatigue test is a suitable candidate to replace thermal cycling, especially in parametric studies and prototyping. As creep failure is the dominant failure mode in adhesive bonded ¯ip-chip interconnections, the creep fatigue test may be applicable to those packages as well, which is worthy of further evaluation. Fig. 10. Delamination of under®ll in mechanical testing.
(3) Continuous monitoring of resistance and displacement is performed so that the failures of interconnections and solder joints can accurately and promptly be recorded. (4) PCB deformation and strain distribution in the solder joints using this creep fatigue test are comparable with those in thermal cycling test.
Acknowledgements This work was funded by Gintic Institute of Manufacturing Technology, Singapore. The author wishes to thank Stephen Wong and Dr. Kuo Min in Gintic, and Dr. Gautam Sarkar in Nanyang Technological University for the valuable discussions and technical support.
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D.J. Xie / Microelectronics Reliability 40 (2000) 1191±1198
Fig. 11. Cracks appear in the failed ¯ip-chip solder joints after thermal cycling test. Table 3 Creep fatigue life and thermal cycling life ¯ip-chip assembly Sample
Creep fatigue: T 90°C, total displacement 0:076 mm (min)
Thermal cycling: ÿ40°C to 125°C (cycles)
1 2 3 4 5
124 255 113 188 249
1018 1094 1359 1019 911
Average AF
185.8 313.9
1080
References [1] Davis EM, Hardy WE, Schwartz RS, Corning JJ. IBM J Res Develop 1964;8:102. [2] Xie DJ. Thermal fatigue life prediction of BGA solder joints using mechanical fatigue test. GlobalTronics Ô96, Suntec City, Singapore, 7±11 October, 1996: Technical Session 6, 1±6. [3] Chan YC, Xie DJ, Lai JKL. A direct method of measuring fatigue life of surface mount solder joints, IEEE Trans. on Components, Packaging and Manufacturing Technology/ Advanced Packaging 1996;19(4):148±52. [4] Xie DJ. Final Report of Creep Fatigue Life Test and Assessment for Chip Scale Package and Flip-chip Interconnections, Gintic, 1999.