Microelectronics Journal, 23 (1992) 3 7 1 - 3 7 4
An AII-MOS
Adjustable Differential Amplifier with Improved Temperature Performance Z. Wang Institute of Electronics, Department of Electrical Engineering, Swiss Federal Institute of Technology, CH-8092 Zurich, Switzerland
An alI-MOS, adjustable differential amplifier circuit is presented, consisting of a linear MOS transconductor and a linear MOS resistor. The circuit structure is very simple and needs only a small fraction of the chip area that is required by the conventional approach. The temperature coefficient of the gain is of the order of a carbon fdm resistor. The amplifier can be used to implement a AGC circuit.
1.
Introduction
t usually requires three op amps, a potentiometer and three pairs o f matched resistors R1, R2 and R3 to implement a differential amplifier circuit with high input resistance and adjustable gain, as shown in Fig. 1. This circuit is often called an "instrumentation amplifier". The output voltage is found as
I
/1o=
1 + 2 ~ -R3"xR2 - } ~ - ( a - -V, V1) ~//Xl
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(1)
It is seen that the gain o f this circuit is an inverse function of the setting of the vernier potentiometer and as such is highly nonlinear. Thus, only over limited ranges can the potentiometer provide approximate linearity. To overcome this problem we can use the M O S floating resistor, described in ref. 1, o f 1 = 2K(Vc - VT)
(2)
where Vc is a dc voltage used to tune the resistor. Then eqn. (1) becomes Vo = [1 + 4KR3(Vc -- Vr) ] R2 ( V 2 - V1)
(3)
For the C M O S integration, this instrumentation amplifier requires a very large chip area for the three
© 1992, Elsevier Science Publishers Ltd.
371
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Z Wang/AII-MOS Adjustable Differential Amplifier
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resistor have quite different temperature behaviors, it is difficult to keep KR3 constant over a large temperature range.
Vo R3
2. New Adjustable Differential Amplifier
V2
2 Fig. 1. Instrumentation amplifier.
op amps and seven resistors, and the performances of the circuit rely on the matching properties of the resistors, which is limited to 1-20% for the passive resistors available with CMOS technology [2]. The temperature coefficients of the resistors available with CMOS technology are in the range 4001500 ppm °C-1, while the temperature variation of Vr is described by [2, 3]
For moderate gain, the circuit shown in Fig. 2 overcomes all these weaknesses of the circuit discussed up to this point. The circuit consists of a linear MOS transconductor [4] and a linear MOS resistor [5]. The input resistance of the circuit is very high due to the isolation of MOS transistor gate. Transistors M1, M2, M3 and M 6 are matched devices while the aspect ratio of M4~ to M4A and the aspect ratio of MsB to MSA is N. V B is the gain control voltage that is larger than the threshold voltage of the MOS transistors to keep them in the saturation. If all devices operated in the saturation, the output current of the transconductor is [4] (6)
Io = NK, VB(V2 -- V,) v-r(r) = V < r r ) -
(r-
'rr)
(4)
where T is absolute temperature, Tr is room absolute temperature and a is approximately 2"3 mV °C-1. For a temperature variation of 10°C around room temperature, Vr will have a variation of 23 mV, or a relative variation of about 0" 53% for Vr = 0"7 V and Vc= 5V. The temperature dependence of the mobility is expressed by [2, 3] /d(V) = ,l/(rr)
Zrr
(5)
where y is a constant between 1-5 and 2-0. For a temperature variation of 10°C around room temperature, according to eqn. (5) the relative variation of Vo is 4"7-5-2% for y = 1"5 and 6"3-7% for g = 2. Therefore the output voltage of eqn. (3) can be considered primarily to be determined by the dependence of mobility on the temperature. It is seen from eqn. (3) that the amplifier is only temperature-independent ifKR3 can be kept constant, which means that the resistance R3 must track with K. Since the mobility of an MOS transistor and a
372
where K1 =taCo,,(W/L)I is the transconductance parameter of ~ansistor M1, P is the mobility of the carriers, Cox is the gate capacitance per unit area, and W and L are the channel width and the channel length of the device, respectively. This current is applied to the linear MOS resistor formed by MtA and M6B, thus producing an output voltage [5] Vo = N K, VB (V2 -- V,) 2 K6 VDr
(7)
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linearMOS resistor
Fig. 2. New adjustable-gain CMOS differential amplifier.
Microelectronics Journal, VoL 23, No. 5
i iiiiii !i!ii ii!
~!i!!i!i~!ili!ii
iiii~ii~!i!!ii~ where VDr = Voo -- Vr. From eqn. (7) we obtain the vokage gain of the amplifier A
N (W/L),VB -- 2 (W/L)6 PoT
(
VDO -- VTo]
(9)
where A0 is the gain at T = To. For VOD = 5 V, VT0= 0"7 V, and a = 2.3 mV °C-1 the temperature coefficient of the gain is approximately 530 ppm °C-1, which is of the order of a carbon film resistor. Compared with the conventional solution discussed earlier, the temperature performance is improved by a factor of 100. The bandwidth B W of the amplifier can be approximately determined by BW
-
-
2K6VDr + gao 2riCo
(10)
where Co is the equivalent capacitor including all parasitic capacitances connected to the output node andgdo is the sum of output conductances ofM4B, Ms~ a n d M 6.
3. Gain control The gain control can, according to eqn. (8) be realized by varying the control voltage VB. This can be done either by analog or by digital means. Another possibility for gain control is to make the current gain N controllable. For integer N, this can be simply performed by replacing the wider transistors M4B and MsB by several transistors respectively indentical to M4^ and Msa in parallel and by switching them accordingly.
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(8)
which can be controlled linearly by the voltage VB. It is seen that the temperature effect on the mobility does not influence the voltage gain. To consider the temperature effect of the threshold voltage on the gain, we rewrite eqn. (8) in the following way by using eqn. (4): A ~ Ao 1
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frequency, MHz Fig. 3. Simulated frequency response of the proposed amplifier.
4. Simulation results The simulated frequency responses of the amplifier for VB = 0" 9, 1.1, 1.3 and 1.5 V are shown in Fig. 3. The used transistor sizes are: (W/L)1=9~9, (W/L)2 = 3/9, (W/L)6 = 3/120, (W/L)4^ = 12/14, (W/L)^^ = 12/36 and N = 4. The simulation was performed at Iss = 100 pA and + 5 V supply.
5. Conclusion An adjustable differential amplifier using exclusively MOS transistors has been presented. The amplifier consists of a linear transconductor and linear resistor, requiring only a small fraction of the chip area that is required by conventional approach owing to its very simple structure. The temperature coefficient of the gain has been found to be of the order of a carbon film resistor.
References [1] M. Banu and Y. Tsividis, Floating voltage-controUed resistors in CMOS technology, Electron. Lett., 18, (1982) 678-679.
373
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Z Wang/AII-MOS Adjustable Differential Amplifier
[2] P. E. Allen and D. R. Holberg, CMOS Analog Circuit Design (Holt, Rinehard and Winston, New York, 1987). [3] Y. Tsividis, Operation and Modeling of the MOS Transistor (McGraw-Hill, New York, 1987). [4] Z. Wang and W. Guggenbfihl, A voltage-controllable
374
MOS transconductor using bias offset technique, IEEEJ. Solid-State Circuits SC-25 (1990) 315-318. [5] Z. Wang, 2-MOSFET transresistor with extremely low distortion for output reaching supply vokage, Electron. Lett., 26 (1990) 951-952.