Built-in test capabilities could cure μP-based-system ills

Built-in test capabilities could cure μP-based-system ills

structure: the Intel 8086' IEEE Micro Vol 1 No 2 (May 1981) pp 57-69 The Intel 8086 microprocessor is designed to support the evolving requirements of...

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structure: the Intel 8086' IEEE Micro Vol 1 No 2 (May 1981) pp 57-69 The Intel 8086 microprocessor is designed to support the evolving requirements of structured software systems. It incorporates two architectural concepts that aid in the implementation of complex software: modular program support and high level language orientation. By this support, this microprocessor architecture aids the software. This article looks at the modular program support, language orientation, instruction encoding and format of the 16-bit microprocessor.

Jones, D 'Built-in test capabilities could cure /aP-based-system ills' EDN Vol 26 No 8 (15 April 1981) pp 105-109 Designing selftest capabilities into your microprocessor-based equipment can make field service easier, but the cost must be evaluated carefully. There are two service approaches one requires armies of field engineers equipped with schematics, timing diagrams, DVMs, oscilloscopes etc; the other requires equipping each system with extra hardware and software to service itself, diagnose its problem and clearly indicate test results. This paper shows how to minimize troubleshooting tasks by comparing the cost, effort and time advantages of selftest approaches against the alternatives.

Liedl, J and Tomann, S 'Reliability in microcomputer arrays' M icroprocessing and M icroprogramruing Vol 7 No 3 (March 1981) pp 185-190 Large arrays of complete microcomputers promise cost-effective means to treat extensive numerical problems. High reliability can be achieved very economically. The great number of microcomputers in an array gives the potential for degradation in case of failure, without a significant loss in performance. An example of such an array is the SMS 201 which has 128 identical single-board microcomputers combined in a modular fashion. The paper discusses the effects of modularity and parallelism on reliability and performance of degradable micro-

vol 5 no 7 september 1981

computers. The processing power in the case of failures is outlined and the characteristics of reliability are calculated based on a given model.

Santoni, A 'Semiconductor test systems' EDN Vol 26 No 8 (15 April 1981) pp 90-102 Higher speed semiconductor test systems with higher pin counts can test faster more complex devices more quickly than before, providing improved throughput and productivity. The report looks at the newest range of test systems. They are very much faster, cutting per-test cost even as test-system unit cost grows. The author gives an overview of the top end of test system market and gives guidance on how to pick a particular system, looking at factors such as price, timing accuracy, test time and test overheads.

Toong, H D and Gupta, A 'An architectural comparison of contemporary 16-bit microprocessors' IEEEMicro Vol 1 No 2 (May 1981) pp 26-37 'Today's products possessastonishing computational capabilities and support primary memories of up to 64 Mbyte.' The article comments on the 'incredible pace' of the microprocessor architecture evolution and says that now microprocessor-based systems offer direct support of multiuser/multitask environments and sophisticated operating system implementation. The comparison looks at the three major 16-bit microprocessors: the 8086, Z8000 and 68000. It compares their specifications (and those of Nat Semi's 16000), architectures - including register organization, system structure, memory, stack organization and software. The microcomputers which are based on the three are assessed. Finally, the article looks at the support chips that the three manufacturers, Intel, Zilog and Motorola, have made available. In an analysis of new against old (i.e. Motorola versus Intel), the authors end: 'Microprocessing is a dynamic world, and we can always expect newer and more powerful chips', thus avoiding a snapshot decision on which is the best.

Software Agrawal, D P and Agrawal, V K 'On-line bus fault diagnosis in microprocessor systems' J. Digital Systems Vol 4 No 4 (Winter 1980) pp 377-391 Whenever a fault is detected in a microprocessor system in most online diagnostic schemes, an involved system recovery routine is initiated. This occurs whether the fault is caused by failure inside or outside a chip. In this paper, two new techniques to system recovery are described for when an error is on any data transfer path. In this approach, system recovery from faults internal to chips is performed using sophisticated routines, but recovery from failures on data transfer faults (such as a databus or an address bus) is performed locally in a single retry.

Tabachnick, R L, Zsombor-Murray, P J, Vrooman, L J and Le-Ngoc, T 'Sequence controllers with standard hardware and custom firmware' IEEE Micro Vol 1 No 2 (May 1981) pp 2-25 A sequencing system that uses programming capability and bus-orieqted modular hardware replaces solid-state or relay-based control logic with custom firmware. Programmable sequence controllers were developed to reduce the cost involved in the normal sequence controllers. The article considers the steps required to develop a hardware sequencing system. Information chunking, finite-state machines and BN F (Backus normal form) language are looked at in some detail. It concludes by predicting the integration of controller modules into single LSI chips. If, says the article, the user is intimately involved in the actual design process, there might be an evolution of a widely accepted design standard for industrial sequence controllers.

Werner, L 'For many system programs, C soars where PASCAL falters' EDN Vol 26 No6 (18 March 1981) pp 147-148 Although C has not found the widespread use that PASCAL has, its features suit it well for systems-pro-

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