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CdS solar cells
Thin Solid Films 490 (2005) 146 – 153 www.elsevier.com/locate/tsf
Ordered polycrystalline thin films for high performance CdTe/CdS solar cells Javier Terrazasa, Aaron Rodrı´gueza, Cesar Lopeza, Arev Escobedoa, Franz J. Kuhlmanna, John McClureb, David Zubı´aa,* a
Department of Electrical and Computer Engineering, University of Texas at El Paso, El Paso, TX 79968, USA Department of Metallurgy and Materials Engineering, University of Texas at El Paso, El Paso, TX 79968, USA
b
Available online 31 May 2005
Abstract An ordered polycrystalline approach is proposed to overcome fundamental problems associated with random polycrystalline thin films, namely grain boundaries and inhomogeneity. The approach consists of two main steps: (1) the deposition of a patterned growth mask and (2) the selective-area deposition of the ordered polycrystals. The ordered polycrystalline approach was investigated using the CdTe/CdS material system. Experimental results demonstrate that SiO2 and Si3N4 are effective growth masks and that temperature is a dominant parameter for selective-area deposition. PL and XRD characterization indicates that the ordered polycrystalline technique has the potential for improving the crystal quality and order of polycrystalline CdTe thin films. The approach appears to be fairly general and could be applied to other material systems. D 2005 Elsevier B.V. All rights reserved. Keywords: CdTe/CdS; Cadmium telluride; Scanning electron microscopy; Epitaxy
1. Introduction CdTe is a good absorber layer for solar cells with a predicted efficiency of 29% due to its near optimal direct bandgap of 1.45 eV and large optical absorption (> 104 cm 1) above the bandgap [1,2]. This promise has generated much research interest in low-cost thin film polycrystalline CdTe/CdS photovoltaic modules. Although steady improvement in conversion efficiency was achieved in the late 1980s and early 1990s, Fig. 1 shows that the highest reported efficiency has remained essentially flat at 16 –16.5% for the last 11 years despite a high degree of research effort [3]. Due to the difficulty of performing scientific study on random polycrystalline semiconductors, much of the research has utilized an empirical approach with narrow applicability and this has hampered fundamental understanding. Studies have isolated and quantified
* Corresponding author. E-mail address: [email protected] (D. Zubı´a). 0040-6090/$ - see front matter D 2005 Elsevier B.V. All rights reserved. doi:10.1016/j.tsf.2005.04.047
major issues associated with processing and cell structure [4,5] however consensus is now building that the random nature of polycrystalline films is the fundamental reason preventing technological advancement and deep scientific understanding [2]. The randomness of polycrystalline films has hampered technological development and scientific study in at least two ways. First, the grain boundaries create interdependencies between processing steps and critical device parameters that make isolated study and development difficult [6]. Grain boundaries give rise to a host of issues including: (a) enhanced migration of dopants [5,6], (b) device shunting [7], and (c) high recombination velocities due to unpassivated surfaces. Because grain boundaries form an interconnected network within the thin film, they couple critical components of the device including the back contact, CdTe grains, and the CdS/CdTe junction. For example, isolated study and development of the back contact are nearly impossible due to the effect that back-end processing will have on the doping of CdTe and the CdTe/CdS interface [8]. Moreover, the enhanced migration of copper through
Conversion Efficiency
J. Terrazas et al. / Thin Solid Films 490 (2005) 146 – 153
18 16 14 12 10 8 6 4 2 0 1985
147
Patterning and selective-area deposition
(b)
(a)
1990
1995
Fig. 3. Basic concept of ordered polycrystalline arrays in comparison to random polycrystalline thin films; in (a) the crystal sizes and shapes of films obtained from conventional deposition processes are random, in (b) patterning and selective-area deposition is utilized to obtain crystals with ordered crystal grains and boundaries.
2000
Year Fig. 1. Highest reported CdS/CdTe solar cell conversion efficiencies from the year 1985 to 2004.
grain boundaries has also been associated with device instability [9]. The need therefore exists to decouple the various processing steps so that significant scientific understanding and technological development can be achieved. Second, it is well known that inhomogeneity in cell electrical characteristics results in increased losses [10]. Nonuniformity is highly detrimental for two reasons. One is that the optimum performance of each granular cell is not achieved. The second and more insidious reason is that poor performing cells become electrical loads to good cells. Doping and structure engineering in semiconductors are the principal methods to tailor device characteristics. This is also true in solar cells where the doping profile, bandgap and layer thicknesses have dominant effects on cell characteristics. However, controlling the doping profile and structure uniformly in polycrystalline thin films is difficult due to the random nature of the grains and grain boundaries which prevents the desired optimum CdS/CdTe structure and doping from being achieved. The best that can be achieved is an average profile and structure with some degree of statistical nonuniformity. Fig. 2 shows that although the average grain size of CdTe can be controlled by lowering the deposition temperature from 625 -C to 575 -C, close inspection reveals that the film remains random. The combination of grain boundary effects and the random nature of common processes create a situation that significantly complicates scientific study and technological development. As a result, a plethora of empirical research has yielded only a limited understanding of important
625 ºC
575 ºC
relationships between processing conditions, structure and device characteristics. For example, the CdCl2 treatment is known to be very important to dopant activation and grain growth and many recipes have been developed, however the fundamental mechanism is not well understood [1]. Work in the late 70s on single crystal CdTe/CdS solar cells resulted in significant progress. Cells prepared by epitaxial growth of CdS on p-type single crystal CdTe exhibited a conversion efficiency of 11.7% [11]. However, a significant challenge was the high density of defects due to the lattice (¨ 10%) and thermal mismatch between CdS and CdTe. Much of the effort has focused instead in polycrystalline processes due to their promise for creating an acceptable tradeoff between efficiency and low-cost manufacturing [12]. Although relatively little work has been done on single crystal CdS/CdTe for solar cell applications, a large amount of work has focused on integrating a wide variety of lattice-mismatched material systems for advanced device applications. For over three decades, high quality crystal growth has been studied to create complex semiconductor structures and to integrate heterogeneous materials for the purpose of increasing device performance and system functionality. As a result, epitaxy has evolved from homoepitaxy to lattice-mismatched heteroepitaxy and from planar growth to patterned epitaxy. Patterned selective-area growth of lattice-mismatched semiconductors has been effectively utilized in a number of material systems to reduce defects and enhance performance [13,14]. For example, Fitzgerald et al. showed a reduction in defects in patterned GaAs grown on Silicon [15] and Zubia et al. showed three-dimensional relief mechanisms at the nanos-
575 ºC
Fig. 2. Effect of deposition temperature on uniformity of CdTe deposited on CdS. Although the uniformity is improved when the temperature is lowered, the image on the far right shows that traditional techniques result in inherently random shaped and oriented crystal grains. The scale bar indicates 22.5 Am.
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Growth mask CdS Fig. 4. Schematic representation of patterned dielectric growth mask on CdS thin film.
cale [16]. Nanoheteroepitaxy was recently proposed as a technique to utilize strain relief mechanisms active at the nanoscale to significantly reduce the defect density in lattice mismatched materials [17]. In this paper we propose a patterned selective-area growth technique as a method to fabricate an ordered array of high quality crystals to overcome the problems inherent with random polycrystalline thin films. The basic concept is illustrated in Fig. 3. We present results from the selectivearea deposition of CdTe on patterned SiO2/CdS/ITO/glass, SiO2/CdS(0001), and Si3N4/CdS/ITO/glass substrates via close-spaced sublimation.
2. Benefits of ordered polycrystalline thin films The ordered polycrystalline approach consists of two fundamental steps: (1) the deposition of a patterned dielectric growth mask and (2) the selective-area deposition of the ordered polycrystals. Growth selectivity is achieved by the differential surface mobility between the dielectric and substrate materials. By way of example, the two steps are illustrated in Figs. 4 and 5 for the case of CdTe on polycrystalline CdS. Fig. 4 shows a patterned dielectric growth mask with an array of holes to expose the underlying CdS. Although a 2 2 array is shown in Fig. 4, the actual array will contain thousands of cells. Fig. 5 shows the selective-area deposition of CdTe on the patterned CdS/ dielectric substrate. Although the crystallographic orientation of the CdTe crystals will vary, techniques have been developed to control the lateral versus vertical growth rates and the three-dimensional geometry [18]. The ordered polycrystalline approach will lead to a configuration that has several enhancements over random polycrystals. One is that precisely placed and uniform crystals and grain boundaries will decouple the interactions between processing steps and different parts of the cells.
This will enable the independent optimization of various components of the cell and the ability to uniformly tailor the doping of the CdTe crystals to increase solar cell performance due to (a) a superior electrical junction, (b) a superior charge carrier concentration in the bulk of the crystals and (c) a superior tunneling back contact. Moreover the deconvolution of processing steps will allow isolated studies yielding greater insight into loss mechanisms. The choice of dielectric material is important since it will serve five purposes: (1) as a selective growth mask, (2) for isolation between back contact and CdS layer, (3) for surface passivation of CdTe to reduce surface recombination, (4) as a barrier to diffusion of impurities and, (5) as a barrier to the out-diffusion of dopants from the CdTe bulk. Various works in the literature have shown that SiO2 and Si3N4 can be used as growth masks to achieve selective-area deposition to realize the structure shown in Fig. 4 [19]. However, the growth mask material has to be of high quality to avoid nucleation. In order to avoid electrical shunting between the back contact and the CdS, the mask material must also be insulating. SiO2 and Si3N4 are insulating and meet this requirement. A typical method of passivating the CdTe grain boundaries is by oxidation of the surface through heat-treating in an oxygen-containing atmosphere. In the proposed structure, the dielectric material could provide the passivation. However this requires an intimate interface between the dielectric material and CdTe, which could prove to be a difficult technical challenge. The advantage of using SiO2 for passivation is that it could be more stable than the grown surface oxide. A highly intimate interface also allows the mask material to serve as a barrier to dopant migration from the back contact to the interface of the device. Finally, assuming a suitable segregation coefficient, the dielectric material could serve as a barrier to the out-diffusion of intentional dopants inside the CdTe grains. This phenomenon has been well documented for SiO2 on silicon [20]. A further benefit of the configuration is that the possibility exists of guiding the photons that enter the growth mask into the active regions. The overall effect is that the growth mask will not introduce any inactive area losses but will act to increase the efficiency by concentrating the light in the active regions [19]. The area covered by the mask material will be inactive area, however, if the index of refraction is engineered properly, the rays of light that enter the mask material can be bent into the CdTe thereby effectively concentrating the light, which is known to increase conversion efficiency [21].
CdTe crystal
CdTe crystal Growth mask CdS
Growth mask CdS
Fig. 5. Perspective (left) and cross-sectional (right) schematics of a 2 2 array of ordered CdTe crystals grown on CdS.
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149
Finally, since the exact location of cells will be known and can be probed, ‘‘bad’’ cells can be isolated to prevent them from loading ‘‘good’’ cells.
3. Experimental details Table 1 lists the processing conditions of 7 samples studied in this paper. Details of the processing conditions are presented in the following sections. Two additional samples were single crystal wafers of (8) CdS(0001) and (9) CdTe(111) obtained commercially from MTI Corporation and measuring 5 5 0.5 mm. One experiment consisted of determining growth and substrate conditions that promoted good selective growth of CdTe on CdS. A second experiment compared the nature and quality of the CdTe crystals on planar versus patterned substrates and on singlecrystal versus polycrystalline CdS. The results from these experiments are presented in Section 4. The fabrication procedure consists of three basic steps: (1) the deposition of CdS, (2) the patterned deposition of a growth mask, and (3) the selective deposition of CdTe. Prior to all deposition steps, the samples are immersed in acetone, methanol and deionized water in an ultrasonic cleaner for 5 min to clean them. The polycrystalline CdS (pc-CdS) thin films were grown on commercially obtained indium tin oxide (ITO) on 1 2-in. 7059 Corning glass substrates using the chemical bath deposition method in an aqueous solution of Cd(CH 3 COO) 2U2H 2O (cadmium acetate), CH3COONH4 (ammonium acetate), ammonium hydroxide (NH4OH) and CS(NH2)2 (thiourea) in molar concentrations of 0.1, 1, 15 and 0.1, respectively. The bath solution was placed on a hot plate with a magnetic stirrer to promote ionby-ion implantation and to control the temperature of the bath to 88 T 1 -C for a total time of 30 min. The thickness of the CdS films was 85 T 5 nm as measured by interferometry. The grain size was 50 nm nominally as measured with AFM. SEM, AFM, PL, XRD, interferometric spectroscopy were used to assess the growth nature and quality of the various thin films. PL was performed using a 633 nm Argon Laser and TRIAX 190 spectrometer attached to a DM302 photon counting module. Samples were scanned from 850 Table 1 This table contains a summary of the main variants for the growth mask and CdTe depositions Sample
Substrate type
Mask material
Tsource (-C)
Tsub (-C)
Stage-3 time (s)
Deposition selectivity
1 2 3 4 5 6 7
pc-CdS pc-CdS pc-CdS pc-CdS pc-CdS pc-CdS sc-CdS
None SiO2-RF SiO2-EB Si3N4-RF SiO2-EB SiO2-RF SiO2-EB
575 575 575 575 615 635 575
550 550 550 550 580 600 550
160 160 110 160 70 50 160
N/A Positive Positive Positive Zero Negative Positive
RF indicates RF sputtering and EB means electron beam evaporation.
Fig. 6. Plan view drawing showing how the copper grids were placed on the substrates.
to 870 nm to obtain CdTe emission lines. A Scintag XDS 2000 diffractometer using the Cu-Ka line was used to obtain the X-ray diffraction data. 3.1. Deposition of patterned growth mask Patterned deposition of the growth mask was achieved using a shadow mask process [18] in which copper grids normally used for transmission electron microscopy were used as deposition masks. Patterned layers of SiO2 and Si3N4 were deposited on polycrystalline CdS substrates using RF sputtering and electron beam evaporation. In contrast, the single crystal CdS received only the patterned electron beam deposition of SiO2. To produce the patterned mask, two copper grids of different size mesh were placed on the substrate prior to deposition. The copper grids contained a squared array of wires of size 200, 400 or 600 mesh. The 200 size mesh had wires with a width of 10 Am separated by 115 Am. Similarly, the 400 and 600 mesh had wire widths of 7 Am and 5 Am and separations of 55 Am and 37 Am, respectively. Fig. 6 shows the manner in which the copper grids were placed on the substrates. The single crystal substrates had only one copper grid of 600 mesh. The growth mask depositions were performed in a Kurt J. Lesker deposition reactor at room temperature. The chamber pressure during the deposition was 10 2 Torr for the RF sputtered films, and 10 6 Torr for the electron-beam depositions, nominally. The deposition rates varied from 4.7 to 6.7 nm/min for the RF sputtered films and 7.5 to 30 nm/min for the electron beam evaporated films. The electron beam evaporated SiO2 films on polycrystalline CdS received an ex situ heat treatment of 325 -C for 30 min in a nitrogen environment to improve adhesion. The anneal temperature for the SiO2 films deposited on the single crystal CdS was 425 -C. 3.2. Selective-area deposition of CdTe Close-spaced sublimation was used for the deposition of the CdTe. Prior to deposition the reactor was evacuated and purged with helium and oxygen at flow rates of 10 and 2.5 CFH, respectively. The pressure in the reactor at the start of deposition was 1.6 Torr. The temperature profile had three
150
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Deposition Warm up
700
Deposition
preparation
(a)
Temperature (Celsius)
600 500 400 300 200
Substrate
100
Source
SiO2 CdTe
0 0
200
400
600
800
Time (Seconds) Fig. 7. Typical time – temperature profiles for the CdTe depositions showing the warm up, deposition preparation and deposition stages. Notice that the substrate temperature is higher than the source temperature for all of the warm up and most of the deposition preparation stages to inhibit growth during these stages.
distinct stages as shown in Fig. 7. Stage one is a warm up and cleaning step. In this stage the temperature is ramped from room temperature to 375 -C and 425 -C for the source and substrate, respectively. Stage two is a deposition preparatory stage. In this stage the temperatures and pressures are ramped to the final values specified for the deposition. Stage three is the deposition stage. The main variants of the CdTe growths were the source and substrate temperatures and time of stage-3 and are summarized in Table 1. All other parameters were held nominally constant. It is useful to mention here that the patterned structure obtained using this procedure is inverted relative to the one illustrated in Fig. 5.
(b)
CdTe
(c)
Fig. 8. Comparison of selective growth of CdTe on CdS versus SiO2 at temperatures of (a) Tsource = 575 -C, Tsub = 550 -C, (b) Tsource = 615 -C, Tsub = 580 -C and (c) Tsource = 635 -C, Tsub = 600 -C. As the temperature is increased, the selectivity transitions from (a) positive to, (b) zero to (c) negative selectivity. The scale bars indicate (a) 50 Am, (b) 100 Am and (c) 250 Am. All images are plan view SEM images except for the inset of (a) which is an AFM image.
temperatures (samples 3, 4 and 7) exhibited positive selectivity although different growth mask materials were used. Fig. 9 shows that CdTe deposited on CdS but not on the patterned Si3N4. This study indicates that SiO2 and Si3N4 are effective growth masks and that temperature is a dominant parameter for selectivity.
4. Results and discussion 4.1. Selectivity studies The selectivity of CdTe deposition was studied as a function of temperature and different growth masks. Fig. 8 shows SEM images of samples 2, 5 and 6. Fig. 8(a) shows that for temperatures of Tsource = 575 -C and Tsub = 550 -C the selectivity was positive meaning that CdTe deposited on the CdS but not on the SiO2. Fig. 8(b) shows that for higher temperatures of Tsource = 615 -C, and Tsub = 580 -C, CdTe deposited both on the CdS and SiO2. For this case the selectivity was zero. Fig. 8(c) shows that for the highest temperatures of Tsource = 635 -C, and Tsub = 600 -C the selectivity was negative, i.e., the CdTe deposited on the SiO2 but not on the CdS. The temperature effect on selectivity observed in this study was consistent with that reported by Zhang and Bhat of CdTe growth on Si and GaAs via metalorganic vapor phase epitaxy using SiO2 and Si3N4 masks [22]. The three samples grown at the lower
CdTe
Si3N4
Fig. 9. Positive selective growth of CdTe on CdS versus patterned Si3N4.
J. Terrazas et al. / Thin Solid Films 490 (2005) 146 – 153
151
PL Intensity (a.u.)
occur preferentially on the SiO2 where the strain energy of the CdTe is less due to the amorphous structure of SiO2.
1.42
4.2. Study of planar versus patterned deposition on singleand polycrystalline substrates
(d) (c)
Photoluminescence (PL), X-ray diffraction (XRD) and atomic force microscopy (AFM) were used to assess the quality and orientation of the CdTe crystals on various samples. Room temperature PL spectra (see Fig. 10) were obtained from four different CdTe samples: (a) selectivearea growth of CdTe on single crystal CdS (sample 7), (b) selective-area growth of CdTe on polycrystalline CdS (sample 2), (c) planar growth of CdTe on polycrystalline CdS (sample 1), and (d) a commercially obtained single crystal CdTe (sample 9). The four samples show a peak at 1.450 eV corresponding to the bandgap of CdTe and several other emission peeks below the bandgap at 1.444 eV and 1.446 eV. Interestingly, samples 2 and 7, which were both patterned, had the lowest sub-bandgap emission intensities, even compared to the single crystal CdTe wafer. We speculate that this indicated that the patterning and selective-area growth helped to reduce the defect density in the CdTe. These results are consistent with other works that showed improved crystal quality when patterned growth was used compared to planar growth [24]. X-ray diffraction spectra were obtained from samples 1, 2 and 7 and are shown in Figs. 11 and 12. Fig. 11 contains X-ray patterns of (a) (sample 7) selective-area growth of CdTe on single crystal CdS, (b) (sample 2) selective-area growth of CdTe on polycrystalline CdS and (c) (sample 1) planar growth of CdTe on polycrystalline CdS. Although the three samples had nominally the same amount of CdTe (the three samples were grown on under identical conditions), the selectively grown CdTe on single crystal CdS showed the strongest intensities, followed by selectively grown CdTe on polycrystalline CdS. The trend was consistent with AFM characterization of the grain size of the CdTe crystals,
(b) (a) 1.43
1.44
1.45
1.46
Energy (eV) Fig. 10. Comparison between the PL of four different CdTe samples; (a) selective-area growth of CdTe on single crystal CdS, (b) selective-area growth of CdTe on polycrystalline CdS, (c) planar growth of CdTe on polycrystalline CdS, and (d) a commercially obtained single crystal CdTe. Trace (a) has the least intensity in the sub-bandgap (< 1.45 eV) region indicating a lower defect density compared to the other samples.
A qualitative model to explain the strong influence of temperature on selectivity is presented. At the lower temperature the selectivity is dominated by the differential surface mobility of adatoms. At the lower temperature, the surface mobility is much larger on the SiO2 compared to the CdS, and also much larger compared to the physical dimensions of the patterned grids. In contrast, the surface migration length of the adatoms on CdS is less than or comparable to the patterned grids, therefore, the CdTe nucleates preferentially on the CdS [23]. At intermediate temperatures, the migration length of the adatoms on the CdS and the SiO2 is much greater than the patterned grid dimensions, thus the grids have no net effect on the nucleation of CdTe. At the highest temperatures, another mechanism becomes active that causes the negative selectivity. At high temperature, the strain energy caused by the lattice mismatch between CdS and CdTe causes a surface potential difference that drives crystal growth to
X-Ray intensity (a.u.)
CdTe (111)
CdS (0001)
CdTe (220) CdS (121) CdTe (311)
CdTe (331)
(a) ITO
(b) 0
(c) 0
0
10
20
30
40
50
60
70
80
2θ Fig. 11. Coupled h – 2h x-ray diffraction spectra of (a) selective-area growth of CdTe on single crystal CdS, (b) selective-area growth of CdTe on polycrystalline CdS and (c) planar growth of CdTe on polycrystalline CdS.
J. Terrazas et al. / Thin Solid Films 490 (2005) 146 – 153
Intensity (a. u.)
152
(a) (b) (c) 0
8
10
12
14
16
Omega (degrees) Fig. 12. X-ray rocking curves of the CdTe(111) reflection for (a) selectivearea growth of CdTe on single crystal CdS, (b) selective-area growth of CdTe on polycrystalline CdS and (c) planar growth of CdTe on polycrystalline CdS. The sharp peak in trace (a) indicates a definite preferred orientation towards CdTe(111) while the broad peak in trace (b) shows a tendency towards preferred orientation. The planar sample showed no preferred orientation.
which showed that the grain size increased from the planar sample, to the patterned sample on polycrystalline CdS, to the patterned sample on single crystal CdS. Fig. 12 contains X-ray rocking curves of the CdTe(111) reflection for samples 1, 2 and 7. A sharp peak in the curve is observed for the selectively grown CdTe on single crystal CdS (trace a), while a broad peak is observed for the selectively grown CdTe on polycrystalline CdS (trace b). No peak was observed for the planar sample (trace c). This indicated that the CdTe(111) planes were well oriented with respect to the CdS(0001) on the single crystal substrate. This was as expected since it is well known that the preferred growth habit of CdTe on CdS is CdTe(111)//CdS(0001). Interestingly, the broad peak in trace (b) indicated a tendency for the (111) planes in the CdTe to be oriented normal to the sample surface. The planar sample showed no preferred orientation of the CdTe(111) planes.
5. Conclusions It was identified that the combination of grain boundary effects and the random nature of common processes create a situation that significantly complicates scientific study and technological development in random polycrystalline thin films. The ordered polycrystalline approach was proposed to overcome the problems inherent with random polycrystalline thin films. The approach consists of two fundamental steps: (1) the deposition of a patterned growth mask and (2) the selective-area deposition of the ordered polycrystals. It is anticipated that the approach will lead to a configuration that has several enhancements over random polycrystals. The potential of the ordered polycrystalline approach was investigated on the CdTe/CdS material system. SEM and AFM characterization of CdTe grown on patterned samples at various temperatures and using different growth masks
showed that SiO2 and Si3N4 are effective growth masks and that temperature is a dominant parameter for selectivity. Positive selectivity (CdTe deposited on the CdS but not the growth mask) was observed at the lower temperatures studied. Zero selectivity (CdTe deposited both on the CdS but growth mask) was obtained at intermediate temperatures, and negative selectivity (CdTe deposited on the growth mask but not the CdS) was seen at the highest temperatures. PL characterization revealed that patterned samples exhibited a lower sub-bandgap emission compared to planar samples indicating a potential reduction in defect density on the patterned samples. XRD patterns showed that peak intensities were stronger on the patterned samples relative to planar sample consistent with AFM data that showed larger grains on the patterned samples. X-ray rocking curve scans of the CdTe (111) reflection showed a strong preferred orientation on the patterned single crystal sample, a tendency towards orientation on the patterned polycrystalline sample, and no preferred orientation on the planar sample. The results show that the ordered polycrystalline technique has a potential for improving the crystal quality and order of polycrystalline CdTe thin films. The approach appears to be fairly general and could be applied to other material systems.
Acknowledgements This work was supported by grants from the Texas Instruments Foundation and National Renewable Energy Lab under the MURA program. We would like to also acknowledge the useful discussions with professors Stella Quinones and William Durrer.
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Ordered polycrystalline thin films for high performance CdTe/CdS solar cells Javier Terrazasa, Aaron Rodrı´gueza, Cesar Lopeza, Arev Escobedoa, Franz J. Kuhlmanna, John McClureb, David Zubı´aa,* a
Department of Electrical and Computer Engineering, University of Texas at El Paso, El Paso, TX 79968, USA Department of Metallurgy and Materials Engineering, University of Texas at El Paso, El Paso, TX 79968, USA
b
Available online 31 May 2005
Abstract An ordered polycrystalline approach is proposed to overcome fundamental problems associated with random polycrystalline thin films, namely grain boundaries and inhomogeneity. The approach consists of two main steps: (1) the deposition of a patterned growth mask and (2) the selective-area deposition of the ordered polycrystals. The ordered polycrystalline approach was investigated using the CdTe/CdS material system. Experimental results demonstrate that SiO2 and Si3N4 are effective growth masks and that temperature is a dominant parameter for selective-area deposition. PL and XRD characterization indicates that the ordered polycrystalline technique has the potential for improving the crystal quality and order of polycrystalline CdTe thin films. The approach appears to be fairly general and could be applied to other material systems. D 2005 Elsevier B.V. All rights reserved. Keywords: CdTe/CdS; Cadmium telluride; Scanning electron microscopy; Epitaxy
1. Introduction CdTe is a good absorber layer for solar cells with a predicted efficiency of 29% due to its near optimal direct bandgap of 1.45 eV and large optical absorption (> 104 cm 1) above the bandgap [1,2]. This promise has generated much research interest in low-cost thin film polycrystalline CdTe/CdS photovoltaic modules. Although steady improvement in conversion efficiency was achieved in the late 1980s and early 1990s, Fig. 1 shows that the highest reported efficiency has remained essentially flat at 16 –16.5% for the last 11 years despite a high degree of research effort [3]. Due to the difficulty of performing scientific study on random polycrystalline semiconductors, much of the research has utilized an empirical approach with narrow applicability and this has hampered fundamental understanding. Studies have isolated and quantified
* Corresponding author. E-mail address: [email protected] (D. Zubı´a). 0040-6090/$ - see front matter D 2005 Elsevier B.V. All rights reserved. doi:10.1016/j.tsf.2005.04.047
major issues associated with processing and cell structure [4,5] however consensus is now building that the random nature of polycrystalline films is the fundamental reason preventing technological advancement and deep scientific understanding [2]. The randomness of polycrystalline films has hampered technological development and scientific study in at least two ways. First, the grain boundaries create interdependencies between processing steps and critical device parameters that make isolated study and development difficult [6]. Grain boundaries give rise to a host of issues including: (a) enhanced migration of dopants [5,6], (b) device shunting [7], and (c) high recombination velocities due to unpassivated surfaces. Because grain boundaries form an interconnected network within the thin film, they couple critical components of the device including the back contact, CdTe grains, and the CdS/CdTe junction. For example, isolated study and development of the back contact are nearly impossible due to the effect that back-end processing will have on the doping of CdTe and the CdTe/CdS interface [8]. Moreover, the enhanced migration of copper through
Conversion Efficiency
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18 16 14 12 10 8 6 4 2 0 1985
147
Patterning and selective-area deposition
(b)
(a)
1990
1995
Fig. 3. Basic concept of ordered polycrystalline arrays in comparison to random polycrystalline thin films; in (a) the crystal sizes and shapes of films obtained from conventional deposition processes are random, in (b) patterning and selective-area deposition is utilized to obtain crystals with ordered crystal grains and boundaries.
2000
Year Fig. 1. Highest reported CdS/CdTe solar cell conversion efficiencies from the year 1985 to 2004.
grain boundaries has also been associated with device instability [9]. The need therefore exists to decouple the various processing steps so that significant scientific understanding and technological development can be achieved. Second, it is well known that inhomogeneity in cell electrical characteristics results in increased losses [10]. Nonuniformity is highly detrimental for two reasons. One is that the optimum performance of each granular cell is not achieved. The second and more insidious reason is that poor performing cells become electrical loads to good cells. Doping and structure engineering in semiconductors are the principal methods to tailor device characteristics. This is also true in solar cells where the doping profile, bandgap and layer thicknesses have dominant effects on cell characteristics. However, controlling the doping profile and structure uniformly in polycrystalline thin films is difficult due to the random nature of the grains and grain boundaries which prevents the desired optimum CdS/CdTe structure and doping from being achieved. The best that can be achieved is an average profile and structure with some degree of statistical nonuniformity. Fig. 2 shows that although the average grain size of CdTe can be controlled by lowering the deposition temperature from 625 -C to 575 -C, close inspection reveals that the film remains random. The combination of grain boundary effects and the random nature of common processes create a situation that significantly complicates scientific study and technological development. As a result, a plethora of empirical research has yielded only a limited understanding of important
625 ºC
575 ºC
relationships between processing conditions, structure and device characteristics. For example, the CdCl2 treatment is known to be very important to dopant activation and grain growth and many recipes have been developed, however the fundamental mechanism is not well understood [1]. Work in the late 70s on single crystal CdTe/CdS solar cells resulted in significant progress. Cells prepared by epitaxial growth of CdS on p-type single crystal CdTe exhibited a conversion efficiency of 11.7% [11]. However, a significant challenge was the high density of defects due to the lattice (¨ 10%) and thermal mismatch between CdS and CdTe. Much of the effort has focused instead in polycrystalline processes due to their promise for creating an acceptable tradeoff between efficiency and low-cost manufacturing [12]. Although relatively little work has been done on single crystal CdS/CdTe for solar cell applications, a large amount of work has focused on integrating a wide variety of lattice-mismatched material systems for advanced device applications. For over three decades, high quality crystal growth has been studied to create complex semiconductor structures and to integrate heterogeneous materials for the purpose of increasing device performance and system functionality. As a result, epitaxy has evolved from homoepitaxy to lattice-mismatched heteroepitaxy and from planar growth to patterned epitaxy. Patterned selective-area growth of lattice-mismatched semiconductors has been effectively utilized in a number of material systems to reduce defects and enhance performance [13,14]. For example, Fitzgerald et al. showed a reduction in defects in patterned GaAs grown on Silicon [15] and Zubia et al. showed three-dimensional relief mechanisms at the nanos-
575 ºC
Fig. 2. Effect of deposition temperature on uniformity of CdTe deposited on CdS. Although the uniformity is improved when the temperature is lowered, the image on the far right shows that traditional techniques result in inherently random shaped and oriented crystal grains. The scale bar indicates 22.5 Am.
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Growth mask CdS Fig. 4. Schematic representation of patterned dielectric growth mask on CdS thin film.
cale [16]. Nanoheteroepitaxy was recently proposed as a technique to utilize strain relief mechanisms active at the nanoscale to significantly reduce the defect density in lattice mismatched materials [17]. In this paper we propose a patterned selective-area growth technique as a method to fabricate an ordered array of high quality crystals to overcome the problems inherent with random polycrystalline thin films. The basic concept is illustrated in Fig. 3. We present results from the selectivearea deposition of CdTe on patterned SiO2/CdS/ITO/glass, SiO2/CdS(0001), and Si3N4/CdS/ITO/glass substrates via close-spaced sublimation.
2. Benefits of ordered polycrystalline thin films The ordered polycrystalline approach consists of two fundamental steps: (1) the deposition of a patterned dielectric growth mask and (2) the selective-area deposition of the ordered polycrystals. Growth selectivity is achieved by the differential surface mobility between the dielectric and substrate materials. By way of example, the two steps are illustrated in Figs. 4 and 5 for the case of CdTe on polycrystalline CdS. Fig. 4 shows a patterned dielectric growth mask with an array of holes to expose the underlying CdS. Although a 2 2 array is shown in Fig. 4, the actual array will contain thousands of cells. Fig. 5 shows the selective-area deposition of CdTe on the patterned CdS/ dielectric substrate. Although the crystallographic orientation of the CdTe crystals will vary, techniques have been developed to control the lateral versus vertical growth rates and the three-dimensional geometry [18]. The ordered polycrystalline approach will lead to a configuration that has several enhancements over random polycrystals. One is that precisely placed and uniform crystals and grain boundaries will decouple the interactions between processing steps and different parts of the cells.
This will enable the independent optimization of various components of the cell and the ability to uniformly tailor the doping of the CdTe crystals to increase solar cell performance due to (a) a superior electrical junction, (b) a superior charge carrier concentration in the bulk of the crystals and (c) a superior tunneling back contact. Moreover the deconvolution of processing steps will allow isolated studies yielding greater insight into loss mechanisms. The choice of dielectric material is important since it will serve five purposes: (1) as a selective growth mask, (2) for isolation between back contact and CdS layer, (3) for surface passivation of CdTe to reduce surface recombination, (4) as a barrier to diffusion of impurities and, (5) as a barrier to the out-diffusion of dopants from the CdTe bulk. Various works in the literature have shown that SiO2 and Si3N4 can be used as growth masks to achieve selective-area deposition to realize the structure shown in Fig. 4 [19]. However, the growth mask material has to be of high quality to avoid nucleation. In order to avoid electrical shunting between the back contact and the CdS, the mask material must also be insulating. SiO2 and Si3N4 are insulating and meet this requirement. A typical method of passivating the CdTe grain boundaries is by oxidation of the surface through heat-treating in an oxygen-containing atmosphere. In the proposed structure, the dielectric material could provide the passivation. However this requires an intimate interface between the dielectric material and CdTe, which could prove to be a difficult technical challenge. The advantage of using SiO2 for passivation is that it could be more stable than the grown surface oxide. A highly intimate interface also allows the mask material to serve as a barrier to dopant migration from the back contact to the interface of the device. Finally, assuming a suitable segregation coefficient, the dielectric material could serve as a barrier to the out-diffusion of intentional dopants inside the CdTe grains. This phenomenon has been well documented for SiO2 on silicon [20]. A further benefit of the configuration is that the possibility exists of guiding the photons that enter the growth mask into the active regions. The overall effect is that the growth mask will not introduce any inactive area losses but will act to increase the efficiency by concentrating the light in the active regions [19]. The area covered by the mask material will be inactive area, however, if the index of refraction is engineered properly, the rays of light that enter the mask material can be bent into the CdTe thereby effectively concentrating the light, which is known to increase conversion efficiency [21].
CdTe crystal
CdTe crystal Growth mask CdS
Growth mask CdS
Fig. 5. Perspective (left) and cross-sectional (right) schematics of a 2 2 array of ordered CdTe crystals grown on CdS.
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149
Finally, since the exact location of cells will be known and can be probed, ‘‘bad’’ cells can be isolated to prevent them from loading ‘‘good’’ cells.
3. Experimental details Table 1 lists the processing conditions of 7 samples studied in this paper. Details of the processing conditions are presented in the following sections. Two additional samples were single crystal wafers of (8) CdS(0001) and (9) CdTe(111) obtained commercially from MTI Corporation and measuring 5 5 0.5 mm. One experiment consisted of determining growth and substrate conditions that promoted good selective growth of CdTe on CdS. A second experiment compared the nature and quality of the CdTe crystals on planar versus patterned substrates and on singlecrystal versus polycrystalline CdS. The results from these experiments are presented in Section 4. The fabrication procedure consists of three basic steps: (1) the deposition of CdS, (2) the patterned deposition of a growth mask, and (3) the selective deposition of CdTe. Prior to all deposition steps, the samples are immersed in acetone, methanol and deionized water in an ultrasonic cleaner for 5 min to clean them. The polycrystalline CdS (pc-CdS) thin films were grown on commercially obtained indium tin oxide (ITO) on 1 2-in. 7059 Corning glass substrates using the chemical bath deposition method in an aqueous solution of Cd(CH 3 COO) 2U2H 2O (cadmium acetate), CH3COONH4 (ammonium acetate), ammonium hydroxide (NH4OH) and CS(NH2)2 (thiourea) in molar concentrations of 0.1, 1, 15 and 0.1, respectively. The bath solution was placed on a hot plate with a magnetic stirrer to promote ionby-ion implantation and to control the temperature of the bath to 88 T 1 -C for a total time of 30 min. The thickness of the CdS films was 85 T 5 nm as measured by interferometry. The grain size was 50 nm nominally as measured with AFM. SEM, AFM, PL, XRD, interferometric spectroscopy were used to assess the growth nature and quality of the various thin films. PL was performed using a 633 nm Argon Laser and TRIAX 190 spectrometer attached to a DM302 photon counting module. Samples were scanned from 850 Table 1 This table contains a summary of the main variants for the growth mask and CdTe depositions Sample
Substrate type
Mask material
Tsource (-C)
Tsub (-C)
Stage-3 time (s)
Deposition selectivity
1 2 3 4 5 6 7
pc-CdS pc-CdS pc-CdS pc-CdS pc-CdS pc-CdS sc-CdS
None SiO2-RF SiO2-EB Si3N4-RF SiO2-EB SiO2-RF SiO2-EB
575 575 575 575 615 635 575
550 550 550 550 580 600 550
160 160 110 160 70 50 160
N/A Positive Positive Positive Zero Negative Positive
RF indicates RF sputtering and EB means electron beam evaporation.
Fig. 6. Plan view drawing showing how the copper grids were placed on the substrates.
to 870 nm to obtain CdTe emission lines. A Scintag XDS 2000 diffractometer using the Cu-Ka line was used to obtain the X-ray diffraction data. 3.1. Deposition of patterned growth mask Patterned deposition of the growth mask was achieved using a shadow mask process [18] in which copper grids normally used for transmission electron microscopy were used as deposition masks. Patterned layers of SiO2 and Si3N4 were deposited on polycrystalline CdS substrates using RF sputtering and electron beam evaporation. In contrast, the single crystal CdS received only the patterned electron beam deposition of SiO2. To produce the patterned mask, two copper grids of different size mesh were placed on the substrate prior to deposition. The copper grids contained a squared array of wires of size 200, 400 or 600 mesh. The 200 size mesh had wires with a width of 10 Am separated by 115 Am. Similarly, the 400 and 600 mesh had wire widths of 7 Am and 5 Am and separations of 55 Am and 37 Am, respectively. Fig. 6 shows the manner in which the copper grids were placed on the substrates. The single crystal substrates had only one copper grid of 600 mesh. The growth mask depositions were performed in a Kurt J. Lesker deposition reactor at room temperature. The chamber pressure during the deposition was 10 2 Torr for the RF sputtered films, and 10 6 Torr for the electron-beam depositions, nominally. The deposition rates varied from 4.7 to 6.7 nm/min for the RF sputtered films and 7.5 to 30 nm/min for the electron beam evaporated films. The electron beam evaporated SiO2 films on polycrystalline CdS received an ex situ heat treatment of 325 -C for 30 min in a nitrogen environment to improve adhesion. The anneal temperature for the SiO2 films deposited on the single crystal CdS was 425 -C. 3.2. Selective-area deposition of CdTe Close-spaced sublimation was used for the deposition of the CdTe. Prior to deposition the reactor was evacuated and purged with helium and oxygen at flow rates of 10 and 2.5 CFH, respectively. The pressure in the reactor at the start of deposition was 1.6 Torr. The temperature profile had three
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Deposition Warm up
700
Deposition
preparation
(a)
Temperature (Celsius)
600 500 400 300 200
Substrate
100
Source
SiO2 CdTe
0 0
200
400
600
800
Time (Seconds) Fig. 7. Typical time – temperature profiles for the CdTe depositions showing the warm up, deposition preparation and deposition stages. Notice that the substrate temperature is higher than the source temperature for all of the warm up and most of the deposition preparation stages to inhibit growth during these stages.
distinct stages as shown in Fig. 7. Stage one is a warm up and cleaning step. In this stage the temperature is ramped from room temperature to 375 -C and 425 -C for the source and substrate, respectively. Stage two is a deposition preparatory stage. In this stage the temperatures and pressures are ramped to the final values specified for the deposition. Stage three is the deposition stage. The main variants of the CdTe growths were the source and substrate temperatures and time of stage-3 and are summarized in Table 1. All other parameters were held nominally constant. It is useful to mention here that the patterned structure obtained using this procedure is inverted relative to the one illustrated in Fig. 5.
(b)
CdTe
(c)
Fig. 8. Comparison of selective growth of CdTe on CdS versus SiO2 at temperatures of (a) Tsource = 575 -C, Tsub = 550 -C, (b) Tsource = 615 -C, Tsub = 580 -C and (c) Tsource = 635 -C, Tsub = 600 -C. As the temperature is increased, the selectivity transitions from (a) positive to, (b) zero to (c) negative selectivity. The scale bars indicate (a) 50 Am, (b) 100 Am and (c) 250 Am. All images are plan view SEM images except for the inset of (a) which is an AFM image.
temperatures (samples 3, 4 and 7) exhibited positive selectivity although different growth mask materials were used. Fig. 9 shows that CdTe deposited on CdS but not on the patterned Si3N4. This study indicates that SiO2 and Si3N4 are effective growth masks and that temperature is a dominant parameter for selectivity.
4. Results and discussion 4.1. Selectivity studies The selectivity of CdTe deposition was studied as a function of temperature and different growth masks. Fig. 8 shows SEM images of samples 2, 5 and 6. Fig. 8(a) shows that for temperatures of Tsource = 575 -C and Tsub = 550 -C the selectivity was positive meaning that CdTe deposited on the CdS but not on the SiO2. Fig. 8(b) shows that for higher temperatures of Tsource = 615 -C, and Tsub = 580 -C, CdTe deposited both on the CdS and SiO2. For this case the selectivity was zero. Fig. 8(c) shows that for the highest temperatures of Tsource = 635 -C, and Tsub = 600 -C the selectivity was negative, i.e., the CdTe deposited on the SiO2 but not on the CdS. The temperature effect on selectivity observed in this study was consistent with that reported by Zhang and Bhat of CdTe growth on Si and GaAs via metalorganic vapor phase epitaxy using SiO2 and Si3N4 masks [22]. The three samples grown at the lower
CdTe
Si3N4
Fig. 9. Positive selective growth of CdTe on CdS versus patterned Si3N4.
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151
PL Intensity (a.u.)
occur preferentially on the SiO2 where the strain energy of the CdTe is less due to the amorphous structure of SiO2.
1.42
4.2. Study of planar versus patterned deposition on singleand polycrystalline substrates
(d) (c)
Photoluminescence (PL), X-ray diffraction (XRD) and atomic force microscopy (AFM) were used to assess the quality and orientation of the CdTe crystals on various samples. Room temperature PL spectra (see Fig. 10) were obtained from four different CdTe samples: (a) selectivearea growth of CdTe on single crystal CdS (sample 7), (b) selective-area growth of CdTe on polycrystalline CdS (sample 2), (c) planar growth of CdTe on polycrystalline CdS (sample 1), and (d) a commercially obtained single crystal CdTe (sample 9). The four samples show a peak at 1.450 eV corresponding to the bandgap of CdTe and several other emission peeks below the bandgap at 1.444 eV and 1.446 eV. Interestingly, samples 2 and 7, which were both patterned, had the lowest sub-bandgap emission intensities, even compared to the single crystal CdTe wafer. We speculate that this indicated that the patterning and selective-area growth helped to reduce the defect density in the CdTe. These results are consistent with other works that showed improved crystal quality when patterned growth was used compared to planar growth [24]. X-ray diffraction spectra were obtained from samples 1, 2 and 7 and are shown in Figs. 11 and 12. Fig. 11 contains X-ray patterns of (a) (sample 7) selective-area growth of CdTe on single crystal CdS, (b) (sample 2) selective-area growth of CdTe on polycrystalline CdS and (c) (sample 1) planar growth of CdTe on polycrystalline CdS. Although the three samples had nominally the same amount of CdTe (the three samples were grown on under identical conditions), the selectively grown CdTe on single crystal CdS showed the strongest intensities, followed by selectively grown CdTe on polycrystalline CdS. The trend was consistent with AFM characterization of the grain size of the CdTe crystals,
(b) (a) 1.43
1.44
1.45
1.46
Energy (eV) Fig. 10. Comparison between the PL of four different CdTe samples; (a) selective-area growth of CdTe on single crystal CdS, (b) selective-area growth of CdTe on polycrystalline CdS, (c) planar growth of CdTe on polycrystalline CdS, and (d) a commercially obtained single crystal CdTe. Trace (a) has the least intensity in the sub-bandgap (< 1.45 eV) region indicating a lower defect density compared to the other samples.
A qualitative model to explain the strong influence of temperature on selectivity is presented. At the lower temperature the selectivity is dominated by the differential surface mobility of adatoms. At the lower temperature, the surface mobility is much larger on the SiO2 compared to the CdS, and also much larger compared to the physical dimensions of the patterned grids. In contrast, the surface migration length of the adatoms on CdS is less than or comparable to the patterned grids, therefore, the CdTe nucleates preferentially on the CdS [23]. At intermediate temperatures, the migration length of the adatoms on the CdS and the SiO2 is much greater than the patterned grid dimensions, thus the grids have no net effect on the nucleation of CdTe. At the highest temperatures, another mechanism becomes active that causes the negative selectivity. At high temperature, the strain energy caused by the lattice mismatch between CdS and CdTe causes a surface potential difference that drives crystal growth to
X-Ray intensity (a.u.)
CdTe (111)
CdS (0001)
CdTe (220) CdS (121) CdTe (311)
CdTe (331)
(a) ITO
(b) 0
(c) 0
0
10
20
30
40
50
60
70
80
2θ Fig. 11. Coupled h – 2h x-ray diffraction spectra of (a) selective-area growth of CdTe on single crystal CdS, (b) selective-area growth of CdTe on polycrystalline CdS and (c) planar growth of CdTe on polycrystalline CdS.
J. Terrazas et al. / Thin Solid Films 490 (2005) 146 – 153
Intensity (a. u.)
152
(a) (b) (c) 0
8
10
12
14
16
Omega (degrees) Fig. 12. X-ray rocking curves of the CdTe(111) reflection for (a) selectivearea growth of CdTe on single crystal CdS, (b) selective-area growth of CdTe on polycrystalline CdS and (c) planar growth of CdTe on polycrystalline CdS. The sharp peak in trace (a) indicates a definite preferred orientation towards CdTe(111) while the broad peak in trace (b) shows a tendency towards preferred orientation. The planar sample showed no preferred orientation.
which showed that the grain size increased from the planar sample, to the patterned sample on polycrystalline CdS, to the patterned sample on single crystal CdS. Fig. 12 contains X-ray rocking curves of the CdTe(111) reflection for samples 1, 2 and 7. A sharp peak in the curve is observed for the selectively grown CdTe on single crystal CdS (trace a), while a broad peak is observed for the selectively grown CdTe on polycrystalline CdS (trace b). No peak was observed for the planar sample (trace c). This indicated that the CdTe(111) planes were well oriented with respect to the CdS(0001) on the single crystal substrate. This was as expected since it is well known that the preferred growth habit of CdTe on CdS is CdTe(111)//CdS(0001). Interestingly, the broad peak in trace (b) indicated a tendency for the (111) planes in the CdTe to be oriented normal to the sample surface. The planar sample showed no preferred orientation of the CdTe(111) planes.
5. Conclusions It was identified that the combination of grain boundary effects and the random nature of common processes create a situation that significantly complicates scientific study and technological development in random polycrystalline thin films. The ordered polycrystalline approach was proposed to overcome the problems inherent with random polycrystalline thin films. The approach consists of two fundamental steps: (1) the deposition of a patterned growth mask and (2) the selective-area deposition of the ordered polycrystals. It is anticipated that the approach will lead to a configuration that has several enhancements over random polycrystals. The potential of the ordered polycrystalline approach was investigated on the CdTe/CdS material system. SEM and AFM characterization of CdTe grown on patterned samples at various temperatures and using different growth masks
showed that SiO2 and Si3N4 are effective growth masks and that temperature is a dominant parameter for selectivity. Positive selectivity (CdTe deposited on the CdS but not the growth mask) was observed at the lower temperatures studied. Zero selectivity (CdTe deposited both on the CdS but growth mask) was obtained at intermediate temperatures, and negative selectivity (CdTe deposited on the growth mask but not the CdS) was seen at the highest temperatures. PL characterization revealed that patterned samples exhibited a lower sub-bandgap emission compared to planar samples indicating a potential reduction in defect density on the patterned samples. XRD patterns showed that peak intensities were stronger on the patterned samples relative to planar sample consistent with AFM data that showed larger grains on the patterned samples. X-ray rocking curve scans of the CdTe (111) reflection showed a strong preferred orientation on the patterned single crystal sample, a tendency towards orientation on the patterned polycrystalline sample, and no preferred orientation on the planar sample. The results show that the ordered polycrystalline technique has a potential for improving the crystal quality and order of polycrystalline CdTe thin films. The approach appears to be fairly general and could be applied to other material systems.
Acknowledgements This work was supported by grants from the Texas Instruments Foundation and National Renewable Energy Lab under the MURA program. We would like to also acknowledge the useful discussions with professors Stella Quinones and William Durrer.
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