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Chalcogenide programmable switches with SiGeSb heating layers
Journal of Non-Crystalline Solids 358 (2012) 2405–2408
Contents lists available at SciVerse ScienceDirect
Journal of Non-Crystalline Solids journal homepage: www.elsevier.com/ locate/ jnoncrysol
Chalcogenide programmable switches with SiGeSb heating layers Seung-Yun Lee a,⁎, S. Jung a, S.-M. Yoon b, Y.S. Park c a b c
Department of Applied Materials Engineering, Hanbat National University, Daejeon 305-719, Republic of Korea Department of Applied Materials Engineering for Information and Electronics, Kyung Hee University, Yongin, Gyeonggi 446-701, Republic of Korea ETRI, Daejeon 305-700, Republic of Korea
a r t i c l e
i n f o
Article history: Received 14 August 2011 Received in revised form 24 November 2011 Available online 27 December 2011 Keywords: Chalcogenide; Silicon–germanium–antimony; Programmable; Switch; Heating layer
a b s t r a c t This work reports on the switching behavior of chalcogenide programmable switches employing SiGeSb alloys as resistive heating layers. The sputter-deposited SiGeSb layers, prepared to contact with GeSbTe chalcogenide alloys in an indirect heating structure, induced temperature rise and phase transition in the GeSbTe alloys. While the electrical resistance of the SiGeSb layers decreased with increasing annealing temperature, it became saturated at the antimony concentration in the SiGeSb layers higher than 28 atomic percent. The fabricated switch devices exhibited on–off switch characteristic between high resistive and low resistive states, and their switching behavior was remarkably influenced by the SiGeSb heater resistance depending on the annealing temperature and the amount of antimony atoms. © 2011 Elsevier B.V. All rights reserved.
1. Introduction Programmable logic devices (PLDs) [1] such as a field-programmable gate array (FPGA) and a complex programmable logic device (CPLD) have drawn much attention due to their configurable nature after fabrication. The programmable switch, which is one of the most important elements constituting PLDs, controls the connection between a logic block and an interconnect wire as well as between two different interconnect wires. While the switch process technologies commonly used are SRAM [2], flash memory [3], and anti-fuse [4], the chalcogenidebased devices [5,6] are considered a promising candidate for the programmable switch component. The chalcogenide alloys comprising S, Se, and Te atoms have been developed as active materials in optical data storage [7] and phase change memory [8] because of their nonvolatile nature. This nonvolatility is another key advantage in PLD technology, for the configuration information required to configure the PLDs can be retained without electrical power. Moreover, the chalcogenide alloys are highly scalable and inherently hard to radiation. Thus, it is anticipated that the realization of chalcogenide-based switches will increase the cell area efficiency and the radiation hardness of the PLDs. The concept of the multiterminal programmable switch using chalcogenide alloys was proposed earlier in ref. [9], but the fabrication of the prototype devices based on sub-micron technology and the demonstration of their operation were reported recently [5,6]. The heating layer plays a very important role in chalcogenide-based memory devices: it provides the additional
⁎ Corresponding author. E-mail address: [email protected] (S.-Y. Lee). 0022-3093/$ – see front matter © 2011 Elsevier B.V. All rights reserved. doi:10.1016/j.jnoncrysol.2011.12.014
heat promoting the phase transition in chalcogenide alloys [10] or suppresses the heat dissipation through a metal line [11]. Although the performance of the chalcogenide switch may strongly depend on the heater property, similarly to the case of the chalcogenide memory, a comprehensive discussion about the heating layer in the switch device has not been given yet. Therefore, we have investigated the operation of chalcogenide programmable switches employing SiGeSb alloys as indirectly heating elements, and report here on the switch characteristics and the effect of the heater resistance on the switching behavior. 2. Experimental The switch devices were fabricated with the sequence as follows. SiO2 layers were formed on Si b100> wafers by thermal oxidation. 100 nm thick SiGeSb films were grown by co-sputtering from Si, Ge, and Sb targets, and the Sb concentrations in the SiGeSb films were changed to range from 20 to 35 atomic percent by varying sputtering power applied to the Sb target. The SiGeSb films were annealed in a reduced-pressure N2 atmosphere for 10 min, and patterned to produce the heating layers. The low resistive bottom electrodes lying under the heating layers were not included in the switch device, unlike in typical phase change memory devices [8], because applied current should be confined to the high resistive heating layers for effective indirect heating. 300 nm thick GST films and 50 nm thick tungsten films were successively deposited in the 0.5× 0.5 μm2 pores made through intermetal SiO2 layers by a sputtering method, and they were patterned using a lift-off process. The SiGeSb and GST layers were connected with tungsten metal lines through via holes. The microstructures of the SiGeSb heating layers and the fabricated switch devices were observed by SEM, and the switching behavior of
S.-Y. Lee et al. / Journal of Non-Crystalline Solids 358 (2012) 2405–2408
the switch devices was monitored using a pulse generator, a digital oscilloscope, and a semiconductor parameter analyzer. The resistances of the switch cells and the SiGeSb heating layers were monitored using a semiconductor parameter analyzer and a probe station. The measurement was repeated several times under the same conditions, and the resistance values of the mean and standard deviation were estimated. To obtain the cell resistance change in the switch devices caused by programming voltage, a voltage pulse of 1 μs width was applied through two programming terminals as a first step. A reading terminal and either of the programming terminals were connected to the semiconductor parameter analyzer and the cell resistance was measured at 0.1 V as a next step. This measurement procedure was repeated with increasing amplitude of the programming voltage pulse until reaching the maximum input voltage limit.
105 (Si0.8Ge0.2)0.8Sb0.2 (Si0.8Ge0.2)0.72Sb0.28
104
Resistance (kΩ)
2406
(Si0.8Ge0.2)0.65Sb0.35 103
102
101
100
3. Results
200
300
400
500
600
Annealing Temperature (oC)
We prepared 3 terminal switch devices of the indirect heating structure Chen et al. suggested [5], as shown in Fig. 1. Two programming terminals were formed connecting both sides of the sputter-deposited SiGeSb heating layer and tungsten metal lines through via holes. The GST layer and a tungsten metal line were linked to form the reading terminal. Since the resistivity of SiGeSb is highly dependent on the amount of Sb atoms in the SiGeSb [10], the SiGeSb heating layer is beneficial to the optimization of switch performance. Fig. 2 shows the resistances of the SiGeSb heating layers prepared with various fabrication conditions. The resistance of the (Si0.8Ge0.2)0.8Sb0.2 layers reached to 4.8 kΩ with increasing annealing temperature until 550 °C, which is compatible with the fact that the
(a)
(b)
Fig. 2. Electrical resistance changes of SiGeSb heating layers as a function of annealing temperature and Sb concentration.
activation of Sb atoms is promoted by thermal annealing. While the resistance was clearly dependent on the annealing temperature, the effect of the amount of Sb atoms on the resistance was somewhat disordered. At the annealing temperature of 525 °C, the resistance of the (Si0.8Ge0.2)0.8Sb0.2 layer was much higher than that of the others, but there was only a slight difference in resistance between the (Si0.8Ge0.2)0.72Sb0.28 and (Si0.8Ge0.2)0.65Sb0.35 layers. The surface morphologies of the (Si0.8Ge0.2)0.72Sb0.28 and (Si0.8Ge0.2)0.65Sb0.35 layers were examined and it was found that a number of voids appeared after the annealing step, as shown in Fig. 3. Three kinds of switch devices including the SiGeSb heating layers were fabricated by optimizing the annealing temperature and the Sb concentration, and the effect of the SiGeSb heater resistance on the operation of the switch devices was investigated. In the case of the heater resistance higher than 50 kΩ, the applied voltage pulse could not lead to any apparent change in the cell resistance, because the resulting current flowing through the heating layer was too tiny to heat up the chalcogenide alloy. When the heater resistance was 18.7 kΩ, the phase transition from the amorphous to the crystalline state (i.e., set transition) occurred at a high voltage of 9 V but the phase transition from the crystalline to the amorphous state (i.e., reset transition) did not even at the maximum input voltage limit for our measuring system (Fig. 4(a)). Finally, both the set and reset transitions were observed as the heater resistance decreased to 6.0 kΩ or less (Fig. 4(b) and (c)). The applied voltages at the onset of set transition were totally different between the switch devices with heater resistances of 6.0 kΩ and 5.3 kΩ, whereas those at the onset of reset transition were similar, around 7 to 8 V.
4. Discussion
W GeSbTe SiGeSb 0.5μ μm Fig. 1. (a) Schematic and (b) cross-sectional view SEM image of a chalcogenide programmable switch device employing a SiGeSb heating layer.
It was reported in the literature [10] that the resistance of the sputter-deposited SiGeSb film drastically decreased with increasing Sb concentration within a range of two orders of magnitude at the annealing temperature of 400 °C. However, the amount of Sb atoms did not affect the resistance significantly as shown in Fig. 2. The reason for the different results between this work and the previous study is attributed to the considerable loss of Sb originating from a severe Sb outdiffusion in the (Si0.8Ge0.2)0.72Sb0.28 and (Si0.8Ge0.2)0.65Sb0.35 layers at the annealing temperature of 525 °C. Sb is well known to migrate from a silicon matrix to the surface during thermal treatments [12]. In addition, it is highly probable that the outdiffused Sb atoms become vaporized at the annealing temperature close to the melting point of Sb (631 °C) in vacuum. The SEM images in Fig. 3 clearly support
S.-Y. Lee et al. / Journal of Non-Crystalline Solids 358 (2012) 2405–2408
2407
106
(a)
(a) 105
104
18.7kΩ
1μ μm 103
Cell Resistance (Ω)
(b)
1μm (c)
(b) 105
104
6.0kΩ 3
10
(c) 105
104
5.3kΩ 3
10
1μm Fig. 3. Plain view SEM images of (a) a (Si0.8Ge0.2)0.8Sb0.2 layer, (b) a (Si0.8Ge0.2)0.72Sb0.28 layer, and (c) a (Si0.8Ge0.2)0.65Sb0.35 layer annealed at 525 °C.
that the higher Sb concentration was in the SiGeSb layer, the more significantly outdiffusion and vaporization occurred. The SiGeSb heating layer plays a role in indirect heating to chalcogenide alloys in the switch device. The resistive joule heat generated from the heating layer induces the temperature rise and phase transition in the chalcogenide alloys, which is totally different from the self-heating of the chalcogenide alloys in the switch devices made in the horizontal [6] and vertical [13] configurations, caused by a current passing through the chalcogenide alloys. The indirect heating structure in our devices has an effect on suppressing the partial set arising in the horizontal and vertical structures (Fig. 5). If a reset programming is performed using two programming terminals in each switch device, the electrical signal transmission through two reading terminals will be interrupted due to the formation of a high resistive amorphous state at the center of the chalcogenide alloy. Meanwhile, the partial set, which denotes the formation of the low resistive crystalline channel not in the whole but in the part of the amorphous state, frequently takes place after the set programming. Since some of the high resistive amorphous state still remains lying across the path of the electrical signal transmission, the electrical signal cannot be easily transferred between the reading terminals. Table 1 demonstrates the partial set occurrence in the vertical structure device, where the post-programming resistance measured using two reading terminals was still high compared with the post-programming resistance measured using two programming terminals. The details of the vertical structure are under study. This incomplete crystallization results from the set programming current passing through a confined region in the amorphous state. It is known that the non-uniform current
2
4
6
8
10
Applied Voltage (V) Fig. 4. Cell resistance vs applied voltage for chalcogenide programmable switch devices employing the SiGeSb heating layers with heater resistances of (a) 18.7 kΩ, (b) 6.0 kΩ, and (c) 5.3 kΩ.
flow is closely related to the size of a parasitic capacitance and the shape of an amorphous state [14]. Very large set programming current should be applied for changing all the amorphous state into the crystalline state. Alternatively, the adoption of the indirect heating structure can be another approach to avoid the partial set problem resulting from
Fig. 5. Schematic diagrams of typical chalcogenide programmable switch devices made in (a) horizontal and (b) vertical configurations. “P” and “R” represent the programming terminal and the reading terminal, respectively.
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S.-Y. Lee et al. / Journal of Non-Crystalline Solids 358 (2012) 2405–2408
Table 1 Comparison of pre- and post-programming resistances for two types of switch structures.
Pre-programming resistance measured using two programming terminals (Ω) Post-programming resistance measured using two programming terminals (Ω) Pre-programming resistance measured using two reading terminals (Ω) Post-programming resistance measured using two reading terminals (Ω) Pre-programming resistance measured using a reading terminal and a programming terminal (Ω) Post-programming resistance measured using a reading terminal and a programming terminal (Ω)
the non-uniform current flow in the chalcogenide alloy. Unlike the vertical structure device, the switch device with the indirect structure exhibited very small resistance after the set programming (Table 1). Since the resistive joule heat originating from the heating layer is proportional to (applied voltage) 2/(heater resistance), a higher voltage should be applied to the switch device having a larger heater resistance for the phase transitions. However, the switch characteristics with the heater resistances of 6.0 kΩ and 5.3 kΩ were rather complicated as shown in Fig. 4(b) and (c). The higher voltage for the set transition with the heater resistance of 5.3 kΩ seems contrary to the previous consideration of the resistive joule heating, but it may result from the fact that thermal conduction facilitated through a low resistive heating layer hinders the temperature rise in the chalcogenide alloy. In general, the set transition for crystallization in chalcogenide alloys requires a longer period of time than the reset transition for melt-quenching of them [15]. Thus, it is possible that the heat dissipation through the heating layer is more effective in the set transition, compared to the reset transition. Our postulate is supported from the fact that the heater resistance affected only the set transition voltage. The set transition occurred at a much larger voltage with the heater resistance of 5.3 kΩ so that the switching voltage range for the set and reset transitions became restricted, which indicates that the heater resistance value is not adequate for the switch operation. This dependence of the switching behavior on the heater resistance implies that an optimum heater resistance should be chosen in order to program the switch device with low voltages within a wide voltage window. 5. Conclusion We fabricated 3 terminal chalcogenide programmable switches employing SiGeSb alloys as a heater material, and evaluated their switching characteristics. The SiGeSb films of various compositions were prepared by a co-sputtering method and a subsequent thermal anneal. The resistance of the SiGeSb layers was inversely proportional to the annealing temperature, but it decreased and then saturated as the Sb concentration in the SiGeSb layers increased. The plain view
Vertical structure
Indirect structure
4.61 × 105 ± 1.87 × 104 8.80 × 103 ± 1.35 × 103 4.73 × 105 ± 2.44 × 104 1.89 × 104 ± 2.03 × 103 – –
5.33 × 103 ± 1.53 × 102 5.33 × 103 ± 1.46 × 102 – – 2.03 × 105 ± 2.83 × 103 3.85 × 103 ± 5.53 × 102
SEM images of the SiGeSb layers revealed that the saturated resistance was closely related to a large number of voids produced at a high Sb concentration. The switch devices exhibited switching characteristic between high resistive and low resistive states, and the resistance of the SiGeSb heating layer strongly affected the switch operation. It is concluded from these results that the performance of the switch devices can be improved by tuning the manufacturing process of the SiGeSb heater.
Acknowledgments This research was supported by Basic Science Research Program through the National Research Foundation of Korea funded by the Ministry of Education, Science and Technology 2011-0005620.
References [1] S.D. Brown, IEEE Proc. Custom Integrated Circuits Conf. (1994) 69. [2] J. Wang, R. Katz, J. Sun, B. Cronquist, J. McCollum, T. Speed, W. Plants, IEEE Trans. Nucl. Sci. 46 (1999) 1728. [3] C. Auricchio, M. Borgatti, A. Martino, A. Maurelli, R. Pelliconi, P. Rolandi, Proc. of European Solid State Device Research Conf. (2003) 211. [4] J. Greene, E. Hamdy, S. Beal, Proc. IEEE 81 (1993) 1042. [5] K.N. Chen, L. Krusin-Elbaum, D.M. Newns, B.G. Elmegreen, R. Cheek, N. Rana, A.M. Young, S.J. Koester, C. Lam, IEEE Electron Device Lett. 29 (2008) 131. [6] S. Yoon, S. Jung, S. Lee, Y. Park, B. Yu, IEEE Electron Device Lett. 30 (2009) 371. [7] G. Lucovsky, J. Phillips, J. Non-Cryst. Solids 354 (2008) 2753. [8] S. Raoux, G. Burr, M. Breitwisch, C. Rettner, Y.-C. Chen, R. Shelby, M. Salinga, D. Krebs, S.-H. Chen, H.-L. Lung, C.H. Lam, IBM J. Res. Dev. 52 (2008) 465. [9] K. Landingham, IEEE Trans. Electron Devices ED-20 (1973) 178. [10] S.-Y. Lee, Y. Park, S.-M. Yoon, S.-W. Jung, J. Lee, B.-G. Yu, Microelectron. Eng. 85 (2008) 2342. [11] I.V. Karpov, S.A. Kostylev, IEEE Electron Device Lett. 27 (2006) 808. [12] R. Labbani, R. Halimi, Mater. Sci. Eng. B 124–125 (2005) 280. [13] A. Oliva, L. Kordus II, N. Derhacobian, V.-H. Chan, T. Stewart Jr., US Patent 0099405 A1, 2007. [14] D. Ielmini, D. Mantegazza, A.L. Lacaita, A. Pirovano, F. Pellizzer, IEEE Electron Device Lett. 26 (2005) 799. [15] J. Maimon, E. Spall, R. Quinn, S. Schnur, IEEE Proc. Aerospace Conf. 5 (2001) 2289.
Contents lists available at SciVerse ScienceDirect
Journal of Non-Crystalline Solids journal homepage: www.elsevier.com/ locate/ jnoncrysol
Chalcogenide programmable switches with SiGeSb heating layers Seung-Yun Lee a,⁎, S. Jung a, S.-M. Yoon b, Y.S. Park c a b c
Department of Applied Materials Engineering, Hanbat National University, Daejeon 305-719, Republic of Korea Department of Applied Materials Engineering for Information and Electronics, Kyung Hee University, Yongin, Gyeonggi 446-701, Republic of Korea ETRI, Daejeon 305-700, Republic of Korea
a r t i c l e
i n f o
Article history: Received 14 August 2011 Received in revised form 24 November 2011 Available online 27 December 2011 Keywords: Chalcogenide; Silicon–germanium–antimony; Programmable; Switch; Heating layer
a b s t r a c t This work reports on the switching behavior of chalcogenide programmable switches employing SiGeSb alloys as resistive heating layers. The sputter-deposited SiGeSb layers, prepared to contact with GeSbTe chalcogenide alloys in an indirect heating structure, induced temperature rise and phase transition in the GeSbTe alloys. While the electrical resistance of the SiGeSb layers decreased with increasing annealing temperature, it became saturated at the antimony concentration in the SiGeSb layers higher than 28 atomic percent. The fabricated switch devices exhibited on–off switch characteristic between high resistive and low resistive states, and their switching behavior was remarkably influenced by the SiGeSb heater resistance depending on the annealing temperature and the amount of antimony atoms. © 2011 Elsevier B.V. All rights reserved.
1. Introduction Programmable logic devices (PLDs) [1] such as a field-programmable gate array (FPGA) and a complex programmable logic device (CPLD) have drawn much attention due to their configurable nature after fabrication. The programmable switch, which is one of the most important elements constituting PLDs, controls the connection between a logic block and an interconnect wire as well as between two different interconnect wires. While the switch process technologies commonly used are SRAM [2], flash memory [3], and anti-fuse [4], the chalcogenidebased devices [5,6] are considered a promising candidate for the programmable switch component. The chalcogenide alloys comprising S, Se, and Te atoms have been developed as active materials in optical data storage [7] and phase change memory [8] because of their nonvolatile nature. This nonvolatility is another key advantage in PLD technology, for the configuration information required to configure the PLDs can be retained without electrical power. Moreover, the chalcogenide alloys are highly scalable and inherently hard to radiation. Thus, it is anticipated that the realization of chalcogenide-based switches will increase the cell area efficiency and the radiation hardness of the PLDs. The concept of the multiterminal programmable switch using chalcogenide alloys was proposed earlier in ref. [9], but the fabrication of the prototype devices based on sub-micron technology and the demonstration of their operation were reported recently [5,6]. The heating layer plays a very important role in chalcogenide-based memory devices: it provides the additional
⁎ Corresponding author. E-mail address: [email protected] (S.-Y. Lee). 0022-3093/$ – see front matter © 2011 Elsevier B.V. All rights reserved. doi:10.1016/j.jnoncrysol.2011.12.014
heat promoting the phase transition in chalcogenide alloys [10] or suppresses the heat dissipation through a metal line [11]. Although the performance of the chalcogenide switch may strongly depend on the heater property, similarly to the case of the chalcogenide memory, a comprehensive discussion about the heating layer in the switch device has not been given yet. Therefore, we have investigated the operation of chalcogenide programmable switches employing SiGeSb alloys as indirectly heating elements, and report here on the switch characteristics and the effect of the heater resistance on the switching behavior. 2. Experimental The switch devices were fabricated with the sequence as follows. SiO2 layers were formed on Si b100> wafers by thermal oxidation. 100 nm thick SiGeSb films were grown by co-sputtering from Si, Ge, and Sb targets, and the Sb concentrations in the SiGeSb films were changed to range from 20 to 35 atomic percent by varying sputtering power applied to the Sb target. The SiGeSb films were annealed in a reduced-pressure N2 atmosphere for 10 min, and patterned to produce the heating layers. The low resistive bottom electrodes lying under the heating layers were not included in the switch device, unlike in typical phase change memory devices [8], because applied current should be confined to the high resistive heating layers for effective indirect heating. 300 nm thick GST films and 50 nm thick tungsten films were successively deposited in the 0.5× 0.5 μm2 pores made through intermetal SiO2 layers by a sputtering method, and they were patterned using a lift-off process. The SiGeSb and GST layers were connected with tungsten metal lines through via holes. The microstructures of the SiGeSb heating layers and the fabricated switch devices were observed by SEM, and the switching behavior of
S.-Y. Lee et al. / Journal of Non-Crystalline Solids 358 (2012) 2405–2408
the switch devices was monitored using a pulse generator, a digital oscilloscope, and a semiconductor parameter analyzer. The resistances of the switch cells and the SiGeSb heating layers were monitored using a semiconductor parameter analyzer and a probe station. The measurement was repeated several times under the same conditions, and the resistance values of the mean and standard deviation were estimated. To obtain the cell resistance change in the switch devices caused by programming voltage, a voltage pulse of 1 μs width was applied through two programming terminals as a first step. A reading terminal and either of the programming terminals were connected to the semiconductor parameter analyzer and the cell resistance was measured at 0.1 V as a next step. This measurement procedure was repeated with increasing amplitude of the programming voltage pulse until reaching the maximum input voltage limit.
105 (Si0.8Ge0.2)0.8Sb0.2 (Si0.8Ge0.2)0.72Sb0.28
104
Resistance (kΩ)
2406
(Si0.8Ge0.2)0.65Sb0.35 103
102
101
100
3. Results
200
300
400
500
600
Annealing Temperature (oC)
We prepared 3 terminal switch devices of the indirect heating structure Chen et al. suggested [5], as shown in Fig. 1. Two programming terminals were formed connecting both sides of the sputter-deposited SiGeSb heating layer and tungsten metal lines through via holes. The GST layer and a tungsten metal line were linked to form the reading terminal. Since the resistivity of SiGeSb is highly dependent on the amount of Sb atoms in the SiGeSb [10], the SiGeSb heating layer is beneficial to the optimization of switch performance. Fig. 2 shows the resistances of the SiGeSb heating layers prepared with various fabrication conditions. The resistance of the (Si0.8Ge0.2)0.8Sb0.2 layers reached to 4.8 kΩ with increasing annealing temperature until 550 °C, which is compatible with the fact that the
(a)
(b)
Fig. 2. Electrical resistance changes of SiGeSb heating layers as a function of annealing temperature and Sb concentration.
activation of Sb atoms is promoted by thermal annealing. While the resistance was clearly dependent on the annealing temperature, the effect of the amount of Sb atoms on the resistance was somewhat disordered. At the annealing temperature of 525 °C, the resistance of the (Si0.8Ge0.2)0.8Sb0.2 layer was much higher than that of the others, but there was only a slight difference in resistance between the (Si0.8Ge0.2)0.72Sb0.28 and (Si0.8Ge0.2)0.65Sb0.35 layers. The surface morphologies of the (Si0.8Ge0.2)0.72Sb0.28 and (Si0.8Ge0.2)0.65Sb0.35 layers were examined and it was found that a number of voids appeared after the annealing step, as shown in Fig. 3. Three kinds of switch devices including the SiGeSb heating layers were fabricated by optimizing the annealing temperature and the Sb concentration, and the effect of the SiGeSb heater resistance on the operation of the switch devices was investigated. In the case of the heater resistance higher than 50 kΩ, the applied voltage pulse could not lead to any apparent change in the cell resistance, because the resulting current flowing through the heating layer was too tiny to heat up the chalcogenide alloy. When the heater resistance was 18.7 kΩ, the phase transition from the amorphous to the crystalline state (i.e., set transition) occurred at a high voltage of 9 V but the phase transition from the crystalline to the amorphous state (i.e., reset transition) did not even at the maximum input voltage limit for our measuring system (Fig. 4(a)). Finally, both the set and reset transitions were observed as the heater resistance decreased to 6.0 kΩ or less (Fig. 4(b) and (c)). The applied voltages at the onset of set transition were totally different between the switch devices with heater resistances of 6.0 kΩ and 5.3 kΩ, whereas those at the onset of reset transition were similar, around 7 to 8 V.
4. Discussion
W GeSbTe SiGeSb 0.5μ μm Fig. 1. (a) Schematic and (b) cross-sectional view SEM image of a chalcogenide programmable switch device employing a SiGeSb heating layer.
It was reported in the literature [10] that the resistance of the sputter-deposited SiGeSb film drastically decreased with increasing Sb concentration within a range of two orders of magnitude at the annealing temperature of 400 °C. However, the amount of Sb atoms did not affect the resistance significantly as shown in Fig. 2. The reason for the different results between this work and the previous study is attributed to the considerable loss of Sb originating from a severe Sb outdiffusion in the (Si0.8Ge0.2)0.72Sb0.28 and (Si0.8Ge0.2)0.65Sb0.35 layers at the annealing temperature of 525 °C. Sb is well known to migrate from a silicon matrix to the surface during thermal treatments [12]. In addition, it is highly probable that the outdiffused Sb atoms become vaporized at the annealing temperature close to the melting point of Sb (631 °C) in vacuum. The SEM images in Fig. 3 clearly support
S.-Y. Lee et al. / Journal of Non-Crystalline Solids 358 (2012) 2405–2408
2407
106
(a)
(a) 105
104
18.7kΩ
1μ μm 103
Cell Resistance (Ω)
(b)
1μm (c)
(b) 105
104
6.0kΩ 3
10
(c) 105
104
5.3kΩ 3
10
1μm Fig. 3. Plain view SEM images of (a) a (Si0.8Ge0.2)0.8Sb0.2 layer, (b) a (Si0.8Ge0.2)0.72Sb0.28 layer, and (c) a (Si0.8Ge0.2)0.65Sb0.35 layer annealed at 525 °C.
that the higher Sb concentration was in the SiGeSb layer, the more significantly outdiffusion and vaporization occurred. The SiGeSb heating layer plays a role in indirect heating to chalcogenide alloys in the switch device. The resistive joule heat generated from the heating layer induces the temperature rise and phase transition in the chalcogenide alloys, which is totally different from the self-heating of the chalcogenide alloys in the switch devices made in the horizontal [6] and vertical [13] configurations, caused by a current passing through the chalcogenide alloys. The indirect heating structure in our devices has an effect on suppressing the partial set arising in the horizontal and vertical structures (Fig. 5). If a reset programming is performed using two programming terminals in each switch device, the electrical signal transmission through two reading terminals will be interrupted due to the formation of a high resistive amorphous state at the center of the chalcogenide alloy. Meanwhile, the partial set, which denotes the formation of the low resistive crystalline channel not in the whole but in the part of the amorphous state, frequently takes place after the set programming. Since some of the high resistive amorphous state still remains lying across the path of the electrical signal transmission, the electrical signal cannot be easily transferred between the reading terminals. Table 1 demonstrates the partial set occurrence in the vertical structure device, where the post-programming resistance measured using two reading terminals was still high compared with the post-programming resistance measured using two programming terminals. The details of the vertical structure are under study. This incomplete crystallization results from the set programming current passing through a confined region in the amorphous state. It is known that the non-uniform current
2
4
6
8
10
Applied Voltage (V) Fig. 4. Cell resistance vs applied voltage for chalcogenide programmable switch devices employing the SiGeSb heating layers with heater resistances of (a) 18.7 kΩ, (b) 6.0 kΩ, and (c) 5.3 kΩ.
flow is closely related to the size of a parasitic capacitance and the shape of an amorphous state [14]. Very large set programming current should be applied for changing all the amorphous state into the crystalline state. Alternatively, the adoption of the indirect heating structure can be another approach to avoid the partial set problem resulting from
Fig. 5. Schematic diagrams of typical chalcogenide programmable switch devices made in (a) horizontal and (b) vertical configurations. “P” and “R” represent the programming terminal and the reading terminal, respectively.
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Table 1 Comparison of pre- and post-programming resistances for two types of switch structures.
Pre-programming resistance measured using two programming terminals (Ω) Post-programming resistance measured using two programming terminals (Ω) Pre-programming resistance measured using two reading terminals (Ω) Post-programming resistance measured using two reading terminals (Ω) Pre-programming resistance measured using a reading terminal and a programming terminal (Ω) Post-programming resistance measured using a reading terminal and a programming terminal (Ω)
the non-uniform current flow in the chalcogenide alloy. Unlike the vertical structure device, the switch device with the indirect structure exhibited very small resistance after the set programming (Table 1). Since the resistive joule heat originating from the heating layer is proportional to (applied voltage) 2/(heater resistance), a higher voltage should be applied to the switch device having a larger heater resistance for the phase transitions. However, the switch characteristics with the heater resistances of 6.0 kΩ and 5.3 kΩ were rather complicated as shown in Fig. 4(b) and (c). The higher voltage for the set transition with the heater resistance of 5.3 kΩ seems contrary to the previous consideration of the resistive joule heating, but it may result from the fact that thermal conduction facilitated through a low resistive heating layer hinders the temperature rise in the chalcogenide alloy. In general, the set transition for crystallization in chalcogenide alloys requires a longer period of time than the reset transition for melt-quenching of them [15]. Thus, it is possible that the heat dissipation through the heating layer is more effective in the set transition, compared to the reset transition. Our postulate is supported from the fact that the heater resistance affected only the set transition voltage. The set transition occurred at a much larger voltage with the heater resistance of 5.3 kΩ so that the switching voltage range for the set and reset transitions became restricted, which indicates that the heater resistance value is not adequate for the switch operation. This dependence of the switching behavior on the heater resistance implies that an optimum heater resistance should be chosen in order to program the switch device with low voltages within a wide voltage window. 5. Conclusion We fabricated 3 terminal chalcogenide programmable switches employing SiGeSb alloys as a heater material, and evaluated their switching characteristics. The SiGeSb films of various compositions were prepared by a co-sputtering method and a subsequent thermal anneal. The resistance of the SiGeSb layers was inversely proportional to the annealing temperature, but it decreased and then saturated as the Sb concentration in the SiGeSb layers increased. The plain view
Vertical structure
Indirect structure
4.61 × 105 ± 1.87 × 104 8.80 × 103 ± 1.35 × 103 4.73 × 105 ± 2.44 × 104 1.89 × 104 ± 2.03 × 103 – –
5.33 × 103 ± 1.53 × 102 5.33 × 103 ± 1.46 × 102 – – 2.03 × 105 ± 2.83 × 103 3.85 × 103 ± 5.53 × 102
SEM images of the SiGeSb layers revealed that the saturated resistance was closely related to a large number of voids produced at a high Sb concentration. The switch devices exhibited switching characteristic between high resistive and low resistive states, and the resistance of the SiGeSb heating layer strongly affected the switch operation. It is concluded from these results that the performance of the switch devices can be improved by tuning the manufacturing process of the SiGeSb heater.
Acknowledgments This research was supported by Basic Science Research Program through the National Research Foundation of Korea funded by the Ministry of Education, Science and Technology 2011-0005620.
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