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Characterization procedures for double-sided silicon microstrip detectors
& *H__
Nuclear Instruments
and Methods in Physics Research A 362 (1995) 315-337
__ l!iB
NUCLEAR INSTRUMENTS (LMEmoDS IN PHYSICS RESEARCH Sectlor A
ELSEVIER
Characterization procedures for double-sided silicon microstrip detectors N.L. Bruner
*,
M.A. Frautschi, M.R. Hoeferkamp,
S.C. Seidel
The New Mexico Center for Particle Physics, Uniuersity of New Mexico, Albuquerque, NM 87131, USA Received 23 January
1995
Abstract Since double-sided silicon microstrip detectors are still evolving technologically and are not yet commercially available, they require extensive electrical evaluation by the user to ensure they were manufactured to specifications. In addition, measurements must be performed to determine detector operating conditions. Procedures for measuring the following quantities are described: - Leakage current, - Depletion voltage, - Bias resistance, - Interstrip resistance, - Coupling capacitance, - Coupling capacitor breakdown voltage.
1. Introduction Since double-sided silicon microstrip detectors are still evolving technologically and are not yet commercially available, they require extensive electrical evaluation by the user to ensure they were manufactured to specifications. In addition, measurements must be performed on each detector to determine the required operating conditions. One of these measurements, bulk capacitance versus applied bias voltage, determines the depletion voltage, which determines the operating voltage. Another measurement, leakage current versus applied voltage, checks the current levels for compliance with power requirements. Both measurements are useful in determining the extent of damage to the detectors after irradiation ‘. Some of the detector parameters that are specified to the manufacturer and must be monitored for compliance are - bias resistance, - coupling capacitance, - interstrip resistance, - coupling capacitor breakdown
voltage.
* Corresponding author. Tel. + 1 505 277 2616, fax + 1 505 277 1520, e-mail [email protected]. ’ Further information on radiation damage may be found in Ref. [l-3]. 016%9002/95/$09.50 0 1995 Elsevier Science B.V. All rights reserved SSDI 016%9002(95)00280-4
The definition and importance of each will be discussed in turn. Bias resistance: Bias resistance is the resistance between the implant strips and the voltage source that biases the detector. This is not the effective resistance of the p+ and n+ implant strips themselves but an additional resistance, orders of magnitude greater than the implant strip resistance 2. This bias resistance may be achieved with implanted polycrystalline silicon, or polysilicon. It is particularly interesting because it is a relatively new technology and the measurements are needed to monitor the manufacturer’s consistency. It is significant because it acts as a current limiter which provides some measure of protection against shorts in the detector. Coupling capacitance: For the SVX II detectors, those strips that are read out will be capacip+ and ni implant ’ tively coupled to aluminum readout strips that lie directly over them. These aluminum readout strips are referred to as AC strips. The capacitance between each implant strip and its respective aluminum readout strip is called coupling capacitance. This coupling isolates the electronics from damaging bias voltage and current levels. It should be maximized to reduce the effects of parasitics, namely the interstrip and bulk capacitances.
2
Typical implant strip resistance is 90 k 0 /cm while specified bias resistance for SVX II is 2 f 1 Ma. The SVX II detector is an upgrade in development for CDF at the Fermi National Acceleratar Laboratory.
316
N.L. Bruner et al./Nucl.
Instr. and Meth. in Phys. Res. A 362 (19%) 315-337
p+
implant strips
84,600 or 44,900 microns
Fig. 1. Cross section of the SINTEF/SI
Inter-strip resistance: Interstrip resistance is the effective resistance between implant strips. This resistance should be maximized to maintain channel isolation. Coupling capacitor breakdown voltage: The coupling capacitor breakdown voltage is the maximum potential difference the dielectric material between the implant strip and the AC strip can tolerate. Coupling capacitors must tolerate the higher operating voltages needed to deplete irradiated detectors. Detector manufacturers may not test all finished products for compliance with all specifications. In some cases they perform measurements on test structures. In other cases batches are characterized by a few individual detectors. Some parameters are inferred. It is the responsibility of the user to perform quality control tests to validate each detector before it is used.
2. The double-sided detector with capacitively coupled
readout The tested detectors are SVX II prototypes manufactured by SINTEF/SI 3 to be used in the CDF experiment at Fermi National Accelerator Laboratory. Eight different prototype geometries were produced for testing; all are double-sided, half with double-metal [4] readout on the n-side, half without. The n-side implant strips are orthogonal to the p-side implant strips. Fig. 1 shows the orientation of the implant strips. The eight different prototype detectors differ in their dimensions, the number and pitch of readout strips, the inclusion of intermediate 4 strips, and the inclusion of a double-metal layer. An aluminum strip,
3 SINTEF/SI,
P.O. Box 124 Blindern, N-0314 Oslo, Norway. 4 Intermediate strips are implant strips that are not capacitively coupled to metal read out strips. They improve the shape of the electric field in the bulk and improve resolution without increasing the number of readout channels [5].
detector.
called the bias trace or strip, traces the perimeter of the implant strips on both sides. It is to this strip that the bias voltage is applied. Each implant strip is connected to the bias trace through a polysilicon bias resistor. To fit all the structures on the detector, bias resistors are placed at opposite ends of alternate strips. To allow biasing of alternate strips independently, the bias trace on both sides was manufactured with breaks in two places. The implant strips that are read out are capacitively coupled to aluminum (AC) strips which lie directly over them. The AC strips have pads at both ends at which they may be probed or wire bonded. In double-metal detectors, shown in Fig. 2, each AC strip is connected to an orthogonal aluminum strip (parallel to the p-side strips) which lies above it and has bonding pads on either end. The first and second set of aluminum strips are connected by vias through an insulator. This additional layer of metal strips allows both the p and n-sides to be connected to read out electronics on the same edge of the detector. Both sides of the detector have an implant which may be contacted by an aluminum trace that is not directly connected to any of the other structures on the surface of the detector. These are the guard rings. Each is biased at the same potential as the bias trace on that side. Guard rings shape the electric field near the edge of the detector and shield the inner structures on the detector from edge currents. On each channel, the node between the implant strip and its polysiiicon bias resistor is connected to an aluminum readout pad that may be contacted at the surface of the detector. These aluminum pads are referred to as DC pads. Fig, 3 shows all the structures of the double-metal detector mentioned except the vias connecting the two layers of metal on the n-side. The only points at which the detector may be contacted are the bias traces, guard ring pads, DC pads and bonding pads on the AC strips. To reverse bias the silicon p-n junctions of the test detectors, we choose to apply a positive potential to the
N.L. Bruner et al./Nucl.
Instr. and Meth. in Phys. Res. A 362 (1995) 315-337
317
AC
bolysilicon Fig. 2. N-side double-metal
bias and guard traces on the n-side and connect these traces on the p-side to ground. The operational potential is determined by adding 20 V to the measured depletion voltage of the detector. Overvoltage of the detectors is needed because of the finite coverage of the surface of the detector by the implants and traces. It also maintains an electric field of sufficient strength that charge in the detector has a short drift time. Ambient temperature and humidity affect the magnitude of current through the bulk, so they are recorded prior to each measurement. A more detailed account of the operation of silicon detectors can be found in Ref. [4].
3. Criteria for an established procedure Acceptance of a procedure requires the following: - If the implanted structures of the detector are to be measured, the detector/measurement setup is modeled using an electrical simulation (SPICE) 5. Since some detector parameters cannot be directly measured, the simulation helps provide a means of inferring these parameters using those that can be measured. - During a trial measurement, the currents in the circuit are checked at various points to ensure there is no discrepancy with expected values. - Measurements are repeated to check consistency. - If possible, more than one setup is devised for a measurement to cross-check measured values.
-T----See, for example,
Fig. 10.
bias resistor
readout structure.
- Measured values are compared with the manufacturer’s supplied values (where possible).
4. Equipment list The following equipment quality control measurements
is necessary to perform the specified in this document:
1) Light proof enclosure. 2) Probe station. 3) Micropositioners to which probe tips are mounted and with which they are maneuvered. 4) Precision LCR meter. 5) High voltage supply with integrated current meter ‘. 6) Voltage source sufficient to fully deplete the detector (N 100 V). 7) Digital multimeter for measuring current and voltage. 8) Conductive rubber or fixture for probing underside of detectors [6]. Current meters must have nanoamp precision. The capacitance meter must be precise to 0.1 pF. For all measurements, the equipment is controlled and data recorded by a Macintosh computer using an IEEE488 interface.
6 If only non-destructive tests will be performed, the power source need only supply up to 150 V; however, coupling capacitor breakdown tests may require over 300 V.
N.L. Bruner et al. /Nucl. Instr. and Meth. in Phys. Res. A 362 (19951315-337
318
Si (n type material)
bonding pad Fig. 3. Side view of the SNIFF/S1
5. Leakage current Leakage current is measured as a function of bias voltage applied across the detector. This measurement on a double-sided detector requires probing of both the p-side and the n-side of a detector simultaneously without permanently mounting the detector. A probing fixture [6] was designed to land probe tips on the bias and guard strips on the back side of a detector while the other side remains free to be probed in the usual manner. An alternate method is to place the detector on a noncorrosive, nonabrasive conductive material, such as conductive rubber ’ and apply the bias to that material. The measurement procedure is as follows:
1) Place probing fixture probes on the n-side bias trace and guard ring and connect both probes to a positive biasing potential. 2) Place a probe on the p-side bias trace and ground that probe through a current meter. (Two probes must be used for bias traces that exist as two halves.) 3) Place a probe on the p-side guard ring and connect it to ground. (The guard ring current may also be measured.) 4) Step bias voltage from 0 V to the depletion voltage plus the appropriate overvoltage (_ 20 V for the test detectors). The setup, Figs. 4 and 5, shows a Keithley 617 electrometer measuring current and a Keithley 237 High Voltage Source Measure Unit applying the bias voltage.
For a detailed presentation of the results for the SVX II SINTEF/SI prototypes for this and al1 subsequent measurements see Ref. [7].
6. Depletion voltage Silicon microstrip detectors require a reverse bias potential to create a region free of mobile carriers between the p and n-sides. This region is called the depletion layer. Depletion voltage is the bias voltage that extends the depletion layer the entire depth of the detector. This allows the charge liberated by an ionizing particle to be rapidly collected. As discussed in Section 2, operating voltage is at least 20 V above depletion voltage. With this as a lower limit for the operating voltage, the additional constraints of high voltage breakdown, power consumption, heating, and noise set an upper limit. Therefore, it is important to determine depletion voltage accurately to keep the operating voltage as low as possible. The following is a technique to identify the onset of full depletion. This technique is based on a model of the detector as a parallel plate capacitor. The bulk capacitance per unit area of a reverse biased detector, C, is related to the depth of the depletion layer, d, by C = +/d,
Such rubber
Court, Wobum,
may be obtained MA 01888.
from Chomerics,
77 Dragon
(1)
where eSi is the permittivity of the bulk silicon. The applied bias potential, Vbias, and the depth of the depletion layer are related by Vbias
7
detector.
=
4
d2
1Neffective (/YES 7
(2)
where 4 is the electronic charge and Nerrective is the effective charge carrier density, the number of (negative) donors minus the number of (positive) acceptors [8].
N.L. Bruner et al. / Nucl. Instr. and Meth. in Phys. Res. A 362 (I 995) 315-337
.-_-_____-_-___---_-.-------
Current meter eithley rmc
*‘Li t Proof Enclosure/ ~~__,;~~_~;~~~~~------------------_ I
617 1.-’
Fig. 4. Meter configuration
for the leakage current measurement
The depletion voltage, V+,, is extracted from a plot of log{C,,,} versus log{V,,,). Below Vdepl this curve obeys a power-law, a V”, as may be seen by inserting Eq. (2) into Eq. (1). The capacitance is a constant for Vbias > V,,,, since there is no additional region to deplete of carriers remaining in the bulk silicon. The capacitance per unit area is given by c
J4 I 'Si
=
i
Neffective ESi/ddepl
319
1/2vths
for
'bias s Vdepl7
for Vbias>bepI (3)
where ddep, is the full depletion depth of the device.
setup.
The point of inflection in a log{C,,,} - log{Vbia,} curve results from the transition from the upper line to the lower line in Eq. (3) and thereby defines the depletion voltage. Vdep, is located at the intersection point of a straight-line fit of the power-law region and a horizontal line through the curve’s minimum value, as shown in Fig. 6. In the case of a planar diode with planar electrodes, the parallel plate capacitor model is a good approximation. Silicon microstrip detectors, resembling diodes with segmented electrodes, have periodic nonuniformities in the electric field around the n+ and p+ implants which result in small regions that require larger biasing voltages to deplete. The size of this additional voltage is a function of
Fig. 5. P-side probe placement for the leakage current measurement.
320
N.L. Bruner et al. /Nucl. Instr. and Meth. in Phys. Res. A 362 (1995) 315-337
1
10 Bias potential
(V)
Idpe3&
100
Fig. 6. Bulk capacitance versus bias voltage.
LCR meter
,“Lipht Proof Enclosure/
Current meter
Pig. 7. Meter configuration for the depletion voltage measurement. The isolation box is illustrated in Fig. 9.
the geometry of the implant strips, specifically their widthto-pitch ratio [9]. Figs. 7 and 8 show the measurement setup. A Hewlett/Packard 4284A precision LCR meter, bias voltage protection network (to shield the inputs of the LCR meter from bias potentials > +42 V; see Fig. 9) and low parasitic capacitance probes are used (lo]. The LCR meter is connected to, and DC isolated from, the probes via the protection network. This network also distributes Vbias
through the probes. follows 8.
The measurement
procedure
is as
1) Place probing fixture probes on the n-side bias trace and guard ring and connect both probes to the
8
Detailed procedures for the specific instruments used during the test measurements are found in Ref. [lo].
N.L. Bruner et al. /Nucl. Instr. and Meth. in Phys. Rex A 362 (1995) 315-337
321
Fig. 8. P-side probe placement for the depletion voltage measurement
positive terminal on the isolation box, which supplies the biasing potential. 2) Place one probe on the p-side bias trace and one probe on the guard ring. Connect these two probes to the low voltage terminal of the isolation box. 3) Step bias voltage from 0 V to a voltage greater than the expected depletion voltage.
7. Bias resistance For this and all subsequent measurements, the detector must first be fully depleted with the guard rings at the same potentials as their respective bias traces. The detector must be measured with its electric field structure exactly as it will be during operation.
vbias
Fig. 9 DC bias voltage protection network (“isolation
shown between the LCR meter and the probes in Fig. 7. A cast aluminum terms the indicated ground plane. L,, L,, H, and H, are the low and high current and potential inputs to the LCR meter. C, is the capacitance under test. Vbias5 200 V. Switch S, serves to bypass capacitor C,. For the meaaurements described in this document, S, remains closed. This network is based on Figure 5-62 of Ref. [ll]. Table 1 lists the component values. (The configuration shown is for bulk C-V measurements, when the detector is biased through the probes connected to the LCR meter. For localized measurements, for example coupling capacitance, the detector is not biased through the LCR meter probes, and V,,,,, C, and the 1 kR resistor are omitted. The LCR meter’s signal return must be isolated from the power supply return to prevent AC signal loss and falsely low capacitance readings.) enclosure
box”)
N.L. Bruner et al. / Nucl. Instr. and Meth. in Phys. Rex A 362 (1995) 315-337
322 Table 1 Isolation box components.
See Fig. 9 for a schematic
Part
Description
Cl CZ
Metalized polypropylene Metalized polypropylene Metalized polypropylene Metalized polypropylene Zener diode
c3 C4 ZD,,z ZD3
D 5.6 S,
4
diagram
capacitor capacitor capacitor capacitor
Zener diode power diode Single pole single throw switch a
a Switch S, serves to bypass capacitor
Value
Unit
Tolerance
Rating
20 1 20 30 47 3.3 200
I*F PF @ PF V V V
20% 20% 20% 20% 5% 5%
2oov 2oov 2oov 2oov 1w 1w 1A 250 v
C,. For the measurements
Measuring bias resistance is challenging because each polysilicon resistor is both part of a network and embedded in silicon. Measuring resistance directly with an ohmmeter does not work because of the way these meters operate. Ohmmeters measure resistance by providing a test current and measuring the corresponding voltage drop. The leakage current maintained through each strip during normal operation interferes with this test current. Current and voltmeters are used to avoid this problem, but they demand greater understanding of how the detector functions. An electrical simulation was used to better understand the surface structures of a detector. Figure 10 shows the model used to simulate the p-side. The parameter values inserted in the model are based on expected values and were revised after confirmation by measurement. The capacitors are included for completeness. but have no effect on DC measurements. The model
effective
strip
described
in this document,
S, remained closed.
was used to explore relationships between various parameters, including the relationship between bias resistance and the measurable parameters. The various parameters are: 1) istrip: implant strip current, 2) rinterstrip:current between a pair of adjacent implant strips, 3) imeasured:current measured at the DC pad, 4) VHpplicd:voltage applied to the DC pad, 5) vintcrstrip: voltage drop between a pair of adjacent implant strips, 6) Rbias: bias resistance. 7) Rinterstrip’ interstrip resistance. may be measured directly. Fig. Only Applied and kasured 11 shows the model used to simulate a bias resistor measurement circuit. The model was implemented in sev-
resistance interstrip resistance 4.8~
ZOOMEG
Tl.lMEG bios resistor ml
1 .OMEG
?
points at which detector is probed
4 11 .OMEG bias
resistor 0
bias
,I
resistor
1 1 .OMEG 0 +
biasing
power
supply
Fig. 10. SPICE model of the DC components
on the p-side of a detector.
373
N.L. Bruner et al. / Nucl. Instr. and Meth. in Phys. Res. A 362 (1995) 315-337 effective
strip
bias
resistance
resistor
473K
*
+ 1 1 .OMEG
biasing
power
”
suppI,.
Fig. 11. SPICE model of the p-side bias resistor measurement
era1 versions including ones with uniform and nonuniform bias resistance. Fig. 12 shows the currents at the node between the bias resistor and implant strip during measurement. The values of the parameters are positive in the directions indicated in Fig. 1!2 for the case Vapplied< istripRbias. For Vapplied> ‘sttipRbias2 iinterstripis negative. The voltage drop between a pair of adjacent strips depends upon the voltage applied to the DC pad of one strip and the normal potential level of its neighbor. The normal potential of an implant strip is given by the voltage drop across its bias resistor, such that (q
The current between potentials is
0
circuit.
a pair of adjacent strips at different
= ( istnpR hias-
Vapplied
1 /Rinterstrip.
(5)
The interstrip current affects the current measured by the meter al the DC pad in the following way: II Y
Lasured= -
applied + 2iinterstrip+
istrip
Rbias
Fig. 12. Currents at the DC pad of the resistor under test in the p-side bias resistor measurement.
(6)
324
N.L. Bruner et al. /Nucl. Instr. and Meth. in Phys. Res. A 362 (1995) 315-337
c._.__________-_-___--______---
Current meter/Power supply
+ -
+...
M?7wfeT *
!
J
I
.l’/iight Proof Enclosure/ f.____=_-_-_-_--____-_-_-----____-I I robe St_______________~ , r
8OV dc
Keithley 617
I
!
,
to bias trace
I
Detector
Fig. 13. Meter configuration for the p-side bias resistor measurement.
The change in measured current is hi
Rearranging
*V,pplied
‘Vapplied
measured =
+
-
2*iimrstrip
+
(7)
* istrip
Rbias
=
-
Rhias
=
Eq. (lo), bias resistance
- *Yapplied *Kpptied *istripRbias
-p+2
+ *
Rbias
istrip
(8)
Rinteislrip
For constant strip current, Eq. (7) becomes Ai measured
*Applied =
-
~
Bias 1
-+p Rbias
-
?P*Kpp,ied
bRintersttip 2
1
Rinterstrip
(9) (10)
Ai measured
+
is
(11)
2*Kpp~ied/Rintersttiip
For very
large interstrip resistance, bias resistance is - *Kpptied/*imeasured. The minus sign does not lead to a negative resistance because as Vapplied increases, z,,,,,,,~ decreases. For a bias resistance to interstrip resistance ratio as large as 5%, the error in the approximation is around lo%, based on simulated data. This may be improved by inserting an estimation of Rinterstripinto Eq. (11). The error may then be reduced to around 1% if the interstrip resistance is estimated with 10% accuracy. As will be discussed in Section 8, Rinfemtripmay be calculated from Rbias (once
Fig. 14. Probe placement for the p-side bias resistor measurement.
N.L. Bruner et al. /Nucl. Ins@. and hfeth. in Phys. Res. A 362 (1995) 315-337
it is known), and this value may then be substituted back into Eq. (11). Two similar methods for measuring bias resistance on the p-side were devised and tested. The method presented is based on the previous calculations. 7.1. p-side bias resistor measurement The bias resistance measurement involves applying a small change in voltage (between -0.5 V and 0.5 V> across only one bias resistor on the p-side of the detector. The change in current through that resistor is recorded as a function of the change in voltage applied across it. The sign of the measured current must be recorded as it will is stepped from a value less than the switch when Vapapplied voltage drop across the resistor, istripRbias, to a value that is greater. The measurement procedure is as follows: 1) Place probing fixture probes on the n-side bias trace and guard ring and connect both probes to a positive biasing potential. (In Fig. 13, bias is supplied by an integrated voltage source on the Keithley 617.) 2) Place a probe on the p-side bias trace and ground that probe through a current meter. (The leakage current may be measured from the p-side bias trace probe as a check that the detector is operating normally.) 3) Place a probe on the p-side guard ring and connect it to ground. 41 Place a probe on the DC pad of one implant strip. Connect this probe to an integrated power supply/current meter so that as it applies a small
Detector:
S7-$6
it also measures the current through voltage,Kppliedt that strip. 5) Step Vappliedby increments of 0.1 V from -0.5 V to 0.5 V and record the leakage current and the current measured at the DC pad. The measurement setup is shown in Figs. 13 and 14. The bias resistance is - AVapplied/Aimeasured to a first approximation, and may be plotted for varying values of Vapplied. Fig. 15 shows bias resistance data for a range of VIpplied using a typical test detector. A second measurement method was developed which requires two setups to measure first the current through one bias resistor due only to the biasing potential, then the voltage drop across that same resistor, keeping the bias potential constant. Since it is not possible to correct for finite interstrip resistance with this method, it is not presented. Not correcting for finite interstrip resistance, the determined resistances from the two methods agree to within 1%. which is not surprising since they share systematic errors. As an additional check, destructive tests were performed in which bias resistors were physically isolated and measured. This procedure has an independent set of systematic errors from the nondestructive methods described above. Individual bias resistors on both the n and p-sides of the test detectors were electrically isolated from the network by severing the bias trace to either side of one resistor, and in the case of the n-side, from both ends of the resistor. The detector remained unbiased and electrically isolated from its surroundings in both measurements. The resistors could be measured conventionally with an ohmmeter because the test current from the meter passes
0.6 Bias resistance
.
is given by slope.
. -0.6
-
current
325
(nanoamps)
for a typical detector (p-side) Fig. 15.l/Hpplled versusimeasured
326
N.L. Bruner et al./Nucl.
Instr. and Meth. in Phys. Res. A 362 (1995) 315-337 effective
strip
resistance ~_ __ _.._t_ interstrip capacitance
1
L.Bp O~qI/IJ
w 473k
1MEG
LA p-n
junction
1
0-m
1MEG
::
T4.Bp
ZOOMeg m 473k
1/1 i
offsetting vpltage applied at CC pod
ZOOMeg
0
Aw ‘MEG
,b
VVv 1 MEG
4.8p m
4.8p
+ e
7ov biasing
i/l 473k \
power
b
supply
0
Fig. 16. SPICE model of the n-side bias resistor measurement circuit.
only through the resistor under test. The range of measured values agrees with the nondestructive measurements for these particular test detectors. 9
7.2. n-side bias resistor measurement The n-side bias resistance measurement differs from the p-side measurement in the voltage applied to the DC pad. Since the n-side is the side to which bias is applied, the voltage applied to the DC pad is within f0.5 V of the operating voltage. The values typically used are 79.5-80.5 V stepped in increments of 0.1 V for an operating voltage of 80 V. Fig. 16 shows the model of the n-side bias resistor measurement. Currents at the node between the implant strip and its bias resistor are labeled in Fig. 17. (For Ifapplied > (Vbias- istripRbias),iinterstripis positive in the direction indicated in Fig. 17. The direction of bias resistor current is valid for Ifapplied< Vbias.)
The voltage drop between a pair of adjacent strips is Ynterstrip = Vapptied - ( ‘bias - istripRbias)
.
(12)
The current between a pair of adjacent strips is (13)
iinterstrip= Vinterstrip/Rinrerstrip = ( Vapptied- (
Vbias
-
isttipRbias ) ) /Rinterstrip .
(14)
This contributes to the current measured by the integrated power supply/current meter in the following way: ‘bias 1 measured
=
istrip
+
2 iintewrip
-
tpplied
(15)
Rbias
xn-destructive test for the p-side yielded 11.44 +O.O2f 0.08 Ma. Tire destructive measurement for the p-side yielded Rgias= 12.0+0.2+ 1.4 MR and for the n-side, Rtias = 12.1 k0.2 * 1.4 Ma. For the destructive measurements, the statistical errors were estimated from sampling 4 p-side and 2 n-side bias resistors. Since the p-side bias resistors could not be completely isolated, the systematic error was estimated based on a measurement of the bias resistance on the n-side as a function of applied bias voltage. This contribution is assumed to dominate, and to stem from coupling of currents in the bulk to the polysilicon resistor under test.
Fig. 17. Currents at the DC pad of the resistor under test during the n-side bias resistor measurement.
N.L. Bruner et al. /Nucl. Instr. and Meth. in Phys. Res. A 362 (1995) 315-337
327
shiest_-_-_---_-_-_---_-_-_-____--------__.
Fig. 18. Meter configuration
for the n-side bias resistor measurement.
The change in measured current, for constant istrip and Vl&s, is
AVappied
Ai measured
=
2A
i interstrip
+
(16)
7 bias
‘Applied =-++-
*V,pplied Rinterstrip
R bias
(17)
.
Rearranging Eq. (17), n-side bias resistance is * Rbias
v.pPlied (18)
=
hi
measured
-2-
*%pphed Rinterstrip
Note that due to the directional convention defined in Fig. 17, an increase in AVappliedcorresponds to an increase in Ai measured’ The measurement procedure is as follows: 1) Place probing fixture probes on the p-side bias trace and guard ring. Connect the bias trace to a current meter and connect the guard ring to ground. 2) Place a probe on the n-side bias trace and a probe on the n-side guard ring and connect the probes to a positive biasing potential. 3) Place a probe on the DC pad of one n-side implant strip. Connect this probe to an integrated power supply/current meter so that as the power supply
AC
olysilicon bias resistor
Fig. 19. Probe placement for the n-side bias resistor measurement.
328
N.L. Bruner et al. /Nucl. Instr. and Meth. in Phys. Rex A 362 (1995) 31.5-337 sumes that the detector is uniform: i.e., all implant strip currents, interstrip currents, and bias resistors are about equal. Fig. 20 shows the model of this measurement circuit. Fig. 21 shows the individual currents for a pair of adjacent strips. From the model, the parameters that can be measured directly are:
appbes a small voltage, Vapplied,it also measures the current through that strip. 41 Step Vappliedfrom V~~rarins- 0.5 V to Voperatins+ 0.5 V in increments of 0.1 V. 5) Record the leakage current and the current measured at the DC pad. The measurement
setup is shown in Figs. 18 and 19. 11 i,: the current through an individual p-side bias resistor on the side of the bias trace to which the higher voltage is being applied, corresponding to a smaller potential difference to the n-side and a lower leakage current. 2) i,,: the current through an individual p-side bias resistor on the side of the bias trace to which the lower voltage is being applied, corresponding to a larger potential difference to the n-side and a higher leakage current. 3) i $+,: the average current through an individual p-side implant strip when both halves of the bias trace are at the same potential. This can be measured directly or calculated from i, and i,. the potentials ap41 AV,,,i,d: the difference betieen plied to the two halves of the bias trace, represented by “off-setting power supply” in Fig. 20.
8. Interstrip resistance The electrical model of the detector, Fig. 10, was used to determine the best way to calculate interstrip resistance from measurable parameters. This measurement, suggested by SINTEF/SI, determines the average interstrip resistance. Because non-uniformity among the implant strips affects this measurement, a method to compensate for this is described. The effect of shorted implant strips on this measurement is discussed.
8.1. p-side interstrip resistance measurement To determine an average value of interstrip resistance, bias alternate strips at slightly different potentials and measure the corresponding change in currents. To bias alternate strips differently, there must be two breaks in the bias trace so that alternate strips are isolated. This method requires a known average value for the bias resistors. (Bias resistor values vary slightly from implant strip to implant strip. Manufacturers quote a percent variation of the value across one detector and a percent variation for a given batch of detectors.) The model for this measurement aseffective
strip
The following rameters:
resistance
bias resistor
APA
AAA
interstrip resistance
interstrip copocitonce-nnn 4.80-
T
ZOOMEG
1 1 .OMEG points o which detector is probed
AAh 11.2MEG
200MEG
, AhA
t
473k Abl? 473k
“^vz’
t
1 1 .OMEG
200MEG 4.8~1
fiAh I
1
1 l.lMEG
ZOOMEG
~.BPT A
from measured
pa-
1) Rbias: bias resistance. 2, Vintentrip:the voltage drop between a pair of adjacent implant strips.
473k.
I
must be calculated
1
473k
off-setting power supply
n
“V”
-4,
11 .OMEG
*0
Fig. 20. SPICE model of the p-side interstrip resistance
measurement
circuit.
N.L. Bruner et al. / Nucl. Instr. and Meth. in Phys. Rex A 362 (1995) 315-337
329
i, bias
resistor
Vapplied L
bias
Fig. 21. Conventions
resistor
chosen for the SPICE model of the p-side interstrip resistance measurement
3, iinterstrip:
the current flowing between two adjacent implant strips. the resistance between two adjacent im4, Rinterstrip: plant strips.
circuit.
The voltage drop between adjacent strips is calculated from the applied potential difference and the voltage drops across the bias resistors, Vinterstrip= At&plied + itRbias - rhRbias.
The individual strip currents, i, and i,, are calculated by measuring the leakage current from their respective halves of the bias trace and dividing by the number of strips measured. If the individual implant strip current (without a potential difference between the two halves of the bias trace) is not measured directly, it may be determined using i
stnp=-
(21)
Eqs. (20) and (21) give the interstrip resistance:
=4x
(i,-ih)R,ias+A”
i, + i,
apphcd i,
(19)
2 ’ where it is assumed that the current divides evenly between adjacent implant strips. Referring to Fig, 21, interstrip current may be calculated, with and without measuring iStrip, as follows:
The measurement
-
i,
procedure is as follows:
1) Ensure that the two halves of the p-side bias trace are not connected. 2) Place probing fixture probes on the n-side bias trace and guard ring and connect both probes to a positive biasing potential.
(20) Current meter/ Power supply Sq V dc( eithley 617
/‘Lie;ht Proof Enclosure/ c__________--__;-___-_-_--___-_-__ -8 I Probe Station ___._______.__~
; ;
a 3
bias trace to half ofthe strips
/ ;
Det :&or
j
hi
1 Current meter
, b
shield
; !Ll?&7+arddng____._____ ;
Fig. 22. Meter configuration for the p-side interstrip resistance measurement.
330
N.L. Bruner et al. / Nucl. Instr. and Meth. in Phys. Rex A 362 (I 995) 315-337
Fig. 23. Probe placement for the p-side interstrip resistance measurement.
3) Place a probe on the p-side guard ring and connect it to ground. 4) Place a probe on each half of the p-side bias trace. 5) If there is an odd number of implant strips on the p-side, record which probe is contacted to the half with the additional strip. and 6) Ground one probe through the electrometer measure the current through those strips. 7) Connect the other probe to an integrated power supply/current meter so that as it applies a small voltage to half of the p-side implant strips, AVat,+,, it also measures the current through these strips.
damaged implant strips. For detectors with non-uniform implant strips, the previous measurement may be revised to compensate for this. We assume that whatever the damage to the detector, the response to a potential difference between the two halves of the bias trace will be proportional only to the interstrip and bias resistances. The interstrip resistance may be determined from the change in measured currents, 6i, and 6i,, and the change in the voltage applied to one half of the bias trace, AV&, ,ied, keeping the other voltage level constant. From Eq. Q22), R intcrstrip may be written
The specific values of AVaappliedused are between -0.5 V and 0.5 V. Figs. 22 and 23 show the measurement setup. When measuring the leakage current through the two halves of the bias trace on the p-side, the values should be the same unless there is an odd number of strips (i, = i, when Vapplied= 0). In that case the values should differ by a single strip current. This can serve as a quick check for
i sttfp
The measurement procedure for detectors with non-uniform strips is the same as that listed above except that in the last step the voltage applied to one half of the bias trace is stepped in 0.05 V increments from -0.5 V to 0.5 V.
I
I
lh
\ / bias
V applled
reslstor
Fig. 24. Two shorted implant strips in the p-side interstrip resistance measurement.
N.L. Bruner et al./Nucl.
8.2. Effect of shorted resistance measurement
implant
strips
Instr. and Meth. in Phys. Res. A 362 (1995) 315-337
on the interstrip
If all the bias resistors on a detector have the same value then there will be no potential difference between strips and, consequently, no interstrip current. However, the bias resistors do have slightly different values. We consider here two neighboring strips with bias resistances Rbias and Rbias. Their interstrip current may be calculated using istrip(Rbias iimmrip
-
RLias)
(24)
=
Rinterstrip
which is similar to Eq. (5) with Vapplied= 0. When two implant strips are shorted, they are at the same potential and the current divides between them to make the voltage drops across their bias resistors equal. When there is an applied voltage difference between two shorted strips, as in the interstrip resistance measurement, the currents through the bias resistors, i’, and i’,,, of the two strips shown in Fig. 24 are i; =
V’ -
tpplied
(25) Rbias
331
This compares with Eq. (21) with Vinterstrip= 0 and AVapplied= Vapplied- 0. The change in current for two shorted strips is i,
_
ib z
i; -
‘Applied i, zz ___ ‘Bias
amount is added to the current of a strip with bias trace at ground; it is subtracted from the current of a strip with bias trace at Vapplied. In the previous interstrip resistance measurement procedure, the current meters record the total current contributed by half of the implant strips. The values change according to Equation 28 for each shorted strip. For example, if this interstrip measurement were performed on a detector with 11 MSZ bias resistors and AVapplied= 0.1 V, Ai,,,, would equal 4.54 ~4. This effect is insignificant compared to a leakage current on the order of 10 WA or larger and a ratio of shorted strips to total strips of l/640. As the shortedstrips-to-total-strips ratio becomes larger this measurement procedure will yield less accurate results. Fig. 25 shows a plot of the number of shorted strips versus measured interstrip resistance for a (modeled) 70 strip detector. The simulated data for this plot were generated using SPICE. This
and V-0 -’ = -
‘h
Bias
(26)
’
where V’ is the voltage at the node of the implant strips and their resistors. Eliminating V’ from Eqs. (25) and (26) yields i’,Rbi, = ii Bias + ypplied.
(27)
1CKLCIl
1m.cJJ
8.3. N-side interstrip resistance measurement The procedure is identical to the p-side method described. The setup differs in that the voltages to the n-side bias traces are Vbias to one half and Vbias f 0.5 to the other. As with the p-side version of this procedure, the
14o.m
16o.m
18C.u)
Inter&rip resistance (Megaohms) Fig. 25. Calculated
interstrip resistance versus # of shorted strips (Actual interstrip resistance of model is 200 MO).
N.L. Bruner et al. /Nucl. Instr. and Meth. in Phys. Res. A 362 (1995) 315-337
332
;
._._-_-_-_._._-______-._.__-__._.~
~~i~l~l--~___--____------_-_---___---___-_t-
-L =
Fig. 26. Meter configuration for the n-side interstrip resistance measurement.
interstrip resistance is determined from the change measured current as the AVapplied is changed.
Rintewrip =
(f% -
f%)Rbias
4 ’
-
%,-hi,
in
AV,‘pplied
’
(29
where the nomenclature is the same as for Eq. (23). The measurement procedure is as follows:
1) Ensure that the two halves of the n-side bias trace are not connected.
AC
2) Place probing fixture probes on the p-side bias trace and guard ring and connect both probes to ground. 3) Place a probe on the n-side guard ring and connect it to a power supply operating at Vbias. 4) Place a probe on each half of the n-side bias trace. 5) If there is an odd number of implant strips on the n-side, record which probe contacts the half with the additional strip. 6) Connect one probe to a power supply operating at Vbias. This power supply current must be measured. 7) Connect the other probe to an integrated power supply/current meter so that as it applies Vbias + 0.5
C
Fig. 27. Probe placement
for the n-side interstrip resistance measurement.
N.L. Bruner et al. /Nucl. Instr. and Meth. in Phys. Res. A 362 (1995) 315-337
I
LCR meter
Fig. 28. P-side coupling capacitance
measurement
setup. The isolation box is illustrated in Fig. 9.
Fig. 29. Probe placement for the p-side coupling capacitance
V to half of the n-side implant strips, it also measures the current through these strips. 8) Step AV,r,ri,d from Vbias- 0.5 V to Vbias + 0.5 V. The measurement
333
setup is shown in Figs. 26 and 27.
9. Coupling capacitance The coupling capacitor between the AC metal readout strip and the implant strip isolates the bias voltage and leakage currents from the front-end of the readout chip. This capacitor couples the charge in the implant strip to the readout chip. This capacitance is also a component of
measurement
the total capacitance with respect to ground seen by the front-end chip and therefore affects the equivalent noise charge of the chip. Thus, the coupling capacitance impacts both the numerator and denominator of the signal-to-noise ratio, The procedure for a p-side measurement is as follows: lo 1) Place probing fixture probes on the n-side bias trace and guard ring and connect both probes to a positive biasing potential.
lo Detailed procedures for the specific instruments the test measurements are found in Ref. [lo].
used during
334
N.L. Bruner et al. /Nucl.
Instr. and Meth. in Phys. Rex A 362 (1995) 315-337
2) Place one probe on the p-side bias trace and one probe on the guard ring. Connect these two probes to ground. 3) Place the probe connected to the high terminal on the LCR meter to the DC pad of the strip under test. Place the probe connected to the low terminal on the LCR meter to the AC pad of the strip under test. 4) Sweep frequencies on the LCR meter from 20 Hz to 1 MHz.
1 ReadeutsMp
_______------1
2
91
r----t 20
DO
1
“3
5) Record the coupling capacitance (assuming lel model of parasitic capacitances).
Figs. 28 and 29 show the measurement setup. For an n-side measurement, the procedure is identical except that the strip under test is on the n-side. A detailed SPICE simulation of the p-side of the detector, which included the readout structure, was created to
______---n
M
c.
!?6
/,
IM
7
/ I
I
Readout
smp
RX 16 QS 37 4w.-----y& VB
I
lmplantsmp
I
y.++~l
VP Q7552
I
+2%&Y
I ReadeutStrtp I I I ----_--
a paral-
________-_-----------Fig. 30. SPICE model of the readout structure of p-side of a test detector.
I I I
335
N.L. Bruner et al. /Nucl. fnstr. and Meth. in Phys. Res. A 362 (1995) 315-337
+ = Data, p-side X = SPICE simulation V-bias = 5OV, I-bias = 41 UA
90 60
t
10 t
0’
’ L”“”
102
Fig. 31. P-side coupling capacitance
;; 73 -
’ ’ “““’
’ ’ ’ “‘l”
103 Measurement
104 frequency
versus measurement
I
+de _’ bms - 5OV, I-bias
I
frequency
I
’ ’ “‘riYF
’ ’ “rLu
/
106
105
(Hz) including
/
SPICE simulation.
I
I
= 21.2 uA. f = 1 kHz
x = prior to bonding + = after bonding
68 67 66 65(
-I
120
140
160
Fig. 32. P-side coupling capacitance
”
is the capacitance behveen hvo implant is the capacitance between hvo AC strips.
Ci%strip
1
240
I
260
’
280
versus channel number, before and after bonding.
validate capacitance measurements. It was constructed using discrete diodes to model the implants, and a set of discrete capacitances (Ccouplingr CEzBtip, Cpc > ” and Ultefitrip resistances (Rinterstrip and the effective strip resistance) for each centimeter of the detector. It simulates the AC metal and DC implant for the strip under test and for two neighboring strips. The SPICE circuit is shown in Fig. 30.
Ci$slrip
’
160 200 220 Channel ID number
strips and
The input values for the resistances were taken from the measurements described in this document, and the capacitances were taken from calculations based on the material properties and detector geometry. As shown in Fig. 31, the SPICE model agrees with measurement. The coupling capacitance measurement was used to determine if the test detectors sustained damage during wire bonding to the AC bonding pads. 40 strips on one detector were measured before and after bonding. Table 2 lists the range of power settings applied across the detector. Fig. 32 shows that there is no detectable change in coupling capacitance after bonding.
336 Table 2 Wire-bonder
N.L. Bruner et al. /Nucl. Instr. and Meth. in Phys. Res. A 362 (1995) 315-337
10. Coupling capacitor breakdown voltage test settings
Bonder: Kulicke & Soffa Model 1478 Ultrasonic generator: Kulicke & Soffa Model 4322
Power setting
Strip ID # (p-side)
(4322 dial)
W (approximate)
101-110 121-130 141-150 161-170 181-190 201-210 221-230 241-250 261-270 281-290 301-310
4.15 4.05 3.95 3.85 3.75 3.65 3.55 3.45 3.35 3.15 3.05
0.27 0.26 0.25 0.24 0.23 0.22 0.21 0.20 0.19 0.18 0.17
The coupling capacitors can be tested to ensure that they remain operational when approximately 90% of their nominal breakdown voltage is applied across them. This measurement may be performed with or without depleting the detector. The measurement procedure is as follows: 1) Place a probe on the pad of an AC strip and connect it to a source of high voltage. 2) Place another probe on the DC pad of the corresponding implant strip and attach a current meter to that probe. The low terminal of the current meter is connected to ground. 3) Raise the voltage applied to the AC pad to 90% of the nominal breakdown voltage or until the dielectric material breaks down and the current meter
ki t Proof Enclosure/ ,.l_____eh________.______________________-_. -, ,Probe Station _-._.-_-.-__.-.-_-. 1
;
I I i !
I I
_._._._._.-_-._.-.-.-_-.-.-.-_---._._!
Fig. 33. Meter configuration
Fig. 34. Probe placement
for the coupling capacitor breakdown
for the coupling capacitor breakdown
voltage measurement
voltage measurement
setup (p-side).
setup (p-side).
N.L. Bruner et al. /Nucl.
measures first.
a non-negligible
Instr. and Meth. in Phys. Res. A 362 (1995) 315-337
value, whichever
Figs. 33 and 34 show the measurement
comes
setup.
11. Conclusion AR of the measurements may be generalized to any silicon microstrip detector geometry. Some equations may need to be modified to reflect specific detector geometries. A circuit simulator is recommended to model the device.
Acknowledgements This work was supported by a grant from the United States Department of Energy under contract number DEFG03-92-ER40732 and by the Sandia University Research Program grants AE-1679/Task 6 and AI-1930/Task 2 from Sandia National Laboratories. We thank Dr. Barney Doyle of Sandia National Laboratories for his support of this research. We credit Ron Manginell for the design and construction of the light proof enclosure, Donna Skinner for getting the software to run, and Aaron Patton for conducting measurements. We also thank John Matthews for his advice during procedure validation, for his editorial expertise, and for steering this document in the right direction.
337
References
ill Dl
H.J. Ziock, et al., IEEE Trans. Nucl. Sci. NS-40 (1993) 344. H.J. Ziock et al., Nucl. Instr. and Meth. A 342 (19941 96. [31 M.A. Frautschi, Fermi National Accelerator Laboratory CDF Collaboration note CDF/DOC/SEC_VTX/PUBLIC/2368. (27 January 19941. [41 A. Peisert. Silicon Microstrip Detectors, (January 27, 19921, DELPHI 92-143-MVX2 (21 October 19921. Also available as a chapter of Instrumentation in High Energy Physics, ed. Fabio Sauli, (World Scientific, Singapore, 1992). 151 U. KGtz et al., Nucl. Instr. and Meth. A 235 (1985) 481. 161 M.A. Frautschi et al., Nucl. Instr. and Meth. A 1582 (19951 521. [71 A. Patton et al., Fermi National Accelerator Laboratory CDF Collaboration note CDF/DOC/SEC_VTX/PUBLIC/2835, in progress. k31 S.M. Sze. Physics of Semiconductor Devices (Wiley, New York, 1981). [91 E. Barberis et al., Nucl. Instr. and Meth. A 342 (1994). [lOI M.A. Frautschi et al., Fermi National Accelerator Laboratory CDF Collaboration note CDF/ DOC/ SEC_ VTX/ PUBLIC/2546. in progress.
ml
M. Honda, The Impedance Measurement Handbook, A Guide to Measurement Technology and Techniques, YokogawaHewlett-Packard Ltd, (1989). Fig. 5-62, p. 5-33, depicts the External DC Voltage Bias Protection Circuit.
Nuclear Instruments
and Methods in Physics Research A 362 (1995) 315-337
__ l!iB
NUCLEAR INSTRUMENTS (LMEmoDS IN PHYSICS RESEARCH Sectlor A
ELSEVIER
Characterization procedures for double-sided silicon microstrip detectors N.L. Bruner
*,
M.A. Frautschi, M.R. Hoeferkamp,
S.C. Seidel
The New Mexico Center for Particle Physics, Uniuersity of New Mexico, Albuquerque, NM 87131, USA Received 23 January
1995
Abstract Since double-sided silicon microstrip detectors are still evolving technologically and are not yet commercially available, they require extensive electrical evaluation by the user to ensure they were manufactured to specifications. In addition, measurements must be performed to determine detector operating conditions. Procedures for measuring the following quantities are described: - Leakage current, - Depletion voltage, - Bias resistance, - Interstrip resistance, - Coupling capacitance, - Coupling capacitor breakdown voltage.
1. Introduction Since double-sided silicon microstrip detectors are still evolving technologically and are not yet commercially available, they require extensive electrical evaluation by the user to ensure they were manufactured to specifications. In addition, measurements must be performed on each detector to determine the required operating conditions. One of these measurements, bulk capacitance versus applied bias voltage, determines the depletion voltage, which determines the operating voltage. Another measurement, leakage current versus applied voltage, checks the current levels for compliance with power requirements. Both measurements are useful in determining the extent of damage to the detectors after irradiation ‘. Some of the detector parameters that are specified to the manufacturer and must be monitored for compliance are - bias resistance, - coupling capacitance, - interstrip resistance, - coupling capacitor breakdown
voltage.
* Corresponding author. Tel. + 1 505 277 2616, fax + 1 505 277 1520, e-mail [email protected]. ’ Further information on radiation damage may be found in Ref. [l-3]. 016%9002/95/$09.50 0 1995 Elsevier Science B.V. All rights reserved SSDI 016%9002(95)00280-4
The definition and importance of each will be discussed in turn. Bias resistance: Bias resistance is the resistance between the implant strips and the voltage source that biases the detector. This is not the effective resistance of the p+ and n+ implant strips themselves but an additional resistance, orders of magnitude greater than the implant strip resistance 2. This bias resistance may be achieved with implanted polycrystalline silicon, or polysilicon. It is particularly interesting because it is a relatively new technology and the measurements are needed to monitor the manufacturer’s consistency. It is significant because it acts as a current limiter which provides some measure of protection against shorts in the detector. Coupling capacitance: For the SVX II detectors, those strips that are read out will be capacip+ and ni implant ’ tively coupled to aluminum readout strips that lie directly over them. These aluminum readout strips are referred to as AC strips. The capacitance between each implant strip and its respective aluminum readout strip is called coupling capacitance. This coupling isolates the electronics from damaging bias voltage and current levels. It should be maximized to reduce the effects of parasitics, namely the interstrip and bulk capacitances.
2
Typical implant strip resistance is 90 k 0 /cm while specified bias resistance for SVX II is 2 f 1 Ma. The SVX II detector is an upgrade in development for CDF at the Fermi National Acceleratar Laboratory.
316
N.L. Bruner et al./Nucl.
Instr. and Meth. in Phys. Res. A 362 (19%) 315-337
p+
implant strips
84,600 or 44,900 microns
Fig. 1. Cross section of the SINTEF/SI
Inter-strip resistance: Interstrip resistance is the effective resistance between implant strips. This resistance should be maximized to maintain channel isolation. Coupling capacitor breakdown voltage: The coupling capacitor breakdown voltage is the maximum potential difference the dielectric material between the implant strip and the AC strip can tolerate. Coupling capacitors must tolerate the higher operating voltages needed to deplete irradiated detectors. Detector manufacturers may not test all finished products for compliance with all specifications. In some cases they perform measurements on test structures. In other cases batches are characterized by a few individual detectors. Some parameters are inferred. It is the responsibility of the user to perform quality control tests to validate each detector before it is used.
2. The double-sided detector with capacitively coupled
readout The tested detectors are SVX II prototypes manufactured by SINTEF/SI 3 to be used in the CDF experiment at Fermi National Accelerator Laboratory. Eight different prototype geometries were produced for testing; all are double-sided, half with double-metal [4] readout on the n-side, half without. The n-side implant strips are orthogonal to the p-side implant strips. Fig. 1 shows the orientation of the implant strips. The eight different prototype detectors differ in their dimensions, the number and pitch of readout strips, the inclusion of intermediate 4 strips, and the inclusion of a double-metal layer. An aluminum strip,
3 SINTEF/SI,
P.O. Box 124 Blindern, N-0314 Oslo, Norway. 4 Intermediate strips are implant strips that are not capacitively coupled to metal read out strips. They improve the shape of the electric field in the bulk and improve resolution without increasing the number of readout channels [5].
detector.
called the bias trace or strip, traces the perimeter of the implant strips on both sides. It is to this strip that the bias voltage is applied. Each implant strip is connected to the bias trace through a polysilicon bias resistor. To fit all the structures on the detector, bias resistors are placed at opposite ends of alternate strips. To allow biasing of alternate strips independently, the bias trace on both sides was manufactured with breaks in two places. The implant strips that are read out are capacitively coupled to aluminum (AC) strips which lie directly over them. The AC strips have pads at both ends at which they may be probed or wire bonded. In double-metal detectors, shown in Fig. 2, each AC strip is connected to an orthogonal aluminum strip (parallel to the p-side strips) which lies above it and has bonding pads on either end. The first and second set of aluminum strips are connected by vias through an insulator. This additional layer of metal strips allows both the p and n-sides to be connected to read out electronics on the same edge of the detector. Both sides of the detector have an implant which may be contacted by an aluminum trace that is not directly connected to any of the other structures on the surface of the detector. These are the guard rings. Each is biased at the same potential as the bias trace on that side. Guard rings shape the electric field near the edge of the detector and shield the inner structures on the detector from edge currents. On each channel, the node between the implant strip and its polysiiicon bias resistor is connected to an aluminum readout pad that may be contacted at the surface of the detector. These aluminum pads are referred to as DC pads. Fig, 3 shows all the structures of the double-metal detector mentioned except the vias connecting the two layers of metal on the n-side. The only points at which the detector may be contacted are the bias traces, guard ring pads, DC pads and bonding pads on the AC strips. To reverse bias the silicon p-n junctions of the test detectors, we choose to apply a positive potential to the
N.L. Bruner et al./Nucl.
Instr. and Meth. in Phys. Res. A 362 (1995) 315-337
317
AC
bolysilicon Fig. 2. N-side double-metal
bias and guard traces on the n-side and connect these traces on the p-side to ground. The operational potential is determined by adding 20 V to the measured depletion voltage of the detector. Overvoltage of the detectors is needed because of the finite coverage of the surface of the detector by the implants and traces. It also maintains an electric field of sufficient strength that charge in the detector has a short drift time. Ambient temperature and humidity affect the magnitude of current through the bulk, so they are recorded prior to each measurement. A more detailed account of the operation of silicon detectors can be found in Ref. [4].
3. Criteria for an established procedure Acceptance of a procedure requires the following: - If the implanted structures of the detector are to be measured, the detector/measurement setup is modeled using an electrical simulation (SPICE) 5. Since some detector parameters cannot be directly measured, the simulation helps provide a means of inferring these parameters using those that can be measured. - During a trial measurement, the currents in the circuit are checked at various points to ensure there is no discrepancy with expected values. - Measurements are repeated to check consistency. - If possible, more than one setup is devised for a measurement to cross-check measured values.
-T----See, for example,
Fig. 10.
bias resistor
readout structure.
- Measured values are compared with the manufacturer’s supplied values (where possible).
4. Equipment list The following equipment quality control measurements
is necessary to perform the specified in this document:
1) Light proof enclosure. 2) Probe station. 3) Micropositioners to which probe tips are mounted and with which they are maneuvered. 4) Precision LCR meter. 5) High voltage supply with integrated current meter ‘. 6) Voltage source sufficient to fully deplete the detector (N 100 V). 7) Digital multimeter for measuring current and voltage. 8) Conductive rubber or fixture for probing underside of detectors [6]. Current meters must have nanoamp precision. The capacitance meter must be precise to 0.1 pF. For all measurements, the equipment is controlled and data recorded by a Macintosh computer using an IEEE488 interface.
6 If only non-destructive tests will be performed, the power source need only supply up to 150 V; however, coupling capacitor breakdown tests may require over 300 V.
N.L. Bruner et al. /Nucl. Instr. and Meth. in Phys. Res. A 362 (19951315-337
318
Si (n type material)
bonding pad Fig. 3. Side view of the SNIFF/S1
5. Leakage current Leakage current is measured as a function of bias voltage applied across the detector. This measurement on a double-sided detector requires probing of both the p-side and the n-side of a detector simultaneously without permanently mounting the detector. A probing fixture [6] was designed to land probe tips on the bias and guard strips on the back side of a detector while the other side remains free to be probed in the usual manner. An alternate method is to place the detector on a noncorrosive, nonabrasive conductive material, such as conductive rubber ’ and apply the bias to that material. The measurement procedure is as follows:
1) Place probing fixture probes on the n-side bias trace and guard ring and connect both probes to a positive biasing potential. 2) Place a probe on the p-side bias trace and ground that probe through a current meter. (Two probes must be used for bias traces that exist as two halves.) 3) Place a probe on the p-side guard ring and connect it to ground. (The guard ring current may also be measured.) 4) Step bias voltage from 0 V to the depletion voltage plus the appropriate overvoltage (_ 20 V for the test detectors). The setup, Figs. 4 and 5, shows a Keithley 617 electrometer measuring current and a Keithley 237 High Voltage Source Measure Unit applying the bias voltage.
For a detailed presentation of the results for the SVX II SINTEF/SI prototypes for this and al1 subsequent measurements see Ref. [7].
6. Depletion voltage Silicon microstrip detectors require a reverse bias potential to create a region free of mobile carriers between the p and n-sides. This region is called the depletion layer. Depletion voltage is the bias voltage that extends the depletion layer the entire depth of the detector. This allows the charge liberated by an ionizing particle to be rapidly collected. As discussed in Section 2, operating voltage is at least 20 V above depletion voltage. With this as a lower limit for the operating voltage, the additional constraints of high voltage breakdown, power consumption, heating, and noise set an upper limit. Therefore, it is important to determine depletion voltage accurately to keep the operating voltage as low as possible. The following is a technique to identify the onset of full depletion. This technique is based on a model of the detector as a parallel plate capacitor. The bulk capacitance per unit area of a reverse biased detector, C, is related to the depth of the depletion layer, d, by C = +/d,
Such rubber
Court, Wobum,
may be obtained MA 01888.
from Chomerics,
77 Dragon
(1)
where eSi is the permittivity of the bulk silicon. The applied bias potential, Vbias, and the depth of the depletion layer are related by Vbias
7
detector.
=
4
d2
1Neffective (/YES 7
(2)
where 4 is the electronic charge and Nerrective is the effective charge carrier density, the number of (negative) donors minus the number of (positive) acceptors [8].
N.L. Bruner et al. / Nucl. Instr. and Meth. in Phys. Res. A 362 (I 995) 315-337
.-_-_____-_-___---_-.-------
Current meter eithley rmc
*‘Li t Proof Enclosure/ ~~__,;~~_~;~~~~~------------------_ I
617 1.-’
Fig. 4. Meter configuration
for the leakage current measurement
The depletion voltage, V+,, is extracted from a plot of log{C,,,} versus log{V,,,). Below Vdepl this curve obeys a power-law, a V”, as may be seen by inserting Eq. (2) into Eq. (1). The capacitance is a constant for Vbias > V,,,, since there is no additional region to deplete of carriers remaining in the bulk silicon. The capacitance per unit area is given by c
J4 I 'Si
=
i
Neffective ESi/ddepl
319
1/2vths
for
'bias s Vdepl7
for Vbias>bepI (3)
where ddep, is the full depletion depth of the device.
setup.
The point of inflection in a log{C,,,} - log{Vbia,} curve results from the transition from the upper line to the lower line in Eq. (3) and thereby defines the depletion voltage. Vdep, is located at the intersection point of a straight-line fit of the power-law region and a horizontal line through the curve’s minimum value, as shown in Fig. 6. In the case of a planar diode with planar electrodes, the parallel plate capacitor model is a good approximation. Silicon microstrip detectors, resembling diodes with segmented electrodes, have periodic nonuniformities in the electric field around the n+ and p+ implants which result in small regions that require larger biasing voltages to deplete. The size of this additional voltage is a function of
Fig. 5. P-side probe placement for the leakage current measurement.
320
N.L. Bruner et al. /Nucl. Instr. and Meth. in Phys. Res. A 362 (1995) 315-337
1
10 Bias potential
(V)
Idpe3&
100
Fig. 6. Bulk capacitance versus bias voltage.
LCR meter
,“Lipht Proof Enclosure/
Current meter
Pig. 7. Meter configuration for the depletion voltage measurement. The isolation box is illustrated in Fig. 9.
the geometry of the implant strips, specifically their widthto-pitch ratio [9]. Figs. 7 and 8 show the measurement setup. A Hewlett/Packard 4284A precision LCR meter, bias voltage protection network (to shield the inputs of the LCR meter from bias potentials > +42 V; see Fig. 9) and low parasitic capacitance probes are used (lo]. The LCR meter is connected to, and DC isolated from, the probes via the protection network. This network also distributes Vbias
through the probes. follows 8.
The measurement
procedure
is as
1) Place probing fixture probes on the n-side bias trace and guard ring and connect both probes to the
8
Detailed procedures for the specific instruments used during the test measurements are found in Ref. [lo].
N.L. Bruner et al. /Nucl. Instr. and Meth. in Phys. Rex A 362 (1995) 315-337
321
Fig. 8. P-side probe placement for the depletion voltage measurement
positive terminal on the isolation box, which supplies the biasing potential. 2) Place one probe on the p-side bias trace and one probe on the guard ring. Connect these two probes to the low voltage terminal of the isolation box. 3) Step bias voltage from 0 V to a voltage greater than the expected depletion voltage.
7. Bias resistance For this and all subsequent measurements, the detector must first be fully depleted with the guard rings at the same potentials as their respective bias traces. The detector must be measured with its electric field structure exactly as it will be during operation.
vbias
Fig. 9 DC bias voltage protection network (“isolation
shown between the LCR meter and the probes in Fig. 7. A cast aluminum terms the indicated ground plane. L,, L,, H, and H, are the low and high current and potential inputs to the LCR meter. C, is the capacitance under test. Vbias5 200 V. Switch S, serves to bypass capacitor C,. For the meaaurements described in this document, S, remains closed. This network is based on Figure 5-62 of Ref. [ll]. Table 1 lists the component values. (The configuration shown is for bulk C-V measurements, when the detector is biased through the probes connected to the LCR meter. For localized measurements, for example coupling capacitance, the detector is not biased through the LCR meter probes, and V,,,,, C, and the 1 kR resistor are omitted. The LCR meter’s signal return must be isolated from the power supply return to prevent AC signal loss and falsely low capacitance readings.) enclosure
box”)
N.L. Bruner et al. / Nucl. Instr. and Meth. in Phys. Rex A 362 (1995) 315-337
322 Table 1 Isolation box components.
See Fig. 9 for a schematic
Part
Description
Cl CZ
Metalized polypropylene Metalized polypropylene Metalized polypropylene Metalized polypropylene Zener diode
c3 C4 ZD,,z ZD3
D 5.6 S,
4
diagram
capacitor capacitor capacitor capacitor
Zener diode power diode Single pole single throw switch a
a Switch S, serves to bypass capacitor
Value
Unit
Tolerance
Rating
20 1 20 30 47 3.3 200
I*F PF @ PF V V V
20% 20% 20% 20% 5% 5%
2oov 2oov 2oov 2oov 1w 1w 1A 250 v
C,. For the measurements
Measuring bias resistance is challenging because each polysilicon resistor is both part of a network and embedded in silicon. Measuring resistance directly with an ohmmeter does not work because of the way these meters operate. Ohmmeters measure resistance by providing a test current and measuring the corresponding voltage drop. The leakage current maintained through each strip during normal operation interferes with this test current. Current and voltmeters are used to avoid this problem, but they demand greater understanding of how the detector functions. An electrical simulation was used to better understand the surface structures of a detector. Figure 10 shows the model used to simulate the p-side. The parameter values inserted in the model are based on expected values and were revised after confirmation by measurement. The capacitors are included for completeness. but have no effect on DC measurements. The model
effective
strip
described
in this document,
S, remained closed.
was used to explore relationships between various parameters, including the relationship between bias resistance and the measurable parameters. The various parameters are: 1) istrip: implant strip current, 2) rinterstrip:current between a pair of adjacent implant strips, 3) imeasured:current measured at the DC pad, 4) VHpplicd:voltage applied to the DC pad, 5) vintcrstrip: voltage drop between a pair of adjacent implant strips, 6) Rbias: bias resistance. 7) Rinterstrip’ interstrip resistance. may be measured directly. Fig. Only Applied and kasured 11 shows the model used to simulate a bias resistor measurement circuit. The model was implemented in sev-
resistance interstrip resistance 4.8~
ZOOMEG
Tl.lMEG bios resistor ml
1 .OMEG
?
points at which detector is probed
4 11 .OMEG bias
resistor 0
bias
,I
resistor
1 1 .OMEG 0 +
biasing
power
supply
Fig. 10. SPICE model of the DC components
on the p-side of a detector.
373
N.L. Bruner et al. / Nucl. Instr. and Meth. in Phys. Res. A 362 (1995) 315-337 effective
strip
bias
resistance
resistor
473K
*
+ 1 1 .OMEG
biasing
power
”
suppI,.
Fig. 11. SPICE model of the p-side bias resistor measurement
era1 versions including ones with uniform and nonuniform bias resistance. Fig. 12 shows the currents at the node between the bias resistor and implant strip during measurement. The values of the parameters are positive in the directions indicated in Fig. 1!2 for the case Vapplied< istripRbias. For Vapplied> ‘sttipRbias2 iinterstripis negative. The voltage drop between a pair of adjacent strips depends upon the voltage applied to the DC pad of one strip and the normal potential level of its neighbor. The normal potential of an implant strip is given by the voltage drop across its bias resistor, such that (q
The current between potentials is
0
circuit.
a pair of adjacent strips at different
= ( istnpR hias-
Vapplied
1 /Rinterstrip.
(5)
The interstrip current affects the current measured by the meter al the DC pad in the following way: II Y
Lasured= -
applied + 2iinterstrip+
istrip
Rbias
Fig. 12. Currents at the DC pad of the resistor under test in the p-side bias resistor measurement.
(6)
324
N.L. Bruner et al. /Nucl. Instr. and Meth. in Phys. Res. A 362 (1995) 315-337
c._.__________-_-___--______---
Current meter/Power supply
+ -
+...
M?7wfeT *
!
J
I
.l’/iight Proof Enclosure/ f.____=_-_-_-_--____-_-_-----____-I I robe St_______________~ , r
8OV dc
Keithley 617
I
!
,
to bias trace
I
Detector
Fig. 13. Meter configuration for the p-side bias resistor measurement.
The change in measured current is hi
Rearranging
*V,pplied
‘Vapplied
measured =
+
-
2*iimrstrip
+
(7)
* istrip
Rbias
=
-
Rhias
=
Eq. (lo), bias resistance
- *Yapplied *Kpptied *istripRbias
-p+2
+ *
Rbias
istrip
(8)
Rinteislrip
For constant strip current, Eq. (7) becomes Ai measured
*Applied =
-
~
Bias 1
-+p Rbias
-
?P*Kpp,ied
bRintersttip 2
1
Rinterstrip
(9) (10)
Ai measured
+
is
(11)
2*Kpp~ied/Rintersttiip
For very
large interstrip resistance, bias resistance is - *Kpptied/*imeasured. The minus sign does not lead to a negative resistance because as Vapplied increases, z,,,,,,,~ decreases. For a bias resistance to interstrip resistance ratio as large as 5%, the error in the approximation is around lo%, based on simulated data. This may be improved by inserting an estimation of Rinterstripinto Eq. (11). The error may then be reduced to around 1% if the interstrip resistance is estimated with 10% accuracy. As will be discussed in Section 8, Rinfemtripmay be calculated from Rbias (once
Fig. 14. Probe placement for the p-side bias resistor measurement.
N.L. Bruner et al. /Nucl. Ins@. and hfeth. in Phys. Res. A 362 (1995) 315-337
it is known), and this value may then be substituted back into Eq. (11). Two similar methods for measuring bias resistance on the p-side were devised and tested. The method presented is based on the previous calculations. 7.1. p-side bias resistor measurement The bias resistance measurement involves applying a small change in voltage (between -0.5 V and 0.5 V> across only one bias resistor on the p-side of the detector. The change in current through that resistor is recorded as a function of the change in voltage applied across it. The sign of the measured current must be recorded as it will is stepped from a value less than the switch when Vapapplied voltage drop across the resistor, istripRbias, to a value that is greater. The measurement procedure is as follows: 1) Place probing fixture probes on the n-side bias trace and guard ring and connect both probes to a positive biasing potential. (In Fig. 13, bias is supplied by an integrated voltage source on the Keithley 617.) 2) Place a probe on the p-side bias trace and ground that probe through a current meter. (The leakage current may be measured from the p-side bias trace probe as a check that the detector is operating normally.) 3) Place a probe on the p-side guard ring and connect it to ground. 41 Place a probe on the DC pad of one implant strip. Connect this probe to an integrated power supply/current meter so that as it applies a small
Detector:
S7-$6
it also measures the current through voltage,Kppliedt that strip. 5) Step Vappliedby increments of 0.1 V from -0.5 V to 0.5 V and record the leakage current and the current measured at the DC pad. The measurement setup is shown in Figs. 13 and 14. The bias resistance is - AVapplied/Aimeasured to a first approximation, and may be plotted for varying values of Vapplied. Fig. 15 shows bias resistance data for a range of VIpplied using a typical test detector. A second measurement method was developed which requires two setups to measure first the current through one bias resistor due only to the biasing potential, then the voltage drop across that same resistor, keeping the bias potential constant. Since it is not possible to correct for finite interstrip resistance with this method, it is not presented. Not correcting for finite interstrip resistance, the determined resistances from the two methods agree to within 1%. which is not surprising since they share systematic errors. As an additional check, destructive tests were performed in which bias resistors were physically isolated and measured. This procedure has an independent set of systematic errors from the nondestructive methods described above. Individual bias resistors on both the n and p-sides of the test detectors were electrically isolated from the network by severing the bias trace to either side of one resistor, and in the case of the n-side, from both ends of the resistor. The detector remained unbiased and electrically isolated from its surroundings in both measurements. The resistors could be measured conventionally with an ohmmeter because the test current from the meter passes
0.6 Bias resistance
.
is given by slope.
. -0.6
-
current
325
(nanoamps)
for a typical detector (p-side) Fig. 15.l/Hpplled versusimeasured
326
N.L. Bruner et al./Nucl.
Instr. and Meth. in Phys. Res. A 362 (1995) 315-337 effective
strip
resistance ~_ __ _.._t_ interstrip capacitance
1
L.Bp O~qI/IJ
w 473k
1MEG
LA p-n
junction
1
0-m
1MEG
::
T4.Bp
ZOOMeg m 473k
1/1 i
offsetting vpltage applied at CC pod
ZOOMeg
0
Aw ‘MEG
,b
VVv 1 MEG
4.8p m
4.8p
+ e
7ov biasing
i/l 473k \
power
b
supply
0
Fig. 16. SPICE model of the n-side bias resistor measurement circuit.
only through the resistor under test. The range of measured values agrees with the nondestructive measurements for these particular test detectors. 9
7.2. n-side bias resistor measurement The n-side bias resistance measurement differs from the p-side measurement in the voltage applied to the DC pad. Since the n-side is the side to which bias is applied, the voltage applied to the DC pad is within f0.5 V of the operating voltage. The values typically used are 79.5-80.5 V stepped in increments of 0.1 V for an operating voltage of 80 V. Fig. 16 shows the model of the n-side bias resistor measurement. Currents at the node between the implant strip and its bias resistor are labeled in Fig. 17. (For Ifapplied > (Vbias- istripRbias),iinterstripis positive in the direction indicated in Fig. 17. The direction of bias resistor current is valid for Ifapplied< Vbias.)
The voltage drop between a pair of adjacent strips is Ynterstrip = Vapptied - ( ‘bias - istripRbias)
.
(12)
The current between a pair of adjacent strips is (13)
iinterstrip= Vinterstrip/Rinrerstrip = ( Vapptied- (
Vbias
-
isttipRbias ) ) /Rinterstrip .
(14)
This contributes to the current measured by the integrated power supply/current meter in the following way: ‘bias 1 measured
=
istrip
+
2 iintewrip
-
tpplied
(15)
Rbias
xn-destructive test for the p-side yielded 11.44 +O.O2f 0.08 Ma. Tire destructive measurement for the p-side yielded Rgias= 12.0+0.2+ 1.4 MR and for the n-side, Rtias = 12.1 k0.2 * 1.4 Ma. For the destructive measurements, the statistical errors were estimated from sampling 4 p-side and 2 n-side bias resistors. Since the p-side bias resistors could not be completely isolated, the systematic error was estimated based on a measurement of the bias resistance on the n-side as a function of applied bias voltage. This contribution is assumed to dominate, and to stem from coupling of currents in the bulk to the polysilicon resistor under test.
Fig. 17. Currents at the DC pad of the resistor under test during the n-side bias resistor measurement.
N.L. Bruner et al. /Nucl. Instr. and Meth. in Phys. Res. A 362 (1995) 315-337
327
shiest_-_-_---_-_-_---_-_-_-____--------__.
Fig. 18. Meter configuration
for the n-side bias resistor measurement.
The change in measured current, for constant istrip and Vl&s, is
AVappied
Ai measured
=
2A
i interstrip
+
(16)
7 bias
‘Applied =-++-
*V,pplied Rinterstrip
R bias
(17)
.
Rearranging Eq. (17), n-side bias resistance is * Rbias
v.pPlied (18)
=
hi
measured
-2-
*%pphed Rinterstrip
Note that due to the directional convention defined in Fig. 17, an increase in AVappliedcorresponds to an increase in Ai measured’ The measurement procedure is as follows: 1) Place probing fixture probes on the p-side bias trace and guard ring. Connect the bias trace to a current meter and connect the guard ring to ground. 2) Place a probe on the n-side bias trace and a probe on the n-side guard ring and connect the probes to a positive biasing potential. 3) Place a probe on the DC pad of one n-side implant strip. Connect this probe to an integrated power supply/current meter so that as the power supply
AC
olysilicon bias resistor
Fig. 19. Probe placement for the n-side bias resistor measurement.
328
N.L. Bruner et al. /Nucl. Instr. and Meth. in Phys. Rex A 362 (1995) 31.5-337 sumes that the detector is uniform: i.e., all implant strip currents, interstrip currents, and bias resistors are about equal. Fig. 20 shows the model of this measurement circuit. Fig. 21 shows the individual currents for a pair of adjacent strips. From the model, the parameters that can be measured directly are:
appbes a small voltage, Vapplied,it also measures the current through that strip. 41 Step Vappliedfrom V~~rarins- 0.5 V to Voperatins+ 0.5 V in increments of 0.1 V. 5) Record the leakage current and the current measured at the DC pad. The measurement
setup is shown in Figs. 18 and 19. 11 i,: the current through an individual p-side bias resistor on the side of the bias trace to which the higher voltage is being applied, corresponding to a smaller potential difference to the n-side and a lower leakage current. 2) i,,: the current through an individual p-side bias resistor on the side of the bias trace to which the lower voltage is being applied, corresponding to a larger potential difference to the n-side and a higher leakage current. 3) i $+,: the average current through an individual p-side implant strip when both halves of the bias trace are at the same potential. This can be measured directly or calculated from i, and i,. the potentials ap41 AV,,,i,d: the difference betieen plied to the two halves of the bias trace, represented by “off-setting power supply” in Fig. 20.
8. Interstrip resistance The electrical model of the detector, Fig. 10, was used to determine the best way to calculate interstrip resistance from measurable parameters. This measurement, suggested by SINTEF/SI, determines the average interstrip resistance. Because non-uniformity among the implant strips affects this measurement, a method to compensate for this is described. The effect of shorted implant strips on this measurement is discussed.
8.1. p-side interstrip resistance measurement To determine an average value of interstrip resistance, bias alternate strips at slightly different potentials and measure the corresponding change in currents. To bias alternate strips differently, there must be two breaks in the bias trace so that alternate strips are isolated. This method requires a known average value for the bias resistors. (Bias resistor values vary slightly from implant strip to implant strip. Manufacturers quote a percent variation of the value across one detector and a percent variation for a given batch of detectors.) The model for this measurement aseffective
strip
The following rameters:
resistance
bias resistor
APA
AAA
interstrip resistance
interstrip copocitonce-nnn 4.80-
T
ZOOMEG
1 1 .OMEG points o which detector is probed
AAh 11.2MEG
200MEG
, AhA
t
473k Abl? 473k
“^vz’
t
1 1 .OMEG
200MEG 4.8~1
fiAh I
1
1 l.lMEG
ZOOMEG
~.BPT A
from measured
pa-
1) Rbias: bias resistance. 2, Vintentrip:the voltage drop between a pair of adjacent implant strips.
473k.
I
must be calculated
1
473k
off-setting power supply
n
“V”
-4,
11 .OMEG
*0
Fig. 20. SPICE model of the p-side interstrip resistance
measurement
circuit.
N.L. Bruner et al. / Nucl. Instr. and Meth. in Phys. Rex A 362 (1995) 315-337
329
i, bias
resistor
Vapplied L
bias
Fig. 21. Conventions
resistor
chosen for the SPICE model of the p-side interstrip resistance measurement
3, iinterstrip:
the current flowing between two adjacent implant strips. the resistance between two adjacent im4, Rinterstrip: plant strips.
circuit.
The voltage drop between adjacent strips is calculated from the applied potential difference and the voltage drops across the bias resistors, Vinterstrip= At&plied + itRbias - rhRbias.
The individual strip currents, i, and i,, are calculated by measuring the leakage current from their respective halves of the bias trace and dividing by the number of strips measured. If the individual implant strip current (without a potential difference between the two halves of the bias trace) is not measured directly, it may be determined using i
stnp=-
(21)
Eqs. (20) and (21) give the interstrip resistance:
=4x
(i,-ih)R,ias+A”
i, + i,
apphcd i,
(19)
2 ’ where it is assumed that the current divides evenly between adjacent implant strips. Referring to Fig, 21, interstrip current may be calculated, with and without measuring iStrip, as follows:
The measurement
-
i,
procedure is as follows:
1) Ensure that the two halves of the p-side bias trace are not connected. 2) Place probing fixture probes on the n-side bias trace and guard ring and connect both probes to a positive biasing potential.
(20) Current meter/ Power supply Sq V dc( eithley 617
/‘Lie;ht Proof Enclosure/ c__________--__;-___-_-_--___-_-__ -8 I Probe Station ___._______.__~
; ;
a 3
bias trace to half ofthe strips
/ ;
Det :&or
j
hi
1 Current meter
, b
shield
; !Ll?&7+arddng____._____ ;
Fig. 22. Meter configuration for the p-side interstrip resistance measurement.
330
N.L. Bruner et al. / Nucl. Instr. and Meth. in Phys. Rex A 362 (I 995) 315-337
Fig. 23. Probe placement for the p-side interstrip resistance measurement.
3) Place a probe on the p-side guard ring and connect it to ground. 4) Place a probe on each half of the p-side bias trace. 5) If there is an odd number of implant strips on the p-side, record which probe is contacted to the half with the additional strip. and 6) Ground one probe through the electrometer measure the current through those strips. 7) Connect the other probe to an integrated power supply/current meter so that as it applies a small voltage to half of the p-side implant strips, AVat,+,, it also measures the current through these strips.
damaged implant strips. For detectors with non-uniform implant strips, the previous measurement may be revised to compensate for this. We assume that whatever the damage to the detector, the response to a potential difference between the two halves of the bias trace will be proportional only to the interstrip and bias resistances. The interstrip resistance may be determined from the change in measured currents, 6i, and 6i,, and the change in the voltage applied to one half of the bias trace, AV&, ,ied, keeping the other voltage level constant. From Eq. Q22), R intcrstrip may be written
The specific values of AVaappliedused are between -0.5 V and 0.5 V. Figs. 22 and 23 show the measurement setup. When measuring the leakage current through the two halves of the bias trace on the p-side, the values should be the same unless there is an odd number of strips (i, = i, when Vapplied= 0). In that case the values should differ by a single strip current. This can serve as a quick check for
i sttfp
The measurement procedure for detectors with non-uniform strips is the same as that listed above except that in the last step the voltage applied to one half of the bias trace is stepped in 0.05 V increments from -0.5 V to 0.5 V.
I
I
lh
\ / bias
V applled
reslstor
Fig. 24. Two shorted implant strips in the p-side interstrip resistance measurement.
N.L. Bruner et al./Nucl.
8.2. Effect of shorted resistance measurement
implant
strips
Instr. and Meth. in Phys. Res. A 362 (1995) 315-337
on the interstrip
If all the bias resistors on a detector have the same value then there will be no potential difference between strips and, consequently, no interstrip current. However, the bias resistors do have slightly different values. We consider here two neighboring strips with bias resistances Rbias and Rbias. Their interstrip current may be calculated using istrip(Rbias iimmrip
-
RLias)
(24)
=
Rinterstrip
which is similar to Eq. (5) with Vapplied= 0. When two implant strips are shorted, they are at the same potential and the current divides between them to make the voltage drops across their bias resistors equal. When there is an applied voltage difference between two shorted strips, as in the interstrip resistance measurement, the currents through the bias resistors, i’, and i’,,, of the two strips shown in Fig. 24 are i; =
V’ -
tpplied
(25) Rbias
331
This compares with Eq. (21) with Vinterstrip= 0 and AVapplied= Vapplied- 0. The change in current for two shorted strips is i,
_
ib z
i; -
‘Applied i, zz ___ ‘Bias
amount is added to the current of a strip with bias trace at ground; it is subtracted from the current of a strip with bias trace at Vapplied. In the previous interstrip resistance measurement procedure, the current meters record the total current contributed by half of the implant strips. The values change according to Equation 28 for each shorted strip. For example, if this interstrip measurement were performed on a detector with 11 MSZ bias resistors and AVapplied= 0.1 V, Ai,,,, would equal 4.54 ~4. This effect is insignificant compared to a leakage current on the order of 10 WA or larger and a ratio of shorted strips to total strips of l/640. As the shortedstrips-to-total-strips ratio becomes larger this measurement procedure will yield less accurate results. Fig. 25 shows a plot of the number of shorted strips versus measured interstrip resistance for a (modeled) 70 strip detector. The simulated data for this plot were generated using SPICE. This
and V-0 -’ = -
‘h
Bias
(26)
’
where V’ is the voltage at the node of the implant strips and their resistors. Eliminating V’ from Eqs. (25) and (26) yields i’,Rbi, = ii Bias + ypplied.
(27)
1CKLCIl
1m.cJJ
8.3. N-side interstrip resistance measurement The procedure is identical to the p-side method described. The setup differs in that the voltages to the n-side bias traces are Vbias to one half and Vbias f 0.5 to the other. As with the p-side version of this procedure, the
14o.m
16o.m
18C.u)
Inter&rip resistance (Megaohms) Fig. 25. Calculated
interstrip resistance versus # of shorted strips (Actual interstrip resistance of model is 200 MO).
N.L. Bruner et al. /Nucl. Instr. and Meth. in Phys. Res. A 362 (1995) 315-337
332
;
._._-_-_-_._._-______-._.__-__._.~
~~i~l~l--~___--____------_-_---___---___-_t-
-L =
Fig. 26. Meter configuration for the n-side interstrip resistance measurement.
interstrip resistance is determined from the change measured current as the AVapplied is changed.
Rintewrip =
(f% -
f%)Rbias
4 ’
-
%,-hi,
in
AV,‘pplied
’
(29
where the nomenclature is the same as for Eq. (23). The measurement procedure is as follows:
1) Ensure that the two halves of the n-side bias trace are not connected.
AC
2) Place probing fixture probes on the p-side bias trace and guard ring and connect both probes to ground. 3) Place a probe on the n-side guard ring and connect it to a power supply operating at Vbias. 4) Place a probe on each half of the n-side bias trace. 5) If there is an odd number of implant strips on the n-side, record which probe contacts the half with the additional strip. 6) Connect one probe to a power supply operating at Vbias. This power supply current must be measured. 7) Connect the other probe to an integrated power supply/current meter so that as it applies Vbias + 0.5
C
Fig. 27. Probe placement
for the n-side interstrip resistance measurement.
N.L. Bruner et al. /Nucl. Instr. and Meth. in Phys. Res. A 362 (1995) 315-337
I
LCR meter
Fig. 28. P-side coupling capacitance
measurement
setup. The isolation box is illustrated in Fig. 9.
Fig. 29. Probe placement for the p-side coupling capacitance
V to half of the n-side implant strips, it also measures the current through these strips. 8) Step AV,r,ri,d from Vbias- 0.5 V to Vbias + 0.5 V. The measurement
333
setup is shown in Figs. 26 and 27.
9. Coupling capacitance The coupling capacitor between the AC metal readout strip and the implant strip isolates the bias voltage and leakage currents from the front-end of the readout chip. This capacitor couples the charge in the implant strip to the readout chip. This capacitance is also a component of
measurement
the total capacitance with respect to ground seen by the front-end chip and therefore affects the equivalent noise charge of the chip. Thus, the coupling capacitance impacts both the numerator and denominator of the signal-to-noise ratio, The procedure for a p-side measurement is as follows: lo 1) Place probing fixture probes on the n-side bias trace and guard ring and connect both probes to a positive biasing potential.
lo Detailed procedures for the specific instruments the test measurements are found in Ref. [lo].
used during
334
N.L. Bruner et al. /Nucl.
Instr. and Meth. in Phys. Rex A 362 (1995) 315-337
2) Place one probe on the p-side bias trace and one probe on the guard ring. Connect these two probes to ground. 3) Place the probe connected to the high terminal on the LCR meter to the DC pad of the strip under test. Place the probe connected to the low terminal on the LCR meter to the AC pad of the strip under test. 4) Sweep frequencies on the LCR meter from 20 Hz to 1 MHz.
1 ReadeutsMp
_______------1
2
91
r----t 20
DO
1
“3
5) Record the coupling capacitance (assuming lel model of parasitic capacitances).
Figs. 28 and 29 show the measurement setup. For an n-side measurement, the procedure is identical except that the strip under test is on the n-side. A detailed SPICE simulation of the p-side of the detector, which included the readout structure, was created to
______---n
M
c.
!?6
/,
IM
7
/ I
I
Readout
smp
RX 16 QS 37 4w.-----y& VB
I
lmplantsmp
I
y.++~l
VP Q7552
I
+2%&Y
I ReadeutStrtp I I I ----_--
a paral-
________-_-----------Fig. 30. SPICE model of the readout structure of p-side of a test detector.
I I I
335
N.L. Bruner et al. /Nucl. fnstr. and Meth. in Phys. Res. A 362 (1995) 315-337
+ = Data, p-side X = SPICE simulation V-bias = 5OV, I-bias = 41 UA
90 60
t
10 t
0’
’ L”“”
102
Fig. 31. P-side coupling capacitance
;; 73 -
’ ’ “““’
’ ’ ’ “‘l”
103 Measurement
104 frequency
versus measurement
I
+de _’ bms - 5OV, I-bias
I
frequency
I
’ ’ “‘riYF
’ ’ “rLu
/
106
105
(Hz) including
/
SPICE simulation.
I
I
= 21.2 uA. f = 1 kHz
x = prior to bonding + = after bonding
68 67 66 65(
-I
120
140
160
Fig. 32. P-side coupling capacitance
”
is the capacitance behveen hvo implant is the capacitance between hvo AC strips.
Ci%strip
1
240
I
260
’
280
versus channel number, before and after bonding.
validate capacitance measurements. It was constructed using discrete diodes to model the implants, and a set of discrete capacitances (Ccouplingr CEzBtip, Cpc > ” and Ultefitrip resistances (Rinterstrip and the effective strip resistance) for each centimeter of the detector. It simulates the AC metal and DC implant for the strip under test and for two neighboring strips. The SPICE circuit is shown in Fig. 30.
Ci$slrip
’
160 200 220 Channel ID number
strips and
The input values for the resistances were taken from the measurements described in this document, and the capacitances were taken from calculations based on the material properties and detector geometry. As shown in Fig. 31, the SPICE model agrees with measurement. The coupling capacitance measurement was used to determine if the test detectors sustained damage during wire bonding to the AC bonding pads. 40 strips on one detector were measured before and after bonding. Table 2 lists the range of power settings applied across the detector. Fig. 32 shows that there is no detectable change in coupling capacitance after bonding.
336 Table 2 Wire-bonder
N.L. Bruner et al. /Nucl. Instr. and Meth. in Phys. Res. A 362 (1995) 315-337
10. Coupling capacitor breakdown voltage test settings
Bonder: Kulicke & Soffa Model 1478 Ultrasonic generator: Kulicke & Soffa Model 4322
Power setting
Strip ID # (p-side)
(4322 dial)
W (approximate)
101-110 121-130 141-150 161-170 181-190 201-210 221-230 241-250 261-270 281-290 301-310
4.15 4.05 3.95 3.85 3.75 3.65 3.55 3.45 3.35 3.15 3.05
0.27 0.26 0.25 0.24 0.23 0.22 0.21 0.20 0.19 0.18 0.17
The coupling capacitors can be tested to ensure that they remain operational when approximately 90% of their nominal breakdown voltage is applied across them. This measurement may be performed with or without depleting the detector. The measurement procedure is as follows: 1) Place a probe on the pad of an AC strip and connect it to a source of high voltage. 2) Place another probe on the DC pad of the corresponding implant strip and attach a current meter to that probe. The low terminal of the current meter is connected to ground. 3) Raise the voltage applied to the AC pad to 90% of the nominal breakdown voltage or until the dielectric material breaks down and the current meter
ki t Proof Enclosure/ ,.l_____eh________.______________________-_. -, ,Probe Station _-._.-_-.-__.-.-_-. 1
;
I I i !
I I
_._._._._.-_-._.-.-.-_-.-.-.-_---._._!
Fig. 33. Meter configuration
Fig. 34. Probe placement
for the coupling capacitor breakdown
for the coupling capacitor breakdown
voltage measurement
voltage measurement
setup (p-side).
setup (p-side).
N.L. Bruner et al. /Nucl.
measures first.
a non-negligible
Instr. and Meth. in Phys. Res. A 362 (1995) 315-337
value, whichever
Figs. 33 and 34 show the measurement
comes
setup.
11. Conclusion AR of the measurements may be generalized to any silicon microstrip detector geometry. Some equations may need to be modified to reflect specific detector geometries. A circuit simulator is recommended to model the device.
Acknowledgements This work was supported by a grant from the United States Department of Energy under contract number DEFG03-92-ER40732 and by the Sandia University Research Program grants AE-1679/Task 6 and AI-1930/Task 2 from Sandia National Laboratories. We thank Dr. Barney Doyle of Sandia National Laboratories for his support of this research. We credit Ron Manginell for the design and construction of the light proof enclosure, Donna Skinner for getting the software to run, and Aaron Patton for conducting measurements. We also thank John Matthews for his advice during procedure validation, for his editorial expertise, and for steering this document in the right direction.
337
References
ill Dl
H.J. Ziock, et al., IEEE Trans. Nucl. Sci. NS-40 (1993) 344. H.J. Ziock et al., Nucl. Instr. and Meth. A 342 (19941 96. [31 M.A. Frautschi, Fermi National Accelerator Laboratory CDF Collaboration note CDF/DOC/SEC_VTX/PUBLIC/2368. (27 January 19941. [41 A. Peisert. Silicon Microstrip Detectors, (January 27, 19921, DELPHI 92-143-MVX2 (21 October 19921. Also available as a chapter of Instrumentation in High Energy Physics, ed. Fabio Sauli, (World Scientific, Singapore, 1992). 151 U. KGtz et al., Nucl. Instr. and Meth. A 235 (1985) 481. 161 M.A. Frautschi et al., Nucl. Instr. and Meth. A 1582 (19951 521. [71 A. Patton et al., Fermi National Accelerator Laboratory CDF Collaboration note CDF/DOC/SEC_VTX/PUBLIC/2835, in progress. k31 S.M. Sze. Physics of Semiconductor Devices (Wiley, New York, 1981). [91 E. Barberis et al., Nucl. Instr. and Meth. A 342 (1994). [lOI M.A. Frautschi et al., Fermi National Accelerator Laboratory CDF Collaboration note CDF/ DOC/ SEC_ VTX/ PUBLIC/2546. in progress.
ml
M. Honda, The Impedance Measurement Handbook, A Guide to Measurement Technology and Techniques, YokogawaHewlett-Packard Ltd, (1989). Fig. 5-62, p. 5-33, depicts the External DC Voltage Bias Protection Circuit.