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Combining analog simulation techniques optimizes designs
World Abstracts on Microelectronics and Reliability to accommodate smaller devices and multi-pin, MST-compatible devices. Developers also are making progress toward a tapeless supply technology. Passive chip components follow high-deusity trends. YASUJI HIGUCHI and KEncm SHIMAMAKI.JEE (Japan), 26 (October 1990). Changes in semiconductor technology led to the recent development of highly integrated electronic circuits with multiple functions. This in turn has promoted the miniaturization of peripheral components and the use of
5. M I C R O E L E C T R O N I C S - - - D E S I G N The anisotropic model for simulation of a multilayer structure dry etching. PIOTR GLOWACK1 and ZBIGNIEW TKACZYK. Electron. Technol. 21(3/4), 61 (1988). In this paper a simple procedure for dry etching simulation by a ray method is described, and an algorithm to determine an anisotropic etch representing point's path is introduced. The final point's rate is determined by composition of etch rate vectors which represent various mechanisms of dry etching. Behaviour of the path for the multilayer structure case is considered using the refraction law. The etched layer masking effect is also taken into account. The advantages of a designed algorithm are its great simplicity and universality, so it can be of use for the most complicated cases of dry etching. Our model has been used for determination of the etched layer profile of the Ti-Mo-Au structure and has been compared with the other investigators' results. Designs meet needs of high-speed, high-density systems. TOM ORMOND. EDN, 50 (5 July 1990). Unconventional printed circuit boards, packaging, and connector designs let system designers take advantage of the performance capabilities of high-speed, high-density modern ICs. Principles of wet chemical processing in ULSI microfabrication. HIROHISA KIKYUAMA, KIYONORI SAKA, JUN TAKANO, ICHIRO KAWANABE, MASAYUK MIYASHITA and TADAHIRO OHMI. IEEE Trans. Semicond. Mfg 4(1), 26 (1991). Fine patterning technology for integrated device manufacturing requires properties such as surface cleanliness, surface smoothness, complete uniformity and complete etching linearity in wet chemical processing. In our work an improved chemical composition for buffered hydrogen fluoride (BHF: NH4F + HF + H20 ) is determined based on fundamental research into the chemical reaction mechanism of BHF and SiO2. Advanced wet chemical processing based on investigation of chemical reaction mechanisms and properties of liquid chemicals, concentrating on the SiO2 patterning process by BHF, is described. The principle of wet chemical processing in silicon technology is based on the following four items: the determination of the dominant reaction (etching) species, the influence of the solubility of the etching products in BHF on etching uniformity and linearity, stability of chemical composition without solid phase segregation, and an improvement of the wettability of liquid chemicals on the wafer surface by the addition of a surfactant are proposed. Fabrication of high density multichip modules. JOHN J. H. RECHE. IEEE Trans. Compon. Hybrids mfg Technol. 13(3), 565 (1990). This paper reviews the fabrication steps necessary to build high density multichip module substrates and covers some of the complex process decisions needed to obtain a system which will eventually be produced in high volumes. Thin-film-based high density multichip modules are necessary to achieve satisfactory performance in new electronic designs. Substrates built with vacuum deposited
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peripheral components with compound functions. Surface mounting has become the mainstream mounting method and the advance of surface mounting technology has greatly spurred the reduction of the size and weight of electronic equipment as well as the expansion of their capabilities. Chips are now used for passive components not only in general-purpose products, but also in many products with special applications and functions. This article introduces recent technological trends in passive components, with the focus on new products by Murata Manufacturing.
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CONSTRUCTION
metal and polymeric insulators have evolved in much more complex structures than traditional thin film hybrids. Measurement of the standoff height between a flip-mounted IC chip and its substrate. PETERA. HElMANN. IEEE Trans. Compon. Hybrids mfg Technol. 14(1), 187 (1991). A technique is described for measuring the standoff height for flip-chip solder bonding. It is a fast, nondestructive optical technique that requires no special sample preparation or unusual equipment. Its results agree well with those obtained by using the previous time consuming method of preparing a cross-section of the sample. This measurement technique is now being used extensively to characterize the flip-chip solder attachment process for new solder materials and new product codes. It can also be used to measure the standoff height between a surface mounted integrated circuit (IC) package and the underlying printed wiring board (PWR). The development of nitra-high-freqocney VLSI device test systems. C. W. RODRIGUES and D. E. HOFFMAN. I B M J. Res. Dev. 34(2/3), 260 (1990). The development of test systems for high-performance semiconductor logic and memory devices is discussed. The capabilities of shared-resource and tester-per-pin system architectures are reviewed. Test-system hardware design to provide high-speed pin electronics and generation of LSSD, weighted random, and algorithmic patterns is described. The reasons for the selection of the tester-per-pin system architecture are given in terms of the way in which overall system accuracy and test-system user flexibility are maximized for differing test methodologies. Combining analog simulation techniques optimizes designs. LESTERS. SANDERS.EDN, 237 (21 June 1990). Deterministic simulation helps refine your circuit design; statistical simulation can help improve the manufacturing yield. Just be sure you understand how the parameter values of your simulation models are determined. A discrete device and a monolithic device use the same model, but for accurate simulation, their parametric values will often differ. Clustered defects in IC fabrication: impact on process control charts. DAVID J. FRIEDMAN and SUSAN L. ALBIN. IEEE Trans. Semicond. Mfg 4(1), 36 (1991). A control chart is a graphical record of sample measurements to track a manufacturing process over time. Measurements above or below control limits alert operators and engineers that the process is out of control. In IC fabrication, standard process control charts for defects often sound many false alarms, i.e. the chart incorrectly indicates the process is out of control. The cause for these false alarms in some cases: defects in IC fabrication tend to cluster, basic assumptions that support the construction of standard control charts for defect data. A method for distinguishing between data from an in-control process that yields clustered defects and data from an out-of-control process is contained. Further, a method for
5. M I C R O E L E C T R O N I C S - - - D E S I G N The anisotropic model for simulation of a multilayer structure dry etching. PIOTR GLOWACK1 and ZBIGNIEW TKACZYK. Electron. Technol. 21(3/4), 61 (1988). In this paper a simple procedure for dry etching simulation by a ray method is described, and an algorithm to determine an anisotropic etch representing point's path is introduced. The final point's rate is determined by composition of etch rate vectors which represent various mechanisms of dry etching. Behaviour of the path for the multilayer structure case is considered using the refraction law. The etched layer masking effect is also taken into account. The advantages of a designed algorithm are its great simplicity and universality, so it can be of use for the most complicated cases of dry etching. Our model has been used for determination of the etched layer profile of the Ti-Mo-Au structure and has been compared with the other investigators' results. Designs meet needs of high-speed, high-density systems. TOM ORMOND. EDN, 50 (5 July 1990). Unconventional printed circuit boards, packaging, and connector designs let system designers take advantage of the performance capabilities of high-speed, high-density modern ICs. Principles of wet chemical processing in ULSI microfabrication. HIROHISA KIKYUAMA, KIYONORI SAKA, JUN TAKANO, ICHIRO KAWANABE, MASAYUK MIYASHITA and TADAHIRO OHMI. IEEE Trans. Semicond. Mfg 4(1), 26 (1991). Fine patterning technology for integrated device manufacturing requires properties such as surface cleanliness, surface smoothness, complete uniformity and complete etching linearity in wet chemical processing. In our work an improved chemical composition for buffered hydrogen fluoride (BHF: NH4F + HF + H20 ) is determined based on fundamental research into the chemical reaction mechanism of BHF and SiO2. Advanced wet chemical processing based on investigation of chemical reaction mechanisms and properties of liquid chemicals, concentrating on the SiO2 patterning process by BHF, is described. The principle of wet chemical processing in silicon technology is based on the following four items: the determination of the dominant reaction (etching) species, the influence of the solubility of the etching products in BHF on etching uniformity and linearity, stability of chemical composition without solid phase segregation, and an improvement of the wettability of liquid chemicals on the wafer surface by the addition of a surfactant are proposed. Fabrication of high density multichip modules. JOHN J. H. RECHE. IEEE Trans. Compon. Hybrids mfg Technol. 13(3), 565 (1990). This paper reviews the fabrication steps necessary to build high density multichip module substrates and covers some of the complex process decisions needed to obtain a system which will eventually be produced in high volumes. Thin-film-based high density multichip modules are necessary to achieve satisfactory performance in new electronic designs. Substrates built with vacuum deposited
293
peripheral components with compound functions. Surface mounting has become the mainstream mounting method and the advance of surface mounting technology has greatly spurred the reduction of the size and weight of electronic equipment as well as the expansion of their capabilities. Chips are now used for passive components not only in general-purpose products, but also in many products with special applications and functions. This article introduces recent technological trends in passive components, with the focus on new products by Murata Manufacturing.
AND
CONSTRUCTION
metal and polymeric insulators have evolved in much more complex structures than traditional thin film hybrids. Measurement of the standoff height between a flip-mounted IC chip and its substrate. PETERA. HElMANN. IEEE Trans. Compon. Hybrids mfg Technol. 14(1), 187 (1991). A technique is described for measuring the standoff height for flip-chip solder bonding. It is a fast, nondestructive optical technique that requires no special sample preparation or unusual equipment. Its results agree well with those obtained by using the previous time consuming method of preparing a cross-section of the sample. This measurement technique is now being used extensively to characterize the flip-chip solder attachment process for new solder materials and new product codes. It can also be used to measure the standoff height between a surface mounted integrated circuit (IC) package and the underlying printed wiring board (PWR). The development of nitra-high-freqocney VLSI device test systems. C. W. RODRIGUES and D. E. HOFFMAN. I B M J. Res. Dev. 34(2/3), 260 (1990). The development of test systems for high-performance semiconductor logic and memory devices is discussed. The capabilities of shared-resource and tester-per-pin system architectures are reviewed. Test-system hardware design to provide high-speed pin electronics and generation of LSSD, weighted random, and algorithmic patterns is described. The reasons for the selection of the tester-per-pin system architecture are given in terms of the way in which overall system accuracy and test-system user flexibility are maximized for differing test methodologies. Combining analog simulation techniques optimizes designs. LESTERS. SANDERS.EDN, 237 (21 June 1990). Deterministic simulation helps refine your circuit design; statistical simulation can help improve the manufacturing yield. Just be sure you understand how the parameter values of your simulation models are determined. A discrete device and a monolithic device use the same model, but for accurate simulation, their parametric values will often differ. Clustered defects in IC fabrication: impact on process control charts. DAVID J. FRIEDMAN and SUSAN L. ALBIN. IEEE Trans. Semicond. Mfg 4(1), 36 (1991). A control chart is a graphical record of sample measurements to track a manufacturing process over time. Measurements above or below control limits alert operators and engineers that the process is out of control. In IC fabrication, standard process control charts for defects often sound many false alarms, i.e. the chart incorrectly indicates the process is out of control. The cause for these false alarms in some cases: defects in IC fabrication tend to cluster, basic assumptions that support the construction of standard control charts for defect data. A method for distinguishing between data from an in-control process that yields clustered defects and data from an out-of-control process is contained. Further, a method for