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CVD films for interlayer dielectrics
World Abstracts on Microelectronics and Reliability Thin-film devices on silicon chip withstand up to 500°C. ROGERALLAN.Electronics p. 39 (3 January 1980). Resistors, capacitors fabricated from thin films can share ~ubstrate with MOS devices. A new approach to high volume hermetic hybrid packaging. M. SILVERSTEINand DR. J. E. SERGENT. Proc. Internepcon UK '79 p. 206, Brighton (16-18 October 1979). It was decided to use the substrate as the package bottom for the new process, and that a single piece five sided "dome" cover would complete the package with a hermetic joint. This concept led to a multilayer thick film process; the input/output (I/O) pads were spaced on 0.625 mm centers and fired onto the ceramic. Other circuitry layers were added as needed, followed by a dielectric layer just inside the substrate periphery but not covering the I/O pads. Finally, platinum gold was fired onto the dielectric to form a solderable seal ring. This type substrate is shown in lower left hand corner of Figure l ; note that several other substrates-are also shown having different sizes and circuits. The cover to substrate joint is made by simple solder reflow; it was found necessary to place a small inward dimpled vent hole in the cover top surface to allow pressure equalisation at room temperature. The final seal step was to back fill with clean dry nitrogen and helium gases followed by a wiping action of molten solder across the vent hole for final hermetic seal. Preliminary studies of a thick film hybrid base coupled logic (BCL) circuit. D. J. DARUVALAand B. S. CHHINA. Proc. lnternepcon UK '79 p. 215, Brighton (16-18 October 1979). Modern trends in digital data processing are requiring the handling of continually increasing quantities of information. This has stimulated the need for higher processing rates, with the consequent increases in machine density and system reliability. These requirements can only be met by using high speed logic. There are a number of factors which limit switching speed. These are: (i) Minority carrier storage (ii) Cut off frequency of the transistors, fiT) (iii) Circuit time constants due to stray inductance and capacitance (iv) The type of packaging system used (v) Inter-chip interconnections and their propagation delays (vi) Distortion due to internal signal reflections. In practice these problems are most effectively solved by the use of Emitter Coupled Logic (ECL). A non-saturating logic eliminates minority carrier storage. The technology produces a high enough fT and the choice of package layout minimises strays. Further improvements may be made by using multichip hybrid assemblies eliminating the individual packages and the printed circuit board. This paper looks at experimental work on another nonsaturating logic family. Practical cleaning procedures for vacuum deposition equipmerit. DENNIS R. NICHOLS. Solid-St. Technol. p. 73 (December 1979). An orderly procedure is established and described for the disassembly, cleaning, reassembly and requalification of vacuum systems. Each step relates closely to all the others and can never be considered in isolation. The applicability of acoustic emission as a non-destructive test for hybrid microelectronic circuits. J. SAVAGE,R. T. W. MORRISON and R. E. COOPER. Proc. Internepcon UK '79 p. 192, Brighton (16-18 October 1979). The achievement of a high production yield and of high reliability during operation are objectives of primary importance in hybrid microelectronic circuit manufacture. Both of these objectives
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can be achieved by the determination of and strict adherence to optimum processing parameters and conditions and this is the basis of the BS 9000 scheme (1): In addition to the application of such standards it is desirable to apply functional testing at least to the final product and in some cases at intermediate stages to sub-assemblies. This paper is conceraed with the applicability of kinds of testing other than functional testing ~nd in particular it is concerned with the technique of acoustic emission. Sin~ this technique is not one normally encountered in electronics if is described briefly in one of the" following sections before giving an account of the application Of it to some hybrid assemblies. Fabrication of a six level multilayer structure. D..J. GERRY and R. E: COTE. Proc. lnternepcon UK '79 p. 223, Brighton (16-18 October 1979). The hybrid microelectronics industry has developed to the point where an increasing number of highly complex circuits are being desigfied with thick film components. Many complex circuits are'sophisticated multilayer structures coritaining several conductor and dielectric layers. High yield production of these multilayers requires careful selection of materials and attention to process techniques. This paper describes the fabrication of a six conductor level multilayer structure which becomes an analog multiplex circuit for an airborne radar system after resistors, capacitors, and integrated circuits are added. Materials selection is discussed briefly, but major emphasis is placed on the process aspects of the febrication. A summary of the entire process sequence is followed by detailed discussion of conductor level, via post and dielectric level printing. The screens and printing conditions used for each material are discussed with the focus on problems such as the effect on via resolution of size mismatch between dielectric vias and via posts. Process parameters that affect dielectric thickness, via resolution and pinhole frequency are discussed. Cleanliness considerations during fabrication are also covered. Conclusions include recommendations for improvements in process techniques. Magnetron sputtered titanium-tungsten films. MICHAEL HILL. Solid-St. Technol. p. 53 (January 1980). The sputtered titanium-tungsten metallization system was investigated with respect to the effects of deposition parameters on thin film properties. R.F. diode and d.c. and r.f. magnetron deposited films are compared for specific resistivity and diffusion barrier properties. Techniques are proposed to produce equivalent high quality, reproducible films from all techniques. Analytical techniques are also outlined for the assessment of the variously deposited films, and mechanisms are proposed for the effects of various deposition parameters on film properties. Target fabrication considerations and target performance characteristics, such as flaking, are also assessed. Thick-film heads print 8 dots/mm. LARRY WALLER. Electron. p. 191 (14 February 1980). Thermal units from Japan incorporate all enabling electronics and have printing times of 2 ms per line. CVD films for interlayer dielectrics. BRAD MATTSON. Solid-St. Technol. p. 60 (January 1980). Finer device geometries dictate improved interlayer dielectrics in multilevel devices. Chemical Vapor Deposition (CVD) techniques, including plasma enhanced CVD, offer a wide variety of film properties to meet the challenge of the new devices. A recently developed film, plasma oxide, offers the optimum choice for new interlayer dielectrics.
551
can be achieved by the determination of and strict adherence to optimum processing parameters and conditions and this is the basis of the BS 9000 scheme (1): In addition to the application of such standards it is desirable to apply functional testing at least to the final product and in some cases at intermediate stages to sub-assemblies. This paper is conceraed with the applicability of kinds of testing other than functional testing ~nd in particular it is concerned with the technique of acoustic emission. Sin~ this technique is not one normally encountered in electronics if is described briefly in one of the" following sections before giving an account of the application Of it to some hybrid assemblies. Fabrication of a six level multilayer structure. D..J. GERRY and R. E: COTE. Proc. lnternepcon UK '79 p. 223, Brighton (16-18 October 1979). The hybrid microelectronics industry has developed to the point where an increasing number of highly complex circuits are being desigfied with thick film components. Many complex circuits are'sophisticated multilayer structures coritaining several conductor and dielectric layers. High yield production of these multilayers requires careful selection of materials and attention to process techniques. This paper describes the fabrication of a six conductor level multilayer structure which becomes an analog multiplex circuit for an airborne radar system after resistors, capacitors, and integrated circuits are added. Materials selection is discussed briefly, but major emphasis is placed on the process aspects of the febrication. A summary of the entire process sequence is followed by detailed discussion of conductor level, via post and dielectric level printing. The screens and printing conditions used for each material are discussed with the focus on problems such as the effect on via resolution of size mismatch between dielectric vias and via posts. Process parameters that affect dielectric thickness, via resolution and pinhole frequency are discussed. Cleanliness considerations during fabrication are also covered. Conclusions include recommendations for improvements in process techniques. Magnetron sputtered titanium-tungsten films. MICHAEL HILL. Solid-St. Technol. p. 53 (January 1980). The sputtered titanium-tungsten metallization system was investigated with respect to the effects of deposition parameters on thin film properties. R.F. diode and d.c. and r.f. magnetron deposited films are compared for specific resistivity and diffusion barrier properties. Techniques are proposed to produce equivalent high quality, reproducible films from all techniques. Analytical techniques are also outlined for the assessment of the variously deposited films, and mechanisms are proposed for the effects of various deposition parameters on film properties. Target fabrication considerations and target performance characteristics, such as flaking, are also assessed. Thick-film heads print 8 dots/mm. LARRY WALLER. Electron. p. 191 (14 February 1980). Thermal units from Japan incorporate all enabling electronics and have printing times of 2 ms per line. CVD films for interlayer dielectrics. BRAD MATTSON. Solid-St. Technol. p. 60 (January 1980). Finer device geometries dictate improved interlayer dielectrics in multilevel devices. Chemical Vapor Deposition (CVD) techniques, including plasma enhanced CVD, offer a wide variety of film properties to meet the challenge of the new devices. A recently developed film, plasma oxide, offers the optimum choice for new interlayer dielectrics.