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Flexible technology for large-size E-paper displays
Current Applied Physics 10 (2010) e127ee130
Contents lists available at ScienceDirect
Current Applied Physics journal homepage: www.elsevier.com/locate/cap
Flexible technology for large-size E-paper displays Chang-Dong Kim, Seung-Han Paek, Jong-Kwon Lee*, Yong-In Park, Yong-Kee Hwang R&D Center, LG Display Co. Ltd., Paju-shi, Gyeonggi-do 413-811, Republic of Korea
a r t i c l e i n f o
a b s t r a c t
Article history: Received 30 December 2009 Received in revised form 20 July 2010 Accepted 22 August 2010 Available online 17 September 2010
To realize a flexible large-size e-paper, there are key technological issues of flexible process such as transferring method and thermal stability of the substrate and the device. Thus, new transferring method using a thick stainless steel substrates (STS430) prepared with multi-barrier layers has been developed along with back side etch technique in order to use current LCD infrastructure. Also, relatively high temperature process of 250 C to achieve reliable amorphous silicon thin-film transistor backplanes has been developed. Then, we have successfully demonstrated A3-size flexible e-paper display with integrated gate driver-circuits using thin-film transistors on the flexible panel, and suggest the tiling method for implementing 40 inch and above size e-paper displays. Ó 2010 Published by Elsevier B.V.
Keywords: Electronic-paper Flexible display Stainless steel substrate
1. Introduction Flexible displays have been attracted much attention as a next generation display for their ultra-slim, lighteweight, durable, and conformable properties [1,2]. In order to fabricate flexible displays, the flexible sheets such as plastics and metal foils instead of using glasses have been developed as a substrate material. Plastic substrates have merits of transparent, light, and even rollable properties, but there are low Tg and moisture permeation issue. Thus, the plastic substrate was pre-annealed to allow shrink before starting the conventional a-Si TFT (amorphous silicon thin-film transistor) process due to the thermal expansion and shrinkage of it during the TFT thermal process. On the other hand, the metal substrate has more advantages than other flexible substrates composed of organic materials in terms of process stability at a relatively high temperature, excellent dimensional stability, and good barrier characteristics against oxygen and moisture [3]. Thus, it can be used to make transistors without any pre-processing such as pre-annealing and encapsulation. Many interesting and technically progressive prototypes of flexible displays using the STS (stainless steel) foil have been reported [4e7], which makes us to have expectations for the flexible display products in the near future. Also, we have developed various flexible AMEPD (active matrix electronic paper display) on this STS foil using electrophoretic ink films since 2005 [8,9]. In order to use STS foils as a flexible substrate, ‘Bondinge Debonding’ process has to be developed to implement flexible displays using current LCD infrastructure, where the thin STS substrate was firstly bonded on a glass substrate with an adhesive material * Corresponding author. Tel./fax: þ82 31 933 5051. E-mail address: [email protected] (J.-K. Lee). 1567-1739/$ e see front matter Ó 2010 Published by Elsevier B.V. doi:10.1016/j.cap.2010.08.021
and then carried with the glass substrate. After completing all TFT processes, carrier glass was released by debonding process. Here, there is a limitation of process temperature due to the thermal property of organic adhesive layer between the carrier glass and the thin metal foil, so that we have to fabricate TFT at a lower temperature of less than 200 C, resulting in poor stability of the switching device. Also, it has not been yet developed a large-area flexible display over A4-size (14-inch) due to the issues of flexible process such as a difficulty of transferring large flexible substrates in Gen. 2 (370 mm 470 mm) line above, many process defects (peeling, particle. etc), and surface defects of the STS substrate itself. Moreover, it is not easy to apply integrated GIP (Gate driver In the Panel) technology to enhance the flexibility of the display due to the poor TFT performance on STS carried out below 200 C. Thus, robust backplane processes are essential in view of developing and manufacturing the flexible display. In this paper, we describe our so-called ‘Single Plate Process’ based on conventional a-Si TFT processes to resolve the issues of flexible process on the STS for making a large-size e-paper display and improve the performance of flexible TFTs on it suitable for applying GIP technology. Then, A3-size (e19 inch) AMEPD prototype fabricated with current a-Si TFT infrastructure is demonstrated.
2. Experimental 2.1. Fabrication of flexible backplane A relatively thick STS 430 plate instead of a thin STS 304 foil was used as a substrate to adopt simple processes without using any carrier glasses and an additional adhesive layer. This thick STS
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C.-D. Kim et al. / Current Applied Physics 10 (2010) e127ee130
a
a-Si:H TFT on a Stainless Steel 1.E-04 STS Vd=1V
1.E-05
Log Drain Current (A)
1.E-06
STS Vd=10V
1.E-07 Heat 1V 1.E-08 1.E-09
Heat 10V
1.E-10 BTS 1V 1.E-11 BTS 10V
1.E-12 1.E-13 -25
-20
-15
-10
-5
0
5
10
15
20
25
Gate Voltage (V)
a-Si:H TFT (Standard)
b 1.E-04
Standard Vd=1V
1.E-05
Log Drain Current (A)
1.E-06
Standard Vd=10V
1.E-07 Heat 1V 1.E-08 Heat 10V
1.E-09 1.E-10
BTS 1V 1.E-11 BTS 10V
1.E-12 1.E-13 -25
Fig. 1. AFM images of before (a) and after (b) multi-barrier layer formation on a thick STS substrate.
enabled us to transfer it stably in a conventional Gen. 2 line as glass substrates because it has almost the same bending radius as the glass substrate. In addition, we can start to run the sample with just initial cleaning process and adopt high temperature process because of no adhesive layer, resulting in no degradation of TFT characteristics. To improve the surface defects such as protrusions
-20
-15
-10
-5
0
5
10
15
20
25
Gate Voltage (V) Fig. 3. (a) Initial (Gray curves), Heat treatment (Blue curves), and BTS (Red curves) characteristics of a-Si:H TFTs fabricated on stainless steel substrate at 250 C and (b) those on glass substrate at 350 C (For interpretation of the references to colour in this figure legend, the reader is referred to the web version of this article).
and dents of the STS, the one-side of it was polished mechanically. Then, a multi-barrier structure was developed by coating 3 mm thick polymer resin and depositing 0.4 mm thick PECVD (Plasma Enhanced Chemical Vapor Deposition) silicon nitride to further
Fig. 2. (a) Schematic cross section and (b) optical microscope of a-Si:H TFTs on a thick STS substrate.
C.-D. Kim et al. / Current Applied Physics 10 (2010) e127ee130
planarize the metal surface. Fig. 1 compares the AFM (Atomic Force Microscopy) images of before and after the multi-barrier layer formation on the thick STS substrate. RMS value of the surface roughness was decreased from 994 Å to 88 Å after planarizing the surface of it. This multi-barrier structure protects the STS substrate containing Fe from chemical damage owing to metal etchant during the TFT process, as well as prevents layer peeling and outgasing to achieve process stability. Then, the backplane comprising of a-Si TFT array was fabricated using a conventional 5-mask steps with back channel etched configuration at the process temperature of 250 C. The gate metals, source/drain metals, pixel ITO (indiumetineoxide) were deposited by dc magnetron sputtering. SiNx, a-Si:H, and nþ a-Si:H layers were deposited by PECVD without breaking the vacuum. SiNx and a-Si:H layers were deposited using a SiH4/NH3/N2/H2 and SiH4/H2 mixture. The semiconductor and insulator layers were patterned by RIE (reactive ion etching) while the metal layers were patterned with wet etching. As shown in Fig. 2(a), this structure is no difference from the conventional 5 mask processed TFT, except the conducting substrate and the insulating material on it. After that, this thick STS substrate was chemically etched from the back side to make it thin and flexible. Here, since the major component of the STS, iron (Fe) is chemically reacted with FeCl2, the irons at the surface of STS are easily desorbed and defused in the etchant, so that the back side of it is etched with stable condition. The final thickness of this thin STS is about 100um and it has a good flexibility enough to be rollable. And, this “Single Plate Process” is very useful for adopting current equipments for mass-production.
e129
Table 1 Characteristic Comparison of flexible TFT at 250 C with standard TFT at 350 C. Split
Standard TFT (350 C)
Flexible TFT (250 C)
Condition
Initial
Heat
BTS
Initial
Heat
BTS
Mobility(cm2/Vs) SS(V/dec.) Vth(Sat.) Vth(Lin.) Ion(gA)
0.37 0.73 1.7 0.1 0.4
0.6 0.78 e0.9 e0.4 0.66
0.57 0.89 0.8 1.1 0.59
0.35 0.69 2.1 0.8 0.36
0.54 0.79 1.5 0.1 0.57
0.52 0.9 2.8 1.6 0.5
had to be reduced by adjusting the distance between the neighboring pixels. Generally, in the active matrix display, there exist two kinds of driver electronics such as row drivers (scanning IC) and column drivers (Source IC), which are still rigid parts of the display. It means that the bending radius of flexible display module could be restricted in the two directions. If we can eliminate raw drivers by means of applying GIP technology, the flexibility of the display module will be increased in one direction. Thus, the display was designed to integrate the gate driver circuits in the panel by using a dual pull-down transistors structure to maximize the lifetime of a circuit [10]. The a-Si TFT based gate drivers consisting of a 1600 stage shift register were embedded at the both sides of gate lines in the panel at the process temperature of 250 C. Also, we have replaced control PCB (printed-circuit board) and TCP (Tape-carrier package) with flexible components. Then, the front plane consisting of coated electrophoretic inks on a polyester/ITO (indiumetine oxide) sheet was laminated onto the TFT array.
2.2. Display design 3. Results and discussion The display was designed to provide high information in a large A3-size flexible AMEPD for public display application with the high resolution of WQXGA, 2560 1600 pixels. The aperture ratio of a pixel is around 90%. TFT array structure was designed with U type dual TFTs and width/length dimension of 90/4 ㎛/㎛ as shown in the Fig. 2(b) in order to increase the charging ratio and the voltage holding ratio of the TFT while reducing the voltage shift and Off current level. In addition, the fringe field effect of encapsulated pigments placed on each pixel due to neighboring pixel electrodes
3.1. Transistor performance The transfer curves of the flexible TFT fabricated at 250 C on STS are shown in Fig. 3(a) with varying Vds voltages. Initial property of the a-Si:H TFTs on STS is marked by gray curve, while the blue and the red curves represent electrical properties after heat treatment and bias-temperature stress (BTS), respectively. This flexible TFT shows equivalent results with the standard a-Si:H TFTs at 350 C on
Fig. 4. Photographs of flexible A3-size AMEPD on the STS substrate with GIP technology after being bent.
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C.-D. Kim et al. / Current Applied Physics 10 (2010) e127ee130
glass as shown in Fig. 3(b). The electric characteristics of this a-Si TFT fabricated at 250 C are summarized and compared with those of standard device in Table 1. The a-Si:H TFTs on STS substrate have shown slightly lower Ion and higher Vth than standard devices, resulting from the fact that band bending of them becomes more slightly inversion than that of standard TFT. And the other device parameters for both a-Si TFTs show almost the same values except slightly lower ID in case of TFT on STS. Thus, a-Si TFTs fabricated on this STS substrate reveal the strong possibility for use in various flexible display applications. 3.2. Display performance A3-size flexible AMEPD has been developed with the resolution of 2560 1600 lines (163 ppi). All the processes were achieved at less than 250 C on STS substrate. Its module thickness and the weight are less than a half of conventional AMEPD on a glass substrate. It reveals reflectance of about 40% and contrast ratio of 7:1 with showing omni-directional viewing angle, making it as easy to read as a printed page. Moreover, it has been firstly realized to apply GIP technology to the flexible AMEPD. Fig. 4 shows photographs of the flexible AMEPD panel embedded GIP technology with being bent for two directions. The image quality of new flexible AMEPD with GIP reveals an equivalent performance with that of AMEPD fabricated on a glass substrate in terms of reflectance, contrast ratio, and image stability. Furthermore, we can construct 40 inch-size flexible EPD with 2 2 A3-size EPD tile for digital signage applications, which requires narrow bezel with 10 mm or less and a multi-screen controller adaptable for an EPD driving system.
prevent chemical damage during the TFT process. Due to the process temperature limitation of using bonding-debonding method for substrate transport, the reliability of a-Si TFT fabricated below 200 C exhibits rather poor device stability under biastemperature stress. To increase the process temperature and thus achieve sufficiently reliable TFT backplanes, new planarization and transporting methods for the stainless steel substrate has been developed. We also have reduced the number of drive-IC components by integration of gate driver using TFT devices and replaced the rigid plastic control PCBs with flexible printed circuits. Then, we have successfully developed A3-size largest flexible AMEPD with adopting GIP technology. Furthermore, 40 inch and above size flexible EPD with high resolution can be realized by using the tiling method for digital signage applications. Thus, our flexible technologies reveal enough possibility for use in large flexible display applications.
Acknowledgement The authors would like to give thanks to all the members of R&D Team for fully supporting and cooperation in this work.
References [1] [2] [3] [4] [5] [6]
4. Conclusion Preparing the metal foil substrate for manufacturing flexible AMEPD display is a demanding process, which involves coating of thick planarization layer to reduce the surface roughness and
[7] [8] [9] [10]
K.J. Allen, Proc. IEEE 93 (8) (2005) 1394e1399 (2005). C.-D. Kim, I.-B. Kang, I.-J. Chung, SID 07 DIGEST 58.1 (2007) 1669. M. Wu, K. Pangal, J.C. Sturm, S. Wagner, Appl. Phys. Lett. 75 (1999) 2244. P.-C. Kuo, J.-R. Abbas, M. Hatalis, Appl. Phys. Lett. 91 (24) (2007). Z. Lisong, W. Alfred, S.-C. Wu, S. Jie, S.-K. Park, T.N. Jackson, Appl. Phys. Lett. 88 (8) (2006). Michael Hack, Richard Hewitt, Ken Urbanik, Anna Chwang, Julie J. Brown, IMID/IDMC ’06 DIGEST (2006) 305 16-1. Tai Hong Yim, SenugHyun Koo, HeungYeol Lee, Curr. Appl. Phys. In Press, (2009) C.-D. Kim, S.-Y. Yoon, S.-H. Jung, J.-S. Yoo, J.-K. Lee, Y.-I. Park, I.B. Kang, and I.-J. Chung, in: Proc. SID Dig., 2009,pp. 194. J.K. Lee, C.D. Kim, I.B. Kang, I.J. Chung, IDW 2007, (2007) p.1291. Yong Ho Jang, Jpn. J. Appl. Phys. 45 (2006) 6806e6811.
Contents lists available at ScienceDirect
Current Applied Physics journal homepage: www.elsevier.com/locate/cap
Flexible technology for large-size E-paper displays Chang-Dong Kim, Seung-Han Paek, Jong-Kwon Lee*, Yong-In Park, Yong-Kee Hwang R&D Center, LG Display Co. Ltd., Paju-shi, Gyeonggi-do 413-811, Republic of Korea
a r t i c l e i n f o
a b s t r a c t
Article history: Received 30 December 2009 Received in revised form 20 July 2010 Accepted 22 August 2010 Available online 17 September 2010
To realize a flexible large-size e-paper, there are key technological issues of flexible process such as transferring method and thermal stability of the substrate and the device. Thus, new transferring method using a thick stainless steel substrates (STS430) prepared with multi-barrier layers has been developed along with back side etch technique in order to use current LCD infrastructure. Also, relatively high temperature process of 250 C to achieve reliable amorphous silicon thin-film transistor backplanes has been developed. Then, we have successfully demonstrated A3-size flexible e-paper display with integrated gate driver-circuits using thin-film transistors on the flexible panel, and suggest the tiling method for implementing 40 inch and above size e-paper displays. Ó 2010 Published by Elsevier B.V.
Keywords: Electronic-paper Flexible display Stainless steel substrate
1. Introduction Flexible displays have been attracted much attention as a next generation display for their ultra-slim, lighteweight, durable, and conformable properties [1,2]. In order to fabricate flexible displays, the flexible sheets such as plastics and metal foils instead of using glasses have been developed as a substrate material. Plastic substrates have merits of transparent, light, and even rollable properties, but there are low Tg and moisture permeation issue. Thus, the plastic substrate was pre-annealed to allow shrink before starting the conventional a-Si TFT (amorphous silicon thin-film transistor) process due to the thermal expansion and shrinkage of it during the TFT thermal process. On the other hand, the metal substrate has more advantages than other flexible substrates composed of organic materials in terms of process stability at a relatively high temperature, excellent dimensional stability, and good barrier characteristics against oxygen and moisture [3]. Thus, it can be used to make transistors without any pre-processing such as pre-annealing and encapsulation. Many interesting and technically progressive prototypes of flexible displays using the STS (stainless steel) foil have been reported [4e7], which makes us to have expectations for the flexible display products in the near future. Also, we have developed various flexible AMEPD (active matrix electronic paper display) on this STS foil using electrophoretic ink films since 2005 [8,9]. In order to use STS foils as a flexible substrate, ‘Bondinge Debonding’ process has to be developed to implement flexible displays using current LCD infrastructure, where the thin STS substrate was firstly bonded on a glass substrate with an adhesive material * Corresponding author. Tel./fax: þ82 31 933 5051. E-mail address: [email protected] (J.-K. Lee). 1567-1739/$ e see front matter Ó 2010 Published by Elsevier B.V. doi:10.1016/j.cap.2010.08.021
and then carried with the glass substrate. After completing all TFT processes, carrier glass was released by debonding process. Here, there is a limitation of process temperature due to the thermal property of organic adhesive layer between the carrier glass and the thin metal foil, so that we have to fabricate TFT at a lower temperature of less than 200 C, resulting in poor stability of the switching device. Also, it has not been yet developed a large-area flexible display over A4-size (14-inch) due to the issues of flexible process such as a difficulty of transferring large flexible substrates in Gen. 2 (370 mm 470 mm) line above, many process defects (peeling, particle. etc), and surface defects of the STS substrate itself. Moreover, it is not easy to apply integrated GIP (Gate driver In the Panel) technology to enhance the flexibility of the display due to the poor TFT performance on STS carried out below 200 C. Thus, robust backplane processes are essential in view of developing and manufacturing the flexible display. In this paper, we describe our so-called ‘Single Plate Process’ based on conventional a-Si TFT processes to resolve the issues of flexible process on the STS for making a large-size e-paper display and improve the performance of flexible TFTs on it suitable for applying GIP technology. Then, A3-size (e19 inch) AMEPD prototype fabricated with current a-Si TFT infrastructure is demonstrated.
2. Experimental 2.1. Fabrication of flexible backplane A relatively thick STS 430 plate instead of a thin STS 304 foil was used as a substrate to adopt simple processes without using any carrier glasses and an additional adhesive layer. This thick STS
e128
C.-D. Kim et al. / Current Applied Physics 10 (2010) e127ee130
a
a-Si:H TFT on a Stainless Steel 1.E-04 STS Vd=1V
1.E-05
Log Drain Current (A)
1.E-06
STS Vd=10V
1.E-07 Heat 1V 1.E-08 1.E-09
Heat 10V
1.E-10 BTS 1V 1.E-11 BTS 10V
1.E-12 1.E-13 -25
-20
-15
-10
-5
0
5
10
15
20
25
Gate Voltage (V)
a-Si:H TFT (Standard)
b 1.E-04
Standard Vd=1V
1.E-05
Log Drain Current (A)
1.E-06
Standard Vd=10V
1.E-07 Heat 1V 1.E-08 Heat 10V
1.E-09 1.E-10
BTS 1V 1.E-11 BTS 10V
1.E-12 1.E-13 -25
Fig. 1. AFM images of before (a) and after (b) multi-barrier layer formation on a thick STS substrate.
enabled us to transfer it stably in a conventional Gen. 2 line as glass substrates because it has almost the same bending radius as the glass substrate. In addition, we can start to run the sample with just initial cleaning process and adopt high temperature process because of no adhesive layer, resulting in no degradation of TFT characteristics. To improve the surface defects such as protrusions
-20
-15
-10
-5
0
5
10
15
20
25
Gate Voltage (V) Fig. 3. (a) Initial (Gray curves), Heat treatment (Blue curves), and BTS (Red curves) characteristics of a-Si:H TFTs fabricated on stainless steel substrate at 250 C and (b) those on glass substrate at 350 C (For interpretation of the references to colour in this figure legend, the reader is referred to the web version of this article).
and dents of the STS, the one-side of it was polished mechanically. Then, a multi-barrier structure was developed by coating 3 mm thick polymer resin and depositing 0.4 mm thick PECVD (Plasma Enhanced Chemical Vapor Deposition) silicon nitride to further
Fig. 2. (a) Schematic cross section and (b) optical microscope of a-Si:H TFTs on a thick STS substrate.
C.-D. Kim et al. / Current Applied Physics 10 (2010) e127ee130
planarize the metal surface. Fig. 1 compares the AFM (Atomic Force Microscopy) images of before and after the multi-barrier layer formation on the thick STS substrate. RMS value of the surface roughness was decreased from 994 Å to 88 Å after planarizing the surface of it. This multi-barrier structure protects the STS substrate containing Fe from chemical damage owing to metal etchant during the TFT process, as well as prevents layer peeling and outgasing to achieve process stability. Then, the backplane comprising of a-Si TFT array was fabricated using a conventional 5-mask steps with back channel etched configuration at the process temperature of 250 C. The gate metals, source/drain metals, pixel ITO (indiumetineoxide) were deposited by dc magnetron sputtering. SiNx, a-Si:H, and nþ a-Si:H layers were deposited by PECVD without breaking the vacuum. SiNx and a-Si:H layers were deposited using a SiH4/NH3/N2/H2 and SiH4/H2 mixture. The semiconductor and insulator layers were patterned by RIE (reactive ion etching) while the metal layers were patterned with wet etching. As shown in Fig. 2(a), this structure is no difference from the conventional 5 mask processed TFT, except the conducting substrate and the insulating material on it. After that, this thick STS substrate was chemically etched from the back side to make it thin and flexible. Here, since the major component of the STS, iron (Fe) is chemically reacted with FeCl2, the irons at the surface of STS are easily desorbed and defused in the etchant, so that the back side of it is etched with stable condition. The final thickness of this thin STS is about 100um and it has a good flexibility enough to be rollable. And, this “Single Plate Process” is very useful for adopting current equipments for mass-production.
e129
Table 1 Characteristic Comparison of flexible TFT at 250 C with standard TFT at 350 C. Split
Standard TFT (350 C)
Flexible TFT (250 C)
Condition
Initial
Heat
BTS
Initial
Heat
BTS
Mobility(cm2/Vs) SS(V/dec.) Vth(Sat.) Vth(Lin.) Ion(gA)
0.37 0.73 1.7 0.1 0.4
0.6 0.78 e0.9 e0.4 0.66
0.57 0.89 0.8 1.1 0.59
0.35 0.69 2.1 0.8 0.36
0.54 0.79 1.5 0.1 0.57
0.52 0.9 2.8 1.6 0.5
had to be reduced by adjusting the distance between the neighboring pixels. Generally, in the active matrix display, there exist two kinds of driver electronics such as row drivers (scanning IC) and column drivers (Source IC), which are still rigid parts of the display. It means that the bending radius of flexible display module could be restricted in the two directions. If we can eliminate raw drivers by means of applying GIP technology, the flexibility of the display module will be increased in one direction. Thus, the display was designed to integrate the gate driver circuits in the panel by using a dual pull-down transistors structure to maximize the lifetime of a circuit [10]. The a-Si TFT based gate drivers consisting of a 1600 stage shift register were embedded at the both sides of gate lines in the panel at the process temperature of 250 C. Also, we have replaced control PCB (printed-circuit board) and TCP (Tape-carrier package) with flexible components. Then, the front plane consisting of coated electrophoretic inks on a polyester/ITO (indiumetine oxide) sheet was laminated onto the TFT array.
2.2. Display design 3. Results and discussion The display was designed to provide high information in a large A3-size flexible AMEPD for public display application with the high resolution of WQXGA, 2560 1600 pixels. The aperture ratio of a pixel is around 90%. TFT array structure was designed with U type dual TFTs and width/length dimension of 90/4 ㎛/㎛ as shown in the Fig. 2(b) in order to increase the charging ratio and the voltage holding ratio of the TFT while reducing the voltage shift and Off current level. In addition, the fringe field effect of encapsulated pigments placed on each pixel due to neighboring pixel electrodes
3.1. Transistor performance The transfer curves of the flexible TFT fabricated at 250 C on STS are shown in Fig. 3(a) with varying Vds voltages. Initial property of the a-Si:H TFTs on STS is marked by gray curve, while the blue and the red curves represent electrical properties after heat treatment and bias-temperature stress (BTS), respectively. This flexible TFT shows equivalent results with the standard a-Si:H TFTs at 350 C on
Fig. 4. Photographs of flexible A3-size AMEPD on the STS substrate with GIP technology after being bent.
e130
C.-D. Kim et al. / Current Applied Physics 10 (2010) e127ee130
glass as shown in Fig. 3(b). The electric characteristics of this a-Si TFT fabricated at 250 C are summarized and compared with those of standard device in Table 1. The a-Si:H TFTs on STS substrate have shown slightly lower Ion and higher Vth than standard devices, resulting from the fact that band bending of them becomes more slightly inversion than that of standard TFT. And the other device parameters for both a-Si TFTs show almost the same values except slightly lower ID in case of TFT on STS. Thus, a-Si TFTs fabricated on this STS substrate reveal the strong possibility for use in various flexible display applications. 3.2. Display performance A3-size flexible AMEPD has been developed with the resolution of 2560 1600 lines (163 ppi). All the processes were achieved at less than 250 C on STS substrate. Its module thickness and the weight are less than a half of conventional AMEPD on a glass substrate. It reveals reflectance of about 40% and contrast ratio of 7:1 with showing omni-directional viewing angle, making it as easy to read as a printed page. Moreover, it has been firstly realized to apply GIP technology to the flexible AMEPD. Fig. 4 shows photographs of the flexible AMEPD panel embedded GIP technology with being bent for two directions. The image quality of new flexible AMEPD with GIP reveals an equivalent performance with that of AMEPD fabricated on a glass substrate in terms of reflectance, contrast ratio, and image stability. Furthermore, we can construct 40 inch-size flexible EPD with 2 2 A3-size EPD tile for digital signage applications, which requires narrow bezel with 10 mm or less and a multi-screen controller adaptable for an EPD driving system.
prevent chemical damage during the TFT process. Due to the process temperature limitation of using bonding-debonding method for substrate transport, the reliability of a-Si TFT fabricated below 200 C exhibits rather poor device stability under biastemperature stress. To increase the process temperature and thus achieve sufficiently reliable TFT backplanes, new planarization and transporting methods for the stainless steel substrate has been developed. We also have reduced the number of drive-IC components by integration of gate driver using TFT devices and replaced the rigid plastic control PCBs with flexible printed circuits. Then, we have successfully developed A3-size largest flexible AMEPD with adopting GIP technology. Furthermore, 40 inch and above size flexible EPD with high resolution can be realized by using the tiling method for digital signage applications. Thus, our flexible technologies reveal enough possibility for use in large flexible display applications.
Acknowledgement The authors would like to give thanks to all the members of R&D Team for fully supporting and cooperation in this work.
References [1] [2] [3] [4] [5] [6]
4. Conclusion Preparing the metal foil substrate for manufacturing flexible AMEPD display is a demanding process, which involves coating of thick planarization layer to reduce the surface roughness and
[7] [8] [9] [10]
K.J. Allen, Proc. IEEE 93 (8) (2005) 1394e1399 (2005). C.-D. Kim, I.-B. Kang, I.-J. Chung, SID 07 DIGEST 58.1 (2007) 1669. M. Wu, K. Pangal, J.C. Sturm, S. Wagner, Appl. Phys. Lett. 75 (1999) 2244. P.-C. Kuo, J.-R. Abbas, M. Hatalis, Appl. Phys. Lett. 91 (24) (2007). Z. Lisong, W. Alfred, S.-C. Wu, S. Jie, S.-K. Park, T.N. Jackson, Appl. Phys. Lett. 88 (8) (2006). Michael Hack, Richard Hewitt, Ken Urbanik, Anna Chwang, Julie J. Brown, IMID/IDMC ’06 DIGEST (2006) 305 16-1. Tai Hong Yim, SenugHyun Koo, HeungYeol Lee, Curr. Appl. Phys. In Press, (2009) C.-D. Kim, S.-Y. Yoon, S.-H. Jung, J.-S. Yoo, J.-K. Lee, Y.-I. Park, I.B. Kang, and I.-J. Chung, in: Proc. SID Dig., 2009,pp. 194. J.K. Lee, C.D. Kim, I.B. Kang, I.J. Chung, IDW 2007, (2007) p.1291. Yong Ho Jang, Jpn. J. Appl. Phys. 45 (2006) 6806e6811.