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High Ge content photodetectors on thin SiGe buffers
Materials Science and Engineering B89 (2002) 77 – 83
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High Ge content photodetectors on thin SiGe buffers M. Bauer a,*, C. Scho¨llhorn a, K. Lyutovich a, E. Kasper a , M. Jutzi b, M. Berroth b a b
Institut fu¨r Halbleitertechnik, Uni6ersita¨t Stuttgart, Pfaffenwaldring 47, 70569 Stuttgart, Germany Institut fu¨r Elektrische und Optische Nachrichtentechnik, Uni6ersita¨t Stuttgart, Stuttgart, Germany
Abstract PIN SiGe photodetectors (PD) are grown by MBE with Ge contents x = 0, 0.10, 0.2, 0.27 and 0.5. For PDs with high Ge content, which are grown beyond the SiGe layer critical thickness, thin (sub 100 nm) strain relaxed, p+(B)-doped SiGe buffers are of special importance. The layer structure of the samples consists of a 5 ×1018 cm − 3 p+(B)-doped buffer layer as a bottom contact, followed by a 300 nm intrinsic active zone covered with a 3 ×1020 cm − 3 n++(Sb)-doped top contact layer. Extremely low temperatures (LT) during the first growth stage of the SiGe buffers are implemented. Process windows for high strain relaxation on different substrates are determined. The role of growth conditions in crystal structure formation is in situ monitored by time resolved reflectivity (TRR) measurements. For comparison, pseudomorphic PDs and that on conventional graded buffers were also realised. Secondary ion mass spectrometry (SIMS), m-Raman-spectroscopy and energy dispersive X-ray (EDX) analysis are performed to measure Ge content, composition profiles and degree of relaxation. The microstructure is characterised by cross-section transmission electron microscopy (XTEM). By optical microscopy with Nomarski differential interference contrast (NIC) combined with defect etching technique, typical defects in the layers were studied. Electrical measurements are performed to determine the different current components. The DC current– voltage characteristics show a distinct diode ‘s behaviour of the detectors, which are optically characterised in terms of reverse current for different incident wavelengths. © 2002 Elsevier Science B.V. All rights reserved. Keywords: Photodetector; Diode; Current; Sensitivity; SiGe; Molecular beam epitaxy (MBE); In-situ-monitoring; Time resolved reflectivity (TRR); Virtual substrate; Relaxed buffer layer
1. Introduction Epitaxial SiGe is a material candidate for photodetectors (PDs) due to its compatibility with Si technology and its absorption in the near-infrared up to 1.55 mm. Various PD concepts on SiGe have been reported in the literature [1 – 9]. This huge potential of Ge arises from the indirect band gap shrinkage (Eg x 2) and the use of the direct band transition. For the direct transition the energy gap shrinks from 4eV for Si to 0.8 eV for pure Ge [10]. The lower carrier diffusion length of virtual substrates and the high light absorption allow PDs with improved dynamic behaviour. The availability of thin strain relaxed buffer layers with 100% relaxation [11,12] allows us to grow SiGe device structures * Corresponding author. Tel.: + 49-711-6858011; fax: +49-7116858044. E-mail address: [email protected] (M. Bauer).
which could be integrated in Si devices. We have produced thin SiGe PIN diodes as test devices for normal photon incidence with different Ge contents ranging from 10 up to 50% Ge. We have characterised the diodes electrically in terms of DC current –voltage characteristics and reverse current for various Ge contents compared with pure Si and various growth and process technology variants. The diodes were optically characterised in terms of photoresponse for two different incident wavelengths (825 and 1310 nm). These devices were used for characterisation and optimisation of buffer growth and process technology. Operation of the PDs at 0 V is also possible. The deposition strategy on thin virtual substrates and the process technology can be modified for different Ge contents and for various types (doping levels) of substrates. Processing of integrated devices on top of p− (B, z\1000 V cm) substrates is more complicated but necessary for RF measurements (S-parameter characterisation).
0921-5107/02/$ - see front matter © 2002 Elsevier Science B.V. All rights reserved. PII: S 0 9 2 1 - 5 1 0 7 ( 0 1 ) 0 0 7 6 1 - 9
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M. Bauer et al. / Materials Science and Engineering B89 (2002) 77–83
2. Structure and technology of the PIN SiGe photodetector The deposition of the complete layer sequence (Fig. 1a) was performed with molecular beam epitaxy (MBE). After a thermal in-situ cleaning at 900 °C, a 150 nm thick silicon buffer layer was deposited at 600 °C to obtain an atomically clean and flat surface. Then, the substrate temperature was abruptly decreased to temperatures between 120 and 200 °C. At these very low temperatures (LT), a compressively strained (pseudomorphic) metastable SiGe-layer was deposited above the equilibrium critical thickness and below the PeopleBean critical thickness [13,14]. Due to the low deposition temperature of this SiGe layer and the underlying Si-layer, the surface adatom mobility is very low. That causes a huge amount of point defects (interstitials and vacancies) in the growing single crystal. The surface morphology is still smooth and uncorrugated. To relax these layers the substrate temperature was increased very fast to 550 °C during growth. These point defects
promote the formation of misfit dislocations (loops) at the SiGe – Si interface and can avoid the creation of threading dislocations from the outer surface. These point defects can also promote the climbing and gliding of dislocations. Two dislocations with opposite Burgers vectors can annihilate themselves if they are in the same glide-plane. So the possibility of dislocation climbing can reduce the threading dislocation density. The misfit dislocations are necessary for 100% relaxation but they are confined in a thin area. Without a growth interruption, the temperature step of 500 °C causes a dramatic increase in point defect and dislocation mobility and, therefore, a total/complete relaxation of the metastable SiGe-layer. These thin smooth (and completely relaxed) layers can be overgrown at higher temperature, without introducing surface ondulations caused by strain. To achieve an abrupt decrease of B-doping, the segregation of boron was kept low by growing at 550 °C. The temperature was then increased to 600 °C, where the dopant incorporation is lower, to avoid unintentional doping in the intrinsic zone. To achieve an abrupt and highly doped Sb contact layer with very low sheet and contact resistances, the temperature was lowered sharply to a temperature of 250 °C. The process we used in this case is a mesa process with three photoresist steps. The first step is a mesa etching process. It enables the access to the buried layer, when using a high resistivity substrate, or to the p+-substrate, respectively. To reduce the leakage currents and to isolate the active elements, the next layer is a thin PECVD oxide with a thickness of 200 nm. After etching the contact holes with BHF into the oxide (second photoresist step), the aluminium layer, with a thickness of 1 mm is sputtered and patterned (third photoresist step). The etching of the aluminium is realised in a dry etching process. Fig. 1b shows a microscope picture (magnification, 100) of a photodiode.
3. Structural sample characterisation
Fig. 1. (a) Cross section of the PIN SiGe photodetector. (b) Photograph of the complete device structure.
For structural characterisation, we have performed XTEM, SIMS, EDX, m-Raman and Nomarski interference contrast microscopy before and after defect etching. SIMS measurements performed with 5 keV Cs+-ions have determined Ge-content, dopant levels of the p+(B) bottom contact, the intrinsic zone and the top contact layer. Fig. 2 shows a typical SIMS measurement of a PD on a virtual substrate with a Ge content of 27%. The SIMS profile correlates to the cross-section (Fig. 1a) given above. For all measured Ge contents (up to 50%), we have demonstrated a steep decrease of boron doping, sharper than 10 nm per decade, a doping in the i-zone below the detection limit (B1017 cm − 3) and an increase in the Sb contact layer doping up to 3×1020
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Fig. 2. SIMS measurement of a PIN SiGe photodetector structure with a Ge-content of 27%.
cm − 3 with a sharpness/abruptness between 6 and 10 nm per decade depending on the Ge content. Transmission line measurements (TLM) of the sheet resistances show the electrical activity of dopant atoms (N-type doping level of 3×1020 cm − 3 corresponds to a resistivity of 1.8×10 − 4 and 4.0×10 − 4 V cm for pure Ge and Si, respectively [15]. Measured sheet resistances of 12 different Si0.5Ge0.5 samples range from 2.14× 10 − 4 to 4.29×10 − 4 V cm). Sb segregation depends strongly on temperature and Ge content of the alloy layer matrix. Segregation is a severe problem in n-type Si(Ge) doping because of the strong Sb segregation behaviour (large segregation lengths). At 300 °C, the Sb segregation increases by a factor of 100 from 10 nm in Si to over 1000 nm in Ge [16]. Nevertheless, for all realised Ge-contents we have demonstrated, 3× 1020 cm − 3 Sb doped top contacts with very steep doping slopes and low sheet resistances by reducing the cap growth temperature to 250 °C. Carbon was co-evaporated with Ge from a carbon crucible in a ratio of 1:2000 [17]. The valley and the peak in C-concentration is caused by differences in C-segregation lengths at different temperatures [18]. A higher growth temperature (larger segregation length) needs a higher dopant surface coverage to achieve the desired equilibrium dopant concentration. After the jump from 550 to 600 °C, a higher concentration has to be build up, which causes a lack of the incorporated C. The cross-section TEM-picture (Fig. 3) shows a 660 nm SiGe-layer on top of a Si buffer layer. No substrate–Si-buffer interface can be observed. The top surface is smooth and single-crystalline without extended defects. The misfit dislocations to adjust the lattices of the relaxed SiGe-alloy to the Si buffer are confined in a very thin layer around the SiGe–Si-inter-
face. Some observed threading dislocations vanish during growth and do not reach the surface. The surface morphology of the complete photodiode layer stack was observed using optical microscopy with Nomarski differential interference contrast (NIC) ‘as grown’ and after etching with modified Schimmel solution. By this etching with a process rate of 11 nm s − 1, 215 nm of the SiGe layer were removed. The ‘as grown’ surface shows a cross-hatch pattern. These patterns become much more distinctive after the preferential etching (Fig. 4). To verify single crystalline growth of the layers, in-situ TRR measurements are performed (Fig. 5). The experimental setup and some theoretical considerations are given in [19,20]. A higher refractive index n causes a change in phase, and therefore an increase in reflectivity R. The optical constants depend on temperature, Ge-content, strain, phase (crystalline/amorphous) and doping. All R measurements during PD growth with a LT stage higher than 140 °C are identical with the 145 °C sample. The measured R for SiGe-thickness dB 0 nm (Fig. 5) corresponds to crystalline Si. A change in the refractive index or absorption causes a change in R. The very steep increase in R of the 125 °C sample is caused by an arising microtwins or even crystalline to amorphous transition [20]. The very sharp decrease in R is caused by a change in phase by solid phase epitaxy (SPE) [19]. The 145 °C sample shows the expected reflection behaviour. The decrease in reflection below the starting level can be caused either by changes in the film optical constants, or enhanced light scattering on the surface caused by facets, roughness or waviness. R recovers to the expected values for that Ge-content at around 350 nm. The decrease in R at the last 80 nm is caused by a lower refractive index of highly doped material because of bandgap narrowing
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M. Bauer et al. / Materials Science and Engineering B89 (2002) 77–83
Fig. 3. Cross section TEM analysis of a PD on top of a virtual substrate.
and temperature decrease. The increase in dark current densities (see Fig. 7) correlates to the observed TRR growth modes. So, the TRR measurement can be used to define the lowest possible temperature to avoid a massive degradation in crystal and device quality.
virtual substrates with that on graded strain relaxed buffers (Fig. 6). The current densities on thin virtual substrates are about one order of magnitude higher than that on graded buffers, demonstrating the yet lower crystal quality.
4. Electrical and optical characterisation
4.1. DC current–6oltage-characteristics The fabricated devices exhibit a distinct diode behaviour. Inset curve of Fig. 6 displays the dark current–voltage characteristic of a diode grown on a thin virtual substrate and a Ge content of 50%. The saturation current density, the ideality factor and the series resistance can be easily extracted from the forward bias characteristics. Non ideally, the reverse current increases by two orders of magnitude as the voltage is swept from −0.5 to −5 V. The current density of the diodes shifts to higher values with increasing Ge-content as expected from fundamental theory of pn-junctions. In an ideal pn-junction, the saturation current density scales with the square of the intrinsic carrier density n 2i exp(−Eg/kT). We compare diodes on thin
Fig. 4. NIC shows the surface morphology of a PD sample on top of a virtual substrate with 27% Ge before and after defect etching.
M. Bauer et al. / Materials Science and Engineering B89 (2002) 77–83
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Fig. 5. TRR measurements at u=950 nm during growth of identical PD on top of virtual substrates with three different low temperature (LT) stages.
Fig. 6. Reverse current densities of the samples with different Ge-contents; Inset, current – voltage characteristic, sample with 50% Ge thin virtual substrate, mesa area of A =1.77 × 10 − 4 cm2.
The current densities in Fig. 7 are taken from samples with a LT stage clearly defined by a single crystalline response in time resolved reflectivity (TRR) measurements. Lowering the LT stage below the optimum temperature results in a strong increase of current density in complete agreement with predictions of the TRR measurements (Fig. 5).
4.2. Photosensiti6ity at wa6elengths u = 825 and 1310 nm Unmodulated light from a 825 and a 1310 nm laser has been coupled on wafer into the photodiode with a
cleaved fibre probe. Fig. 8 presents the reverse current as a function of incident optical power. A linear dependence of reverse current on incident optical power was confirmed. Analysis of the photoresponsivity shows that detector operation is even possible when no external voltage is applied, due to the built-in voltage. The slopes of the curves correspond to photoresponsivities of 30 mA W − 1 and 496 mA W − 1, respectively. The photoresponsivities are in rough agreement with that expected from a device with 300 nm intrinsic layer. This proves that the nominal intrinsic zone is depleted and losses by the penetrating dislocations may be neglected. Therefore, the photoresponsivities of the device on a
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M. Bauer et al. / Materials Science and Engineering B89 (2002) 77–83
Fig. 7. Dark current densities of samples with 50% Ge-content grown at various low temperature stages on different kinds of substrates.
during a growth interruption. The deposition strategy for thin virtual substrates and the process technology will be modified for Ge contents up to 100%.
Acknowledgements
Fig. 8. Reverse Current at 0 V and wavelengths of u= 825 and 1310 nm vs. incident optical power, sample with thin virtual substrate and 50% Ge, mesa area of A =1.77 ×10 − 4 cm2.
The authors thank U. Ba¨ der for the preparation of TEM specimen, M. Klose for Raman measurements and M. Oehme and W. Zhao for useful discussions. Part of the work was supported by grants of Deutsche Forschungsgemeinschaft and EU-project IST-1999104444 SIGMUND.
References thick graded buffer differs only slightly from that on a thin buffer.
5. Discussion, conclusion and outlook We have shown that our thin, flat, highly strained and relaxed buffer layers are suitable to grow SiGe layers beyond the critical thickness avoiding thick, time and material consuming graded buffers. On the way to 100% Ge, we have produced thin SiGe PIN diodes as test devices, which can be operated at 0 V and with normal incidence. In a next step ex-situ annealing experiments with rapid thermal annealing (RTA) at two different temperatures, to increase the crystal quality and to bring down the leakage currents are performed. In the near future, we try to do this RTA in-situ in the MBE chamber during the growth of the SiGe-layer or
[1] S. Luryi, A. Kastalsky, J.C. Bean, IEEE Transactions on Electron Devices 31 (1984) 1135. [2] H. Temkin, A. Atreasyan, N.A. Olsson, T.P. Pearsall, J.C. Bean, APL 49 (1986) 809. [3] F.Y. Huang, X. Zhu, M.O. Tanner, K.L. Wang, APL 67 (1995) 566. [4] F.Y. Huang, K.L. Wang, APL 69 (1996) 2330. [5] B. Schu¨ ppert, J. Schmidtchen, A. Splett, U. Fischer, T. Zinke, R. Moosburger, K. Petermann, IEEE Journal of Lightwave Technology 14 (1996) 2311. [6] T. Tashiro, T. Tatsumi, M. Sugiyama, T. Hashimoto, T. Morikawa, IEEE Transactions on Electron Devices 44 (1997) 545. [7] S.B. Samavedam, M.T. Currie, T.A. Langdo, E.A. Fitzgerald, APL 73 (1998) 2125. [8] G. Masini, L. Colace, G. Assanto, H.-C. Luan, K. Wada, L.C. Kimerling, Electronics Letters 35 (1999) 1467. [9] G. Masini, L. Colace, G. Assanto, H.C. Luan, L.C. Kimerling, Electronics Letters 36 (2000) 2095. [10] C. Penn, T. Frommherz, G. Bauer in EMIS Datareviews Series 24, edited by E. Kasper (1999) 125.
M. Bauer et al. / Materials Science and Engineering B89 (2002) 77–83 [11] E. Kasper, K. Lyutovich, M. Bauer, M. Oehme, Thin Solid Films 336 (1998) 319. [12] M. Bauer, K. Lyutovich, M. Oehme, E. Kasper, H.-J. Herzog, F. Ernst, Thin Solid Films 369 (2000) 152. [13] R. People, J.C. Bean, APL 47 (1985) 322. [14] R. People, J.C. Bean, APL 49 (1986) 229. [15] S.M. Sze, J.C. Irvin, Solid State Electronics 11 (1968) 599.
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[16] K. Nakagawa, N. Sugii, S. Yamaguchi, M. Miyao, J. Cryst, Growth 201 (1999) 560. [17] M. Oehme, M. Bauer, E. Kasper. Mat. Sci. Eng. B, this volume. [18] M. Oehme, M. Bauer, C.P. Parry, G. Eifler, E. Kasper, Thin Solid Films 380 (2000) 75. [19] M. Bauer, M. Oehme, M. Sauter, G. Eifler, E. Kasper, Thin Solid Films 364 (2000) 228. [20] M. Bauer, M. Oehme, E. Kasper, Mat. Sci. Eng. B, this volume.
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High Ge content photodetectors on thin SiGe buffers M. Bauer a,*, C. Scho¨llhorn a, K. Lyutovich a, E. Kasper a , M. Jutzi b, M. Berroth b a b
Institut fu¨r Halbleitertechnik, Uni6ersita¨t Stuttgart, Pfaffenwaldring 47, 70569 Stuttgart, Germany Institut fu¨r Elektrische und Optische Nachrichtentechnik, Uni6ersita¨t Stuttgart, Stuttgart, Germany
Abstract PIN SiGe photodetectors (PD) are grown by MBE with Ge contents x = 0, 0.10, 0.2, 0.27 and 0.5. For PDs with high Ge content, which are grown beyond the SiGe layer critical thickness, thin (sub 100 nm) strain relaxed, p+(B)-doped SiGe buffers are of special importance. The layer structure of the samples consists of a 5 ×1018 cm − 3 p+(B)-doped buffer layer as a bottom contact, followed by a 300 nm intrinsic active zone covered with a 3 ×1020 cm − 3 n++(Sb)-doped top contact layer. Extremely low temperatures (LT) during the first growth stage of the SiGe buffers are implemented. Process windows for high strain relaxation on different substrates are determined. The role of growth conditions in crystal structure formation is in situ monitored by time resolved reflectivity (TRR) measurements. For comparison, pseudomorphic PDs and that on conventional graded buffers were also realised. Secondary ion mass spectrometry (SIMS), m-Raman-spectroscopy and energy dispersive X-ray (EDX) analysis are performed to measure Ge content, composition profiles and degree of relaxation. The microstructure is characterised by cross-section transmission electron microscopy (XTEM). By optical microscopy with Nomarski differential interference contrast (NIC) combined with defect etching technique, typical defects in the layers were studied. Electrical measurements are performed to determine the different current components. The DC current– voltage characteristics show a distinct diode ‘s behaviour of the detectors, which are optically characterised in terms of reverse current for different incident wavelengths. © 2002 Elsevier Science B.V. All rights reserved. Keywords: Photodetector; Diode; Current; Sensitivity; SiGe; Molecular beam epitaxy (MBE); In-situ-monitoring; Time resolved reflectivity (TRR); Virtual substrate; Relaxed buffer layer
1. Introduction Epitaxial SiGe is a material candidate for photodetectors (PDs) due to its compatibility with Si technology and its absorption in the near-infrared up to 1.55 mm. Various PD concepts on SiGe have been reported in the literature [1 – 9]. This huge potential of Ge arises from the indirect band gap shrinkage (Eg x 2) and the use of the direct band transition. For the direct transition the energy gap shrinks from 4eV for Si to 0.8 eV for pure Ge [10]. The lower carrier diffusion length of virtual substrates and the high light absorption allow PDs with improved dynamic behaviour. The availability of thin strain relaxed buffer layers with 100% relaxation [11,12] allows us to grow SiGe device structures * Corresponding author. Tel.: + 49-711-6858011; fax: +49-7116858044. E-mail address: [email protected] (M. Bauer).
which could be integrated in Si devices. We have produced thin SiGe PIN diodes as test devices for normal photon incidence with different Ge contents ranging from 10 up to 50% Ge. We have characterised the diodes electrically in terms of DC current –voltage characteristics and reverse current for various Ge contents compared with pure Si and various growth and process technology variants. The diodes were optically characterised in terms of photoresponse for two different incident wavelengths (825 and 1310 nm). These devices were used for characterisation and optimisation of buffer growth and process technology. Operation of the PDs at 0 V is also possible. The deposition strategy on thin virtual substrates and the process technology can be modified for different Ge contents and for various types (doping levels) of substrates. Processing of integrated devices on top of p− (B, z\1000 V cm) substrates is more complicated but necessary for RF measurements (S-parameter characterisation).
0921-5107/02/$ - see front matter © 2002 Elsevier Science B.V. All rights reserved. PII: S 0 9 2 1 - 5 1 0 7 ( 0 1 ) 0 0 7 6 1 - 9
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2. Structure and technology of the PIN SiGe photodetector The deposition of the complete layer sequence (Fig. 1a) was performed with molecular beam epitaxy (MBE). After a thermal in-situ cleaning at 900 °C, a 150 nm thick silicon buffer layer was deposited at 600 °C to obtain an atomically clean and flat surface. Then, the substrate temperature was abruptly decreased to temperatures between 120 and 200 °C. At these very low temperatures (LT), a compressively strained (pseudomorphic) metastable SiGe-layer was deposited above the equilibrium critical thickness and below the PeopleBean critical thickness [13,14]. Due to the low deposition temperature of this SiGe layer and the underlying Si-layer, the surface adatom mobility is very low. That causes a huge amount of point defects (interstitials and vacancies) in the growing single crystal. The surface morphology is still smooth and uncorrugated. To relax these layers the substrate temperature was increased very fast to 550 °C during growth. These point defects
promote the formation of misfit dislocations (loops) at the SiGe – Si interface and can avoid the creation of threading dislocations from the outer surface. These point defects can also promote the climbing and gliding of dislocations. Two dislocations with opposite Burgers vectors can annihilate themselves if they are in the same glide-plane. So the possibility of dislocation climbing can reduce the threading dislocation density. The misfit dislocations are necessary for 100% relaxation but they are confined in a thin area. Without a growth interruption, the temperature step of 500 °C causes a dramatic increase in point defect and dislocation mobility and, therefore, a total/complete relaxation of the metastable SiGe-layer. These thin smooth (and completely relaxed) layers can be overgrown at higher temperature, without introducing surface ondulations caused by strain. To achieve an abrupt decrease of B-doping, the segregation of boron was kept low by growing at 550 °C. The temperature was then increased to 600 °C, where the dopant incorporation is lower, to avoid unintentional doping in the intrinsic zone. To achieve an abrupt and highly doped Sb contact layer with very low sheet and contact resistances, the temperature was lowered sharply to a temperature of 250 °C. The process we used in this case is a mesa process with three photoresist steps. The first step is a mesa etching process. It enables the access to the buried layer, when using a high resistivity substrate, or to the p+-substrate, respectively. To reduce the leakage currents and to isolate the active elements, the next layer is a thin PECVD oxide with a thickness of 200 nm. After etching the contact holes with BHF into the oxide (second photoresist step), the aluminium layer, with a thickness of 1 mm is sputtered and patterned (third photoresist step). The etching of the aluminium is realised in a dry etching process. Fig. 1b shows a microscope picture (magnification, 100) of a photodiode.
3. Structural sample characterisation
Fig. 1. (a) Cross section of the PIN SiGe photodetector. (b) Photograph of the complete device structure.
For structural characterisation, we have performed XTEM, SIMS, EDX, m-Raman and Nomarski interference contrast microscopy before and after defect etching. SIMS measurements performed with 5 keV Cs+-ions have determined Ge-content, dopant levels of the p+(B) bottom contact, the intrinsic zone and the top contact layer. Fig. 2 shows a typical SIMS measurement of a PD on a virtual substrate with a Ge content of 27%. The SIMS profile correlates to the cross-section (Fig. 1a) given above. For all measured Ge contents (up to 50%), we have demonstrated a steep decrease of boron doping, sharper than 10 nm per decade, a doping in the i-zone below the detection limit (B1017 cm − 3) and an increase in the Sb contact layer doping up to 3×1020
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Fig. 2. SIMS measurement of a PIN SiGe photodetector structure with a Ge-content of 27%.
cm − 3 with a sharpness/abruptness between 6 and 10 nm per decade depending on the Ge content. Transmission line measurements (TLM) of the sheet resistances show the electrical activity of dopant atoms (N-type doping level of 3×1020 cm − 3 corresponds to a resistivity of 1.8×10 − 4 and 4.0×10 − 4 V cm for pure Ge and Si, respectively [15]. Measured sheet resistances of 12 different Si0.5Ge0.5 samples range from 2.14× 10 − 4 to 4.29×10 − 4 V cm). Sb segregation depends strongly on temperature and Ge content of the alloy layer matrix. Segregation is a severe problem in n-type Si(Ge) doping because of the strong Sb segregation behaviour (large segregation lengths). At 300 °C, the Sb segregation increases by a factor of 100 from 10 nm in Si to over 1000 nm in Ge [16]. Nevertheless, for all realised Ge-contents we have demonstrated, 3× 1020 cm − 3 Sb doped top contacts with very steep doping slopes and low sheet resistances by reducing the cap growth temperature to 250 °C. Carbon was co-evaporated with Ge from a carbon crucible in a ratio of 1:2000 [17]. The valley and the peak in C-concentration is caused by differences in C-segregation lengths at different temperatures [18]. A higher growth temperature (larger segregation length) needs a higher dopant surface coverage to achieve the desired equilibrium dopant concentration. After the jump from 550 to 600 °C, a higher concentration has to be build up, which causes a lack of the incorporated C. The cross-section TEM-picture (Fig. 3) shows a 660 nm SiGe-layer on top of a Si buffer layer. No substrate–Si-buffer interface can be observed. The top surface is smooth and single-crystalline without extended defects. The misfit dislocations to adjust the lattices of the relaxed SiGe-alloy to the Si buffer are confined in a very thin layer around the SiGe–Si-inter-
face. Some observed threading dislocations vanish during growth and do not reach the surface. The surface morphology of the complete photodiode layer stack was observed using optical microscopy with Nomarski differential interference contrast (NIC) ‘as grown’ and after etching with modified Schimmel solution. By this etching with a process rate of 11 nm s − 1, 215 nm of the SiGe layer were removed. The ‘as grown’ surface shows a cross-hatch pattern. These patterns become much more distinctive after the preferential etching (Fig. 4). To verify single crystalline growth of the layers, in-situ TRR measurements are performed (Fig. 5). The experimental setup and some theoretical considerations are given in [19,20]. A higher refractive index n causes a change in phase, and therefore an increase in reflectivity R. The optical constants depend on temperature, Ge-content, strain, phase (crystalline/amorphous) and doping. All R measurements during PD growth with a LT stage higher than 140 °C are identical with the 145 °C sample. The measured R for SiGe-thickness dB 0 nm (Fig. 5) corresponds to crystalline Si. A change in the refractive index or absorption causes a change in R. The very steep increase in R of the 125 °C sample is caused by an arising microtwins or even crystalline to amorphous transition [20]. The very sharp decrease in R is caused by a change in phase by solid phase epitaxy (SPE) [19]. The 145 °C sample shows the expected reflection behaviour. The decrease in reflection below the starting level can be caused either by changes in the film optical constants, or enhanced light scattering on the surface caused by facets, roughness or waviness. R recovers to the expected values for that Ge-content at around 350 nm. The decrease in R at the last 80 nm is caused by a lower refractive index of highly doped material because of bandgap narrowing
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M. Bauer et al. / Materials Science and Engineering B89 (2002) 77–83
Fig. 3. Cross section TEM analysis of a PD on top of a virtual substrate.
and temperature decrease. The increase in dark current densities (see Fig. 7) correlates to the observed TRR growth modes. So, the TRR measurement can be used to define the lowest possible temperature to avoid a massive degradation in crystal and device quality.
virtual substrates with that on graded strain relaxed buffers (Fig. 6). The current densities on thin virtual substrates are about one order of magnitude higher than that on graded buffers, demonstrating the yet lower crystal quality.
4. Electrical and optical characterisation
4.1. DC current–6oltage-characteristics The fabricated devices exhibit a distinct diode behaviour. Inset curve of Fig. 6 displays the dark current–voltage characteristic of a diode grown on a thin virtual substrate and a Ge content of 50%. The saturation current density, the ideality factor and the series resistance can be easily extracted from the forward bias characteristics. Non ideally, the reverse current increases by two orders of magnitude as the voltage is swept from −0.5 to −5 V. The current density of the diodes shifts to higher values with increasing Ge-content as expected from fundamental theory of pn-junctions. In an ideal pn-junction, the saturation current density scales with the square of the intrinsic carrier density n 2i exp(−Eg/kT). We compare diodes on thin
Fig. 4. NIC shows the surface morphology of a PD sample on top of a virtual substrate with 27% Ge before and after defect etching.
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Fig. 5. TRR measurements at u=950 nm during growth of identical PD on top of virtual substrates with three different low temperature (LT) stages.
Fig. 6. Reverse current densities of the samples with different Ge-contents; Inset, current – voltage characteristic, sample with 50% Ge thin virtual substrate, mesa area of A =1.77 × 10 − 4 cm2.
The current densities in Fig. 7 are taken from samples with a LT stage clearly defined by a single crystalline response in time resolved reflectivity (TRR) measurements. Lowering the LT stage below the optimum temperature results in a strong increase of current density in complete agreement with predictions of the TRR measurements (Fig. 5).
4.2. Photosensiti6ity at wa6elengths u = 825 and 1310 nm Unmodulated light from a 825 and a 1310 nm laser has been coupled on wafer into the photodiode with a
cleaved fibre probe. Fig. 8 presents the reverse current as a function of incident optical power. A linear dependence of reverse current on incident optical power was confirmed. Analysis of the photoresponsivity shows that detector operation is even possible when no external voltage is applied, due to the built-in voltage. The slopes of the curves correspond to photoresponsivities of 30 mA W − 1 and 496 mA W − 1, respectively. The photoresponsivities are in rough agreement with that expected from a device with 300 nm intrinsic layer. This proves that the nominal intrinsic zone is depleted and losses by the penetrating dislocations may be neglected. Therefore, the photoresponsivities of the device on a
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M. Bauer et al. / Materials Science and Engineering B89 (2002) 77–83
Fig. 7. Dark current densities of samples with 50% Ge-content grown at various low temperature stages on different kinds of substrates.
during a growth interruption. The deposition strategy for thin virtual substrates and the process technology will be modified for Ge contents up to 100%.
Acknowledgements
Fig. 8. Reverse Current at 0 V and wavelengths of u= 825 and 1310 nm vs. incident optical power, sample with thin virtual substrate and 50% Ge, mesa area of A =1.77 ×10 − 4 cm2.
The authors thank U. Ba¨ der for the preparation of TEM specimen, M. Klose for Raman measurements and M. Oehme and W. Zhao for useful discussions. Part of the work was supported by grants of Deutsche Forschungsgemeinschaft and EU-project IST-1999104444 SIGMUND.
References thick graded buffer differs only slightly from that on a thin buffer.
5. Discussion, conclusion and outlook We have shown that our thin, flat, highly strained and relaxed buffer layers are suitable to grow SiGe layers beyond the critical thickness avoiding thick, time and material consuming graded buffers. On the way to 100% Ge, we have produced thin SiGe PIN diodes as test devices, which can be operated at 0 V and with normal incidence. In a next step ex-situ annealing experiments with rapid thermal annealing (RTA) at two different temperatures, to increase the crystal quality and to bring down the leakage currents are performed. In the near future, we try to do this RTA in-situ in the MBE chamber during the growth of the SiGe-layer or
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