Current Applied Physics 10 (2010) e157ee160
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High performance and the low voltage operating InGaZnO thin film transistor Dae-ho Son, Dae-Hwan Kim*, Shi-Joon Sung, Eun-Ae Jung, Jin-Kyu Kang Public & Original Technology Research Center, Daegu Gyeongbuk Institute of Science & Technology, Daegu Technopark Venture 1 Plant, 711 Hosan-dong, Dalseo-gu 704-230, Daegu, Republic of Korea
a r t i c l e i n f o
a b s t r a c t
Article history: Received 4 January 2010 Received in revised form 8 February 2010 Accepted 6 March 2010 Available online 20 March 2010
In this study, we compare the electrical properties of inverted-coplanar-type InGaZnO thin-film transistors (IGZO TFTs) deposited by RF sputtering at room temperature on a thermally grown SiO2 gate dielectric or a hafnium oxide (HfO2) gate dielectric. The fabricated HfO2/IGZO TFTs have higher fieldeffect mobility than the SiO2/IGZO TFTs. The HfO2/InGaZnO TFTs show good performance with a high field-effect mobility of 25.8 cm2 V1 s1, a low sub-threshold swing of 90 mV dec1, and a threshold voltage of 0.67 V, respectively. Ó 2010 Elsevier B.V. All rights reserved.
Keywords: Thin film transistor Metal oxide High-k material HfO2 Low voltage operating device
1. Introduction Transparent oxide thin-film transistors (TFTs) have been widely studied for their applications in electronics, optoelectronics, and next-generation displays [1e7]. Recently, considerable attention has been paid to high-performance InGaZnO (IGZO) TFTs, which can be used as driving devices in active-matrix organic lightemitting diodes (AMOLEDs). IGZO TFTs have several advantages such as high scalability, uniform structure, low-temperature processing, high mobility, and a reasonably high on/off ratio [8e11]. However, the high operating voltage of these IGZO TFTs must be reduced so that they can be used in mobile and flexible devices, which operate at a low voltage. In modern electronic industry, where there is a required to replace the thermally grown SiO2 gate insulator due to their better device performance such as low-voltage operating [4,12e15]. In order to operate IGZO TFTs at low bias voltages and high currents, it is important to improve the capacitive coupling of the gate electrode to the active channel; for this purpose, high-k gate dielectric materials must be used, and the thickness of the gate dielectric layer must be reduced. The production of low-voltage ZnO-based TFTs has already been reported by many research groups that have attempted to obtain high-capacitance gate dielectrics by using high-k gate materials
* Correspondence author. Tel.: þ82 53 430 8429; fax: þ82 53 430 8475. E-mail address:
[email protected] (D.-H. Kim). 1567-1739/$ e see front matter Ó 2010 Elsevier B.V. All rights reserved. doi:10.1016/j.cap.2010.03.012
and ultrathin active layer films [12e17]. For example, T. Kawamura et al. used very thin SiO2 gate dielectrics and fabricated low-voltage amorphous IGZO TFTs that deliver excellent performance [17]. Because the SiO2 layer in IGZO TFTs is formed by thermal oxidation, it has an exceptionally low leakage current and a high breakdown voltage; however, since thermal oxidation is a high-temperature process, it cannot be used in the fabrication of flexible devices. In this study, we investigate the performances of invertedcoplanar-type IGZO TFTs deposited on a thermally grown SiO2 layer or a hafnium oxide (HfO2) film by RF sputtering. In addition, we fabricate TFTs with an IGZO active channel layer after postannealing in various gases and discuss the characteristics of the fabricated SiO2/TFTs and HfO2/TFTs. 2. Experimental IGZO TFTs were fabricated using two different dielectric materials, SiO2 and HfO2. In the conventional approach, metal oxide TFTs with bottom-contact geometry are fabricated (Fig. 1). For the fabrication of SiO2/IGZO TFTs, p-type Si wafers (resistivity ¼ 0.001e0.004 U-cm) with a 100-nm-thick thermally grown SiO2 layer are used as the back gate and part of the gate dielectric stack of the field-effect transistor (FET). A 15-nm-thick IGZO film was deposited at room temperature on the SiO2/Si substrate by DC sputtering using an IGZO target (In:Ga:Zn mol ratio ¼ 1:1:1). DC sputtering was carried out using an Ar/O2 mixture (mixing ratio, 100:25). The base pressure in the vacuum chamber was less than 8 107 mTorr, while the deposition pressure was 5 mTorr. On the active layer, a 100-nm-thick Al source
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Fig. 1. Structure of InGaZnO (IGZO) thin-film device.
and drain contacts were vapor-deposited through a shadow mask to define a channel length (L) and channel width (W) of 40 mm and 1000 mm, respectively. For the fabrication of HfO2/IGZO TFTs, a 150nm-thick indium tin oxide (ITO) layer was used as the back gate. To increase the relative dielectric constant of the gate dielectric, an 80nm-thick HfO2 layer was deposited on the ITO glass substrate by RF sputtering without heating the substrate; deposition was carried out in the same chamber used for the IGZO deposition. Subsequently, the active layer was deposited by following the same method used for the fabrication of the SiO2/TFTs. Post-annealing was performed in H2, O2, and vacuum in a tube furnace. The electrical characteristics of the IGZO TFTs and metaleinsulatoremetal (MIM) capacitors (insulator ¼ HfO2) were determined using a Keithley 4200-SCS semiconductor parameter analyzer. 3. Results and discussion Fig. 2(a) shows the cross-sectional scanning transmission electron microscopy (STEM) images of a 15-nm-thick IGZO TFT deposited on a 100-nm-thick SiO2 layer that was thermally grown on the Si substrate. Fig. 2(b) shows an 80-nm-thick HfO2 film sputtered on the ITO glass after post-annealing treatment. As seen in the STEM images, the IGZO layer is uniform, dense, and 10e15 nm thick. In the case of the HfO2/IGZO TFTs, the HfO2 films deposited by reactive RF sputtering include an amorphous phase. When the substrate temperature is increased beyond 300 C, the HfO2 films change from the amorphous state to the polycrystalline state [18]. The HfO2 thin film has several advantages such as high dielectric constant, large bandgap, and high thermal stability. Therefore, HfO2 films are promising candidates for high-capacitance gate insulators. For measuring the dielectric characteristics of HfO2, circular-top Al electrodes with a diameter of 500 mm are deposited on the ITO glass by thermal evaporation through a shadow mask to form an MIM structure. Fig. 3 shows the bias voltage dependence of the capacitance of HfO2 films after post-treatment in various gases at 300 C. The capacitanceevoltage (CeV) curves are measured at a high frequency of 1 MHz and an oscillation voltage of 30 mV. A bias
Fig. 3. CeV and IeV (inset) characteristics of 80-nm-thick HfO2 thin films deposited by sputtering.
voltage is applied to the top Al gate, while the bottom ITO layer is grounded. The dielectric constants of the HfO2 film are calculated from the measured CeV data. The calculated average dielectric constants of the HfO2 gate insulator after post-thermal treatment in H2, vacuum, and O2 are approximately 21.0, 20.1, and 19.8, respectively; these values are almost similar in magnitude. Although the O2-treated HfO2 film has a lower dielectric constant (w19.8) than the H2 and vacuum-treated films, the dielectric constants of all the three HfO2 thin films are sufficiently high for achieving a low operation voltage (<2.5 V) in the IGZO TFTs. Several HfO2/IGZO and SiO2/IGZO TFTs were fabricated with W ¼ 1000 mm and L ranging from 20 mm to 100 mm. Fig. 4 shows the measured transfer characteristics of the SiO2/IGZO TFT (W ¼ 1000 mm; L ¼ 40 mm) after room temperature (RT) treatment and subsequent post-thermal treatment at 300 C in (a) a dilute H2 ambient, (b) an O2 ambient, and (c) vacuum (103 Torr). As shown in the figures, the on current of the SiO2/IGZO TFT subjected to post-thermal treatment in H2 is higher than that of the SiO2/IGZO TFTs treated in O2 and vacuum. Apparently, post-thermal treatment in H2 enhanced the electrical properties of IGZO TFTs, and similar improvements of on current with H2 thermal treatment in ZnO [19,20] and IGZO [21,22] have been reported elsewhere. In case of IGZO systems, hydrogen has been known to be a donor for n-type oxide semiconductors, making the reported IGZO more conductive by increasing the electron concentration [21,22]. The increase mobility in IGZO is caused by increasing electron concentration owing to percolation conduction through potential
Fig. 2. Cross-sectional STEM image of an approximately 10-nm-thick InGaZnO thin film on (a) a 100-nm-thick SiO2 film and (b) an 80-nm-thick HfO2 film.
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Fig. 4. Transfer characteristics of SiO2/InGaZnO TFT: drain-to-source current (IDS) as a function of the gate-to-source voltage (VGS). VGS was swept from 10 V to 30 V at a VDS of 20 V.
Fig. 6. Transfer characteristics of HfO2/InGaZnO TFT: drain-to-source current (IDS) as a function of the gate-to-source voltage (VGS). VGS was swept from 0.5 V to 2.5 V at a VDS of 2 V.
barriers in the vicinity of conduction band edge [23,24]. In accordance with these results, our results could suggest the hydrogen atoms doping into the IGZO layer act as shallow n-type dopants, and as a result, the field-effect mobility of the IGZO TFT was increased. The off currents of all the devices are less than 1010 A. The threshold voltages of the TFTs have different value. The threshold voltage of TFT after post-thermal treatment in O2, vacuum, and H2 is shifted to negative direction about 11.2 V, 7.6 V and 3.2 V, respectively. The increased electron concentration can cause the shift in threshold voltage to the negative direction. The shift in threshold voltage to the negative direction can result from the increased electron concentration by post-thermal treatment. In addition, all the SiO2 devices operate in the enhancement mode, in which the channel conductance is zero at zero gate bias. Fig. 5 shows the transfer and output curves for TFTs (drainesource voltage: 20 V) in which the IGZO channel layer is subjected to post-thermal treatment at 300 C in a H2 ambient. The electrical parameters, including the saturation field-effect mobility and threshold voltage, are determined by linear fitting of the plot of the square root of the drain current (ID) versus gate voltage (VG). The following equation is the general expression for the operation of a field-effect transistor in the saturation region [25]:
required to induce an ID change of one order of magnitude required to increase ID by a factor, is 280 mV dec1 [26]. This value is the lowest among the S.S. values measured for all the other devices fabricated in this study. This implies that the post-annealing damage caused to the interface between the channel layer and the gate insulator is almost nil in the SiO2/IGZO TFT annealed at 300 C for 1 h in N2 þ 4% H2. However, the S.S. values of the other TFTs annealed in an O2 or vacuum ambient decrease, indicating an increase in the interface trap density after the annealing treatment. Further investigation of the interface effect in the presence of various reactive gases is necessary to clarify the reason for the abovementioned behavior. Fig. 5(b) shows the output characteristics of the SiO2/IGZO TFTs for various VG values. The IGZO TFTs show good linear and saturation behavior. Fig. 6 shows the measured transfer characteristics of the HfO2/ IGZO TFT (W ¼ 1000 mm; L ¼ 40 mm) subjected to RT treatment and subsequent post-thermal treatment under the same conditions employed for the treatment of the SiO2/IGZO TFTs. As shown in the figures, the electrical performance of the HfO2/IGZO TFTs and SiO2/ IGZO TFTs is improved after post-thermal treatment in H2. The SiO2/IGZO TFTs show reasonably good field-effect responses when the operating voltage is close to 30 V. In contrast, the HfO2/IGZO TFTs show excellent performance with a low S.S. at low operating voltages. Low-voltage operation is essential for portable electronic devices that make use of batteries or wireless power transmission systems. The HfO2/IGZO TFTs also operate in the enhancement mode. It is preferable to use transistors operating in the enhancement mode in electronic devices that are used to open or close an electric circuit, as no VG would be required to turn off the device. Fig. 7 shows the transfer and output curves for the TFTs (drainesource voltage: 2 V) in which the IGZO channel layer is
ID ¼
WCi msat ðVG Vth Þ2 2L
ðfor VD > VG Vth Þ;
where W is the channel width; L, the channel length; Ci, the capacitance per unit area of the gate insulator; VG, the gate voltage; IDS, the drain-to-source current; and Vth, the threshold voltage of the TFT. The field-effect mobility, Vth, and on/off ratio of the SiO2/ IGZO TFT are 8.6 cm2 V1 s1, 3.2 V, and 1.5 108, respectively. Furthermore, sub-threshold swing, S.S., defined as the VG change
Fig. 5. (a) Transfer and (b) output curves for TFTs (drainesource voltage: 20 V) in which the InGaZnO channel layer is subjected to post-thermal treatment at 300 C in a H2 ambient.
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Fig. 7. (a) Transfer and (b) output curves for TFTs (drainesource voltage: 2 V) in which the InGaZnO channel layer is subjected to post-thermal treatment at 300 C in a H2 ambient.
subjected to post-thermal treatment at 300 C in a H2 ambient. The field-effect mobility, Vth, on/off ratio, and S.S. of the HfO2/IGZO TFT are 25.8 cm2 V1 s1, 0.67 V, 1.1 107, and 90 mV dec1, respectively. The electrical properties of these TFTs are better than those of the SiO2/IGZO TFTs. The HfO2 gate dielectric is a high-k dielectric and is advantageous for use as a gate insulator since we aim to introduce carriers into the accumulation layer by applying the minimum possible VG. Thus, it is apparent that the choice of the dielectric material can substantially affect the device properties of IGZO TFTs. Fig. 7(b) shows ID as a function of VG. It can be seen that ID approaches 0.1 mA when VG is 1.6 V. The measured electrical properties of the HfO2/IGZO TFTs are similar to or greater than those of the SiO2/IGZO TFTs fabricated in this study. 4. Conclusions We have fabricated oxide TFTs by using IGZO as the active channel layer, SiO2 or HfO2 as the gate insulator, Al source/drain electrodes, and a Si substrate or ITO as the gate electrode. We have demonstrated the fabrication of low-voltage-driven IGZO TFTs with a high-k dielectric on an ITO glass substrate. The fabricated IGZO TFTs have excellent electrical characteristics, and their field-effect mobility, on/off ratio, and S.S. are 25.8 cm2 V1 s1, 1.1 107, and 90 mV dec1, respectively, at a low operating voltage. On the basis of our results, we conclude that the HfO2/IGZO semiconductor combination is a promising candidate for high-performance mobile and flexible devices. Acknowledgement This work was supported by the DGIST Basic Research Program of the MEST (Ministry of Education, Science & Technology). References [1] K. Nomura, H. Ohta, A. Takagi, T. Kamiya, M. Hirano, H. Hosono, Nature 432 (2004) 488e492.
[2] S.-H.K. Park, C.-S. Hwang, M. Ryu, S. Yang, C. Byun, J. Shin, J.-I. Lee, K. Lee, M.S. Oh, S. Im, Adv. Mater. 21 (2009) 678e682. [3] J.F. Wager, Science 300 (2003) 1245. [4] L. Wang, M.-H. Yoon, A. Facchetti, T. Marks, Adv. Mater. 19 (2007) 3252. [5] P. Wellenius, A. Suresh, J.F. Muth, Appl. Phys. Lett. 92 (2008) 021111. [6] J.-S. Park, T.-W. Kim, D. Stryakhilev, J.-S. Lee, S.-G. An, Y.-S. Pyo, D.-B. Lee, Y.G. Mo, D.-U. Jin, H.K. Chung, Appl. Phys. Lett. 95 (2009) 013503. [7] M. Ito, C. Miyazaki, M. Ishizaki, M. Kon, N. Ikeda, T. Okubo, R. Matsubara, K. Hatta, Y. Ugajin, N. Sekine, J. Non-Cryst. Solids 354 (2008) 2777. [8] K. Nomura, H. Ohta, K. Ueda, T. Kamiya, M. Hirano, H. Hosono, Science 300 (2003) 1269e1272. [9] S.I. Kim, C.J. Kim, J.C. Park, I. Song, S.W. Kim, H. Yin, E. Lee, J.C. Lee, Youngsoo Park, Electron Devices Meeting 2008, IEDM 2008, IEEE International, 15e17 Dec 2008. [10] W. Lim, E.A. Douglas, S.-H. Kim, D.P. Norton, S.J. Pearton, F. Ren, H. Shen, W.H. Chang, Appl. Phys. Lett. 93 (2008) 252103. [11] W. Lim, E.A. Douglas, S.-H. Kim, D.P. Norton, S.J. Pearton, F. Ren, H. Shen, W.H. Chang, Appl. Phys. Lett. 94 (2009) 072103. [12] D.H. Kim, N.G. Cho, H.-G. Kim, H.-S. Kim, J.-M. Hong, I.-D. Kim, Appl. Phys. Lett. 93 (2008) 032901. [13] J.H. Noh, C.S. Kim, S.Y. Ryu, S.J. Jo, Jpn. J. Appl. Phys. 46 (7A) (2007) 4096e4098. [14] P.F. Carcia, R.S. McLean, M.H. Reilly, M.K. Crawford, E.N. Blanchard, A.Z. Kattamis, S. Wagner, J. Appl. Phys. 102 (2007) 074512. [15] J.H. Cho, J. Lee, Y. Xia, B.S. Kim, Y. He, M.J. Renn, T.P. Lodge, C.D. Frisbie, Nat. Mater. 7 (2008) 900e906. [16] T. Kawamura, H. Uchiyama, S. Saito, H. Wakana, T. Mine, M. Hatano, K. Torii, T. Onai, Electron Devices Meeting 2008, IEDM 2008, IEEE International, 15e17 Dec 2008. [17] E. Tokumitsu, JP 2007-250987. [18] H. Hu, C. Zhu, Y.F. Lu, Y.H. Wu, T. Liew, M.F. Li, B.J. Cho, W.K. Choi, N. Yakovlev, J. Appl. Phys. 94 (2003) 551. [19] S. Kohiki, M. Nishitani, T. Wada, T. Hirao, Appl. Phys. Lett. 64 (1994) 2876. [20] Y.M. Strzhemechny, H.L. Mosbacker, D.C. Look, D.C. Reynolds, C.W. Litton, N.Y. Garces, N.C. Giles, L.E. Halliburton, S. Niki, L.J. Brillson, Appl. Phys. Lett. 84 (2004) 2545. [21] B.D. Ahn, H.S. Shin, H.J. Kim, J.S. Park, J.K. Jeong, Appl. Phys. Lett. 93 (2008) 203506. [22] H. Omura, H. Kumomi, K. Nomura, T. Kamiya, M. Hirano, H. Hosono, J. Appl. Phys. Lett. 105 (2009) 093712. [23] J.M. Lee, I.T. Cho, J.H. Lee, W.S. Cheong, C.S. Hwang, H.I. Kwon, Appl. Phys. Lett. 94 (2009) 222112. [24] A. Takagi, K. Nomura, H. Ohta, H. Yanagi, T. Kamiya, M. Hirano, H. Hosono, Thin Solid Films 486 (2005) 38. [25] D.K. Schroder, Semiconductor Material and Device Characterization, third ed. Wiley, New York, 1998. [26] S.M. Sze, Kwok K. Ng, Physics of Semiconductor Devices. Wiley-Interscience, 2007.