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High quality GaAs epitaxially grown on Si(001) substrate through AlAs nucleation and thermal cycle annealing
Journal Pre-proofs High quality GaAs epitaxially grown on Si(001) substrate through AlAs nucleation and thermal cycle annealing Young-Ho Ko, Kap-Joong Kim, Ju Hee Baek, Seo Young Lee, Duk-Jun Kim, Jong-Hoi Kim, Hwanuk Guim, Won Seok Han PII: DOI: Reference:
S0038-1101(19)30425-3 https://doi.org/10.1016/j.sse.2019.107763 SSE 107763
To appear in:
Solid-State Electronics
Please cite this article as: Ko, Y-H., Kim, K-J., Hee Baek, J., Young Lee, S., Kim, D-J., Kim, J-H., Guim, H., Seok Han, W., High quality GaAs epitaxially grown on Si(001) substrate through AlAs nucleation and thermal cycle annealing, Solid-State Electronics (2019), doi: https://doi.org/10.1016/j.sse.2019.107763
This is a PDF file of an article that has undergone enhancements after acceptance, such as the addition of a cover page and metadata, and formatting for readability, but it is not yet the definitive version of record. This version will undergo additional copyediting, typesetting and review before it is published in its final form, but we are providing this version to give early visibility of the article. Please note that, during the production process, errors may be discovered which could affect the content, and all legal disclaimers that apply to the journal pertain.
© 2019 Published by Elsevier Ltd.
High quality GaAs epitaxially grown on Si(001) substrate through AlAs nucleation and thermal cycle annealing Young-Ho Koa, Kap-Joong Kima, Ju Hee Baeka, Seo Young Leea, Duk-Jun Kima, Jong-Hoi Kima, Hwanuk Guimb, Won Seok Hana,* a b
Electronics and Telecommunications Research Institute (ETRI), 218 Gajeong-ro, Yuseong-gu, Daejeon, 34129, Korea Korea Basic Science Institute (KBSI), 169-148, Gwahak-ro, Yuseong-gu, Daejeon, 34133, Korea
ABSTRACT High quality GaAs was epitaxially grown on silicon(001) substrate through a hybrid technique of metalorganic chemical vapor deposition. The hybrid technique was comprised of AlAs nucleation and thermal cycle annealing to take advantages of both methods. The AlAs nucleation method improved the surface roughness of GaAs buffer and the thermal cycle annealing method reduced the threading dislocation (TD) density of GaAs buffer with small thickness. The GaAs buffer was grown with two-step growth with changing growth temperature and thermal cycle annealing processes. The optimal thickness of AlAs nucleation was determined to be 1.68 nm through systematic study with a series of buffer samples with different AlAs thicknesses. The TD density and surface roughness of GaAs buffer was quantitatively studied through electron channeling contrast imaging and atomic force microscopy, respectively. The growth temperature of GaAs buffer was also optimized to minimize the TD density. High quality GaAs buffer on Si(001) was obtained with a TD density 5.45 × 107 cm-2 with smooth surfaces. The total thickness of the buffer was approximately as thin as 1.5 μm. This study demonstrated a solution for silicon-based laser diodes to fulfill the monolithic integration of III-V on a Si platform. Keywords: silicon laser; III-V on Si; monolithic integration; dislocation density; AlAs nucleation; thermal cycle annealing
1. Introduction Optical interconnections instead of electronic interconnections have attracted attention owing to their numerous advantages, including large bandwidth and low power consumption, which are increasingly required for high speed and high capacity chip-to-chip data transfer [1, 2]. Consequently considerable effort has been made to fabricate a silicon-based light source as a vital component of optical interconnection [3]. However, silicon is an indirect bandgap material, which makes it challenging to implement a light source on a chip. There have been many attempts to implement a silicon-based on-chip light source, especially laser diodes (LDs). Although the light emission of telecommunication wavelength from Si was obtained by using erbium ions implanted on Si, it remains difficult to manufacture and control the emission wavelength of the electrically driven system [4]. Although Ge has an indirect bandgap, epitaxially grown Ge on Si was fabricated with an LD by creating a pseudo-band gap [5]. However, it was difficult to obtain a highly efficient light Coressponding author. E-mail address : [email protected] (W. S. Han)
source, as compared with III-V based LDs. The integration of III-V LDs with Si could provide on-chip light source with high efficiency. Two types of integration of III-V LDs with Si have been attempted: heterogeneous and monolithic integration. For heterogeneous integration, III-V wafers are mounted on Si wafers and bonded by direct wafer bonding or adhesive-assisted bonding methods [6]. The heterogeneous substrate bonding between III-V and Si has the problem of having a difference in substrate size and a low thermal conductivity. By contrast, monolithic integration, using III-V layers epitaxially grown on Si substrates, can provide integration of large-scale wafers and excellent thermal conductivity. Techniques for growing integrated III-V compound semiconductor thin films on silicon substrates are very important in opto-electric device. Especially, GaAs are the basic materials for optoelectronics and high-speed devices owing to their considerably higher carrier mobility. Because of the lattice constants and thermal expansion coefficients mismatches of GaAs and Si, the TD density of GaAs on Si was as high as 108 to 1010 cm-2, which represents a significant obstacle to achieving high quality GaAs thin films for laser diodes [7]. Various methods have been proposed to improve crystal quality and reduce dislocation density of GaAs on Si. A
lattice-graded buffer such as SixGe1-x buffer and GaP buffer was formed on the Si substrate to eliminate the lattice mismatch, and a high-quality GaAs thin film was grown by using these buffers [8-10]. Alternatively, InP and GaAs were grown on the sloped surface of the patterned Si substrate, reducing TD and stacking faults [11-13], while super lattices have been reported as dislocation filtering layers to effectively reduce the TD density of GaAs on Si [14-16]. The laser diodes on Si were obtained by growing quantum well (QW) and quantum dot (QD) active layers on the GaAs buffer on Si with relatively low TD density through these methods. To reduce the TD density however, the GaAs buffer layer became too thick, which led to a mismatch in thermal expansion and the related problem of the formation of cracks and a poor coupling efficiency with the Si platform. It was therefore very important to reduce the thickness of the buffer layer with low TD density and good surface roughness. Wang and co-workers obtained the GaAs buffer on Si with a small thickness(1.8 μm) by adopting a process of three-step growth of GaAs and thermal cycle annealing (TCA) [17]. The nucleation of AlAs on Si was known to suppress three-dimensional growth of III-V and to provide excellent seeding of III-V nucleation [18]. Chen and co-workers obtained InAs/GaAs QD LDs based-on high-quality GaAs epitaxially grown on Si with low TD density by employing a AlAs nucleation layer and three-step growth technique [19]. In this study, we proposed a hybrid technique to obtain high-quality GaAs epitaxially grown on Si(001) substrate for laser diodes. Through a hybrid technique of AlAs nucleation and TCA methods, we have taken advantage of both methods to acquire good GaAs seeding to simultaneously generate a smooth surface and low TD density with a thin buffer layer. We found the optimal AlAs nucleation layer thickness through systematic study of varying growth time of the AlAs layer. In addition, we quantified the TD density and surface roughness of GaAs buffer on Si using electron channeling contrast imaging (ECCI) and atomic force microscopy (AFM). Finally, we successfully obtained GaAs buffer epitaxially grown on Si(001) substrate with low TD density and with a thin buffer to allow fabrication of laser diodes on Si. 2. Experiments We directly grew GaAs buffers on Si by metalorganic chemical vapor deposition. To suppress formation of antiphase domains, the (100) oriented Si wafer with a 7° miscut towards (011) was used as a substrate. The AlAs nucleation layers were grown on the Si substrate at 420℃ after the buffered oxide etcher and thermal annealing treatment had been used to remove the native oxide on the substrate. We varied the thicknesses of AlAs nucleation layers from 0 to 7.48 nm to minimize surface roughness. A two-step process was employed to grow the GaAs buffers on the AlAs nucleation layer at different growth temperatures. In the first step for the GaAs buffer, the low temperature (LT) GaAs on AlAs nucleation was grown at 420℃. The thickness of the LT GaAs was set to ~ 17 nm for a small roughness value, as confirmed by the AFM. We adopted the procedure of GaAs growth at different growth
Fig. 1. Schematic illustration of GaAs epitaxially grown on Si (001) substrate. GaAs first-step buffer on Si and the GaAs second-step full buffer on Si with the TCA.
temperatures and TCA [17]. For the moderate temperature (MT) GaAs layer, the growth temperature was gradually increased to 640℃ with 1.83 K/sec while keeping growing GaAs. On the MT GaAs of 250 nm, a high temperature (HT) GaAs of 750 nm was grown, where we prepared three series samples with different growth temperature of 640℃, 680℃, and 720℃ for the optimization. In the second-step for the GaAs buffer, wafer temperature was increased to 800℃ and then reduced to 350℃, where this TCA process was repeated three times. The second HT GaAs was grown to 500 nm at 680℃ followed by the second implementation of TCA. The total thickness of GaAs full buffer was approximately 1.5 μm. Figure 1 is a schematic illustration of the two-step process for the growth of the GaAs buffer. Six samples of the first-step GaAs buffer before TCA were grown with different AlAs nucleation thickness to study the effect of AlAs nucleation. Each sample had an AlAs thickness of 0 nm, 0.37 nm, 0.56 nm, 1.68 nm, 3.74 nm, or 7.48 nm. The second-step GaAs buffer was also grown with different AlAs thicknesses of 0.56 nm, 1.68 nm, or 3.74 nm. Furthermore, the second-step GaAs buffers were grown with different growth temperatures of HT GaAs with 640℃, 680℃, or 720℃ for optimization. The AFM was used to examine surface roughness of the GaAs buffer and optical properties were measured by photoluminescence (PL). To count the TD density in GaAs buffers, we used ECCI measurements that allowed direct observation of TDs. We used scanning electron microscopy (Zeiss, Merlin Compact) with a high acceleration voltage and efficient backscattered electron detector for ECCI. The ECCI was obtained by adjusting the tilt and rotation angle of samples to facilitate electron channeling condition. 3. Results and Discussion To study the effect of the AlAs nucleation layer, six samples of the GaAs first-step buffer on Si before TCA were grown with various AlAs growth time. Samples of GaAs buffer had different AlAs thicknesses of 0 nm, 0.37 nm, 0.56 nm, 1.68 nm, 3.74 nm, or 7.48 nm. The thickness of the AlAs nucleation layer was estimated from the average growth rate, which was 6.2 nm/sec. The surface roughness of the GaAs buffer samples was measured by AFM. The AFM images of GaAs buffers with the area of 2 × 2 μm 2 are shown in Fig. 2(a-f). The surface of
the thickness of the AlAs nucleation increased(Fig. 3b) In comparison to the sample without AlAs nucleation, the 1.68 nm and 3.74 nm-thick samples exhibited an enhanced PL of 22.5% and 24.7%, respectively. However, the PL peak intensity was degraded when AlAs nucleation thickness was 7.48 nm. We can compare the quantum efficiency of GaAs buffer from the PL intensity, because the PL measurement of entire samples was performed under the same conditions. The intensity of PL was maximized for an AlAs thickness of between 1.68 nm and
Fig. 2. Roughness measurement of GaAs first-step buffer on Si with different AlAs thicknesses. AFM image of GaAs first-step buffer with different AlAs thickness of (a) 0, (b) 0.37, (c) 0.56, (d) 1.68, (e) 3.74, and (f) 7.48 nm. (g) The rms surface roughness of the AFM measurement area of 10 x 10 μm 2.
these samples exhibited rough surfaces and large defects, which was because the first-step buffer was still thin. The root mean square (rms) roughness of the GaAs buffer was measured under an area of 10 × 10 μm 2 (Fig. 2g). The GaAs buffer on Si without AlAs nucleation had a surface roughness of 7.28 nm. When the AlAs thickness increased to 1.68 nm and 3.74 nm, the roughness decreased to 2.25 nm and 2.12 nm, respectively. The roughness increased again to 6.22 nm when the thickness of the AlAs nucleation increased to 7.48 nm. The surface of the GaAs buffer on Si was improved by inserting the AlAs nucleation layer. The AlAs nucleation suppressed three-dimensional growth and provided excellent seeding of GaAs [18], resulting in improved surface roughness. However, the surface was degraded when the AlAs nucleation was too thick at 7.48 nm. We concluded that there was an optimum thickness of AlAs nucleation for improving the surface of GaAs buffer on Si. The optical properties of the GaAs first-step buffer on Si were characterized by using PL measurement at room temperature with 532 nm continuous-wave laser excitation. Figure 3(a) shows the PL spectra of GaAs buffer samples with different AlAs thicknesses. While the peak wavelength was only slightly changed, peak intensity was highly variable as a function of AlAs thickness. The PL peak intensity increased as
Fig. 3. PL analysis of GaAs first-step buffer. (a) The PL spectra of GaAs first-step buffer with different AlAs thickness of 0, 0.37, 0.56, 1.68, 3.74, and 7.48 nm measured at room temperature. (b) The PL peak intensity with different thickness of AlAs.
3.74 nm. The optical properties had a similar trend to that of AFM surface roughness, previously discussed. Therefore, the optimum thickness of AlAs nucleation was between 1.68 and 3.74 nm. The intensity of PL is enhanced for rough surface samples owing to light scattering. Although the 1.68 nm and 3.74 nm-AlAs thickness samples had smoother surfaces with little light scattering compared to the other samples, they exhibited a higher intensity of PL and therefore a higher quantum efficiency. The AlAs nucleation of 1.68 and 3.74 nm thickness provided improved surface roughness and quantum efficiency of the GaAs buffer on Si. There were various techniques to measure the TD density, including defect-selective etching, transmission electron microscopy (TEM), and cathodoluminescence. As a non-destructive measurement method, the ECCI has been reported as an effective technique to measure the TD density of GaAs [20]. We characterized the TD of the GaAs buffers using the ECCI. To obtain the required conditions for electron channeling, the samples were excited by the electron beam with a high acceleration voltage of 28.5 kV. By adjusting the tilt angle from 3° to 8° and the rotation angle of the samples, the channeling condition of both {040} and {220} excitation was satisfied under the electron channeling pattern shown in the yellow box of Fig. 4(a). The ECCI image was then obtained, as shown in Fig. 4(b) and the dislocations were visualized as bright contrast in the ECCI image. The TD density of GaAs first-step buffer samples was estimated from the ECCI measurements. Figures 5(a-f) shows the ECCI images of GaAs first-step buffer samples with different AlAs thickness. The TD density was 7.15 × 108, 5.44 × 108, 5.49 × 108, 6.67 × 108, 7.42 × 108, and 6.63 × 108 cm-2 for samples of AlAs thicknesses of 0, 0.37, 0.56, 1.68, 3.74, and 7.48 nm, respectively. While surface roughness and quantum efficiency were strongly affected with AlAs thickness, the TD density was only slightly modified by AlAs nucleation thickness. Because, nevertheless, the roughness and the quantum efficiency were improved for the AlAs nucleation of around 1.68 nm and 3.74 nm thickness, the GaAs second-step full buffer with the TCA and HT GaAs growth was obtained based-on the GaAs first-step buffer of 0.56 nm, 1.68 nm, and 3.74 nm thickness of AlAs nucleation. We performed the ECCI measurement of GaAs second-step full buffer on Si. Figures 6(a-c) show ECCI images of the GaAs second-step full buffer with AlAs thicknesses of 0.56, 1.68, and 3.74 nm. We measured the TD density of the samples from seven ECCI images of ~ 51 μm2 area with different positions
Fig. 4. TD analysis by the ECCI. (a) Electron channeling pattern of GaAs first-step buffer grown on Si. The yellow box indicates the excitation condition to measure ECCI (b) ECCI of the GaAs on Si.
Fig. 5. The ECCI images of the GaAs first-step buffer on Si with different AlAs thickness of (a) 0, (b) 0.37, (c) 0.56, (d) 1.68, (e) 3.74, and (f) 7.48 nm
across a quarter of 2 inch wafer. Average TD densities of the full buffer samples were shown in Fig. 6(d). The TD densities of GaAs full buffer on Si were 8.65, 5.45, and 5.57 × 107 cm-2 for samples with an AlAs thickness of 0.56, 1.68, and 3.74 nm, respectively. As a result of the TCA and HT GaAs growth, TD density was effectively reduced to approximately 1/10 of the original density. We also carried out PL measurements of GaAs full buffer samples at room temperature. The relative PL peak intensity of GaAs full buffer samples were 0.780, 1, and 0.999 for AlAs thickness of 0.56, 1.68, and 3.74 nm, respectively. The AlAs nucleation of 1.68 nm thickness provided the GaAs full buffer with high quantum efficiency as well as a low TD density. We confirmed the optimal thickness of AlAs nucleation layer for the roughness, quantum efficiency, and the TD density of GaAs on Si. Moreover, the final thickness of GaAs full buffer was as thin as approximately1.5 μm. We measured the TEM of the GaAs full buffer sample with
Fig. 6. TD analysis of the GaAs second-step buffer. ECCI images of the GaAs full buffer with different AlAs thickness of (a) 0.56, (b) 1.68, and (c) 3.74 nm. (d) Variation of TD density of the GaAs full buffer as a function of thickness of AlAs.
with a thin buffer for LDs epitaxially grown on Si (001). 4. Conclusion
Fig. 7. Cross-sectional scanning TEM image of GaAs full buffer with AlAs thickness of 1.68 nm. Yellow lines indicate interfaces of GaAs layers.
optimized AlAs nucleation thickness of 1.68 nm. Figure 7 shows cross-sectional scanning TEM image of GaAs full buffer on Si, where the TDs were visualized. High density TDs are formed at the interface between GaAs and Si substrate. The TDs are remarkably reduced through growing HT GaAs layers. It was confirmed that HT GaAs growth with TCA effectively reduced the TD density. We additionally optimized the growth temperature of HT GaAs using the GaAs first-step buffer with an optimized AlAs thickness of 1.68 nm. The GaAs second-step full buffers were grown at three different growth temperatures of HT GaAs (640℃, 680℃, and 720℃). We also carried out the ECCI measurement of the GaAs full buffer samples with different growth temperature. The GaAs buffer sample grown at 680℃ exhibited the lowest TD density of 5.45 × 107 cm-2 (Fig. 8). Thus, we obtained the optimum condition for GaAs full buffer on Si. The LD could be obtained by growing a quantum well or quantum dot with a cladding layer on the optimized GaAs buffer on Si. The AlAs nucleation layer enhanced the surface roughness and quantum efficiency of GaAs. At the same time, TCA with HT-GaAs effectively reduced the TD density with a thin GaAs buffer. Thin GaAs buffers on Si could avoid the effect of different thermal expansion and cracking that has been observed with a thick GaAs on Si. Moreover, we found the optimal thickness of AlAs nucleation for GaAs buffer on Si. By adopting the hybrid technique, we obtained high quality GaAs
We obtained high quality GaAs epitaxially grown on Si (001) substrate with low TD density and small roughness surface by adopting a hybrid technique comprised of the TCA process and AlAs nucleation. The hybrid technique benefitted from the advantages of reducing TD density with a thin GaAs buffer and improving the roughness of the GaAs buffer. We found the optimal thickness of the AlAs nucleation layer through measurements of surface roughness, PL intensity, and TD density. The TD density of GaAs buffer was quantitatively characterized by the ECCI measurement as a non-destructive measurement. Through TCA processes and two-step HT GaAs growth, the TD density of the GaAs buffer was effectively reduced with a thin buffer thickness of around 1.5 μm. Furthermore, the growth temperature of HT GaAs was optimized for the GaAs full buffer on Si. Through utilization of the optimized AlAs nucleation thickness and optimized buffer growth conditions, the TD density of the GaAs full buffer was reduced to 5.45 x 107 cm-2. The hybrid technique of AlAs nucleation and TCA provided high quality GaAs epitaxially grown on Si, which is an important step towards development of a silicon-based light source. Acknowledgments This work was partly supported by Institute of Information & communications Technology Planning & Evaluation (IITP) grant funded by the Korea government(MSIT) (No.2018-0-01632, Development of devices and components beyond single-carrier 400G for next generation optical transmission networks) and (No.2017-0-00074, Generic Technology Study for Quantum Photonic Integrated Circuits) References [1] [2] [3]
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Fig. 8. The TD density of the GaAs second-step buffer with different growth temperature of HT-GaAs as (a) 640℃, (b) 680℃, and (c) 720℃.
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Young-Ho Ko was born in Cheongju, Republic of Korea in 1985. He received the B.S. degree in physics from Korea Advanced Institute of Science and Technology (KAIST), Daejeon, Republic of Korea, in 2008 and the Ph.D. degree in solid-state based nano photonics from KAIST in 2014. Since 2014, he has been with the Electronics and Telecommunications Research Institute (ETRI), Daejeon, Republic of Korea, where he is currently a Senior Researcher with the Photonics/Wireless Convergence Research Department. His research interest includes the nano photonic device and solid-state quantum photonics such as the quantum light sources for the quantum computation, the quantum communication, and the quantum imaging. Won Seok Han was born in Daejeon, Republic of Korea in 1970. He received the B.S. degree in physics from Chungnam National University(CNU), Daejeon, Republic of Korea, in 1993 and the Ph.D. degree in III-V compound semiconductors based vertical cavity surface emitting laser(VCSEL) from CNU in 2000. Since 2001, he has been with the Electronics and Telecommunications Research Institute (ETRI), Daejeon, Republic of Korea, where he is currently a Principal research engineer with the Photonics/Wireless Convergence Research Department. His research interest include III‐V compound semiconductors for high speed optoelectronic devices, quantum light source, and multi-junction solar cells.
High quality GaAs was directly grown on Si(001) substrate through the hybrid technique of AlAs nucleation and thermal cycle annealing methods. Threading dislocation density was quantitatively studied through the electron channeling contrast imaging. Optimal thickness of AlAs nucleation was determined as 1.68 nm through structural and optical characterization. GaAs on Si(001) was obtained for laser diodes with a threading dislocation density of 5.45 × 107 cm-2 with thin buffer thickness of 1.5 μm.
S0038-1101(19)30425-3 https://doi.org/10.1016/j.sse.2019.107763 SSE 107763
To appear in:
Solid-State Electronics
Please cite this article as: Ko, Y-H., Kim, K-J., Hee Baek, J., Young Lee, S., Kim, D-J., Kim, J-H., Guim, H., Seok Han, W., High quality GaAs epitaxially grown on Si(001) substrate through AlAs nucleation and thermal cycle annealing, Solid-State Electronics (2019), doi: https://doi.org/10.1016/j.sse.2019.107763
This is a PDF file of an article that has undergone enhancements after acceptance, such as the addition of a cover page and metadata, and formatting for readability, but it is not yet the definitive version of record. This version will undergo additional copyediting, typesetting and review before it is published in its final form, but we are providing this version to give early visibility of the article. Please note that, during the production process, errors may be discovered which could affect the content, and all legal disclaimers that apply to the journal pertain.
© 2019 Published by Elsevier Ltd.
High quality GaAs epitaxially grown on Si(001) substrate through AlAs nucleation and thermal cycle annealing Young-Ho Koa, Kap-Joong Kima, Ju Hee Baeka, Seo Young Leea, Duk-Jun Kima, Jong-Hoi Kima, Hwanuk Guimb, Won Seok Hana,* a b
Electronics and Telecommunications Research Institute (ETRI), 218 Gajeong-ro, Yuseong-gu, Daejeon, 34129, Korea Korea Basic Science Institute (KBSI), 169-148, Gwahak-ro, Yuseong-gu, Daejeon, 34133, Korea
ABSTRACT High quality GaAs was epitaxially grown on silicon(001) substrate through a hybrid technique of metalorganic chemical vapor deposition. The hybrid technique was comprised of AlAs nucleation and thermal cycle annealing to take advantages of both methods. The AlAs nucleation method improved the surface roughness of GaAs buffer and the thermal cycle annealing method reduced the threading dislocation (TD) density of GaAs buffer with small thickness. The GaAs buffer was grown with two-step growth with changing growth temperature and thermal cycle annealing processes. The optimal thickness of AlAs nucleation was determined to be 1.68 nm through systematic study with a series of buffer samples with different AlAs thicknesses. The TD density and surface roughness of GaAs buffer was quantitatively studied through electron channeling contrast imaging and atomic force microscopy, respectively. The growth temperature of GaAs buffer was also optimized to minimize the TD density. High quality GaAs buffer on Si(001) was obtained with a TD density 5.45 × 107 cm-2 with smooth surfaces. The total thickness of the buffer was approximately as thin as 1.5 μm. This study demonstrated a solution for silicon-based laser diodes to fulfill the monolithic integration of III-V on a Si platform. Keywords: silicon laser; III-V on Si; monolithic integration; dislocation density; AlAs nucleation; thermal cycle annealing
1. Introduction Optical interconnections instead of electronic interconnections have attracted attention owing to their numerous advantages, including large bandwidth and low power consumption, which are increasingly required for high speed and high capacity chip-to-chip data transfer [1, 2]. Consequently considerable effort has been made to fabricate a silicon-based light source as a vital component of optical interconnection [3]. However, silicon is an indirect bandgap material, which makes it challenging to implement a light source on a chip. There have been many attempts to implement a silicon-based on-chip light source, especially laser diodes (LDs). Although the light emission of telecommunication wavelength from Si was obtained by using erbium ions implanted on Si, it remains difficult to manufacture and control the emission wavelength of the electrically driven system [4]. Although Ge has an indirect bandgap, epitaxially grown Ge on Si was fabricated with an LD by creating a pseudo-band gap [5]. However, it was difficult to obtain a highly efficient light Coressponding author. E-mail address : [email protected] (W. S. Han)
source, as compared with III-V based LDs. The integration of III-V LDs with Si could provide on-chip light source with high efficiency. Two types of integration of III-V LDs with Si have been attempted: heterogeneous and monolithic integration. For heterogeneous integration, III-V wafers are mounted on Si wafers and bonded by direct wafer bonding or adhesive-assisted bonding methods [6]. The heterogeneous substrate bonding between III-V and Si has the problem of having a difference in substrate size and a low thermal conductivity. By contrast, monolithic integration, using III-V layers epitaxially grown on Si substrates, can provide integration of large-scale wafers and excellent thermal conductivity. Techniques for growing integrated III-V compound semiconductor thin films on silicon substrates are very important in opto-electric device. Especially, GaAs are the basic materials for optoelectronics and high-speed devices owing to their considerably higher carrier mobility. Because of the lattice constants and thermal expansion coefficients mismatches of GaAs and Si, the TD density of GaAs on Si was as high as 108 to 1010 cm-2, which represents a significant obstacle to achieving high quality GaAs thin films for laser diodes [7]. Various methods have been proposed to improve crystal quality and reduce dislocation density of GaAs on Si. A
lattice-graded buffer such as SixGe1-x buffer and GaP buffer was formed on the Si substrate to eliminate the lattice mismatch, and a high-quality GaAs thin film was grown by using these buffers [8-10]. Alternatively, InP and GaAs were grown on the sloped surface of the patterned Si substrate, reducing TD and stacking faults [11-13], while super lattices have been reported as dislocation filtering layers to effectively reduce the TD density of GaAs on Si [14-16]. The laser diodes on Si were obtained by growing quantum well (QW) and quantum dot (QD) active layers on the GaAs buffer on Si with relatively low TD density through these methods. To reduce the TD density however, the GaAs buffer layer became too thick, which led to a mismatch in thermal expansion and the related problem of the formation of cracks and a poor coupling efficiency with the Si platform. It was therefore very important to reduce the thickness of the buffer layer with low TD density and good surface roughness. Wang and co-workers obtained the GaAs buffer on Si with a small thickness(1.8 μm) by adopting a process of three-step growth of GaAs and thermal cycle annealing (TCA) [17]. The nucleation of AlAs on Si was known to suppress three-dimensional growth of III-V and to provide excellent seeding of III-V nucleation [18]. Chen and co-workers obtained InAs/GaAs QD LDs based-on high-quality GaAs epitaxially grown on Si with low TD density by employing a AlAs nucleation layer and three-step growth technique [19]. In this study, we proposed a hybrid technique to obtain high-quality GaAs epitaxially grown on Si(001) substrate for laser diodes. Through a hybrid technique of AlAs nucleation and TCA methods, we have taken advantage of both methods to acquire good GaAs seeding to simultaneously generate a smooth surface and low TD density with a thin buffer layer. We found the optimal AlAs nucleation layer thickness through systematic study of varying growth time of the AlAs layer. In addition, we quantified the TD density and surface roughness of GaAs buffer on Si using electron channeling contrast imaging (ECCI) and atomic force microscopy (AFM). Finally, we successfully obtained GaAs buffer epitaxially grown on Si(001) substrate with low TD density and with a thin buffer to allow fabrication of laser diodes on Si. 2. Experiments We directly grew GaAs buffers on Si by metalorganic chemical vapor deposition. To suppress formation of antiphase domains, the (100) oriented Si wafer with a 7° miscut towards (011) was used as a substrate. The AlAs nucleation layers were grown on the Si substrate at 420℃ after the buffered oxide etcher and thermal annealing treatment had been used to remove the native oxide on the substrate. We varied the thicknesses of AlAs nucleation layers from 0 to 7.48 nm to minimize surface roughness. A two-step process was employed to grow the GaAs buffers on the AlAs nucleation layer at different growth temperatures. In the first step for the GaAs buffer, the low temperature (LT) GaAs on AlAs nucleation was grown at 420℃. The thickness of the LT GaAs was set to ~ 17 nm for a small roughness value, as confirmed by the AFM. We adopted the procedure of GaAs growth at different growth
Fig. 1. Schematic illustration of GaAs epitaxially grown on Si (001) substrate. GaAs first-step buffer on Si and the GaAs second-step full buffer on Si with the TCA.
temperatures and TCA [17]. For the moderate temperature (MT) GaAs layer, the growth temperature was gradually increased to 640℃ with 1.83 K/sec while keeping growing GaAs. On the MT GaAs of 250 nm, a high temperature (HT) GaAs of 750 nm was grown, where we prepared three series samples with different growth temperature of 640℃, 680℃, and 720℃ for the optimization. In the second-step for the GaAs buffer, wafer temperature was increased to 800℃ and then reduced to 350℃, where this TCA process was repeated three times. The second HT GaAs was grown to 500 nm at 680℃ followed by the second implementation of TCA. The total thickness of GaAs full buffer was approximately 1.5 μm. Figure 1 is a schematic illustration of the two-step process for the growth of the GaAs buffer. Six samples of the first-step GaAs buffer before TCA were grown with different AlAs nucleation thickness to study the effect of AlAs nucleation. Each sample had an AlAs thickness of 0 nm, 0.37 nm, 0.56 nm, 1.68 nm, 3.74 nm, or 7.48 nm. The second-step GaAs buffer was also grown with different AlAs thicknesses of 0.56 nm, 1.68 nm, or 3.74 nm. Furthermore, the second-step GaAs buffers were grown with different growth temperatures of HT GaAs with 640℃, 680℃, or 720℃ for optimization. The AFM was used to examine surface roughness of the GaAs buffer and optical properties were measured by photoluminescence (PL). To count the TD density in GaAs buffers, we used ECCI measurements that allowed direct observation of TDs. We used scanning electron microscopy (Zeiss, Merlin Compact) with a high acceleration voltage and efficient backscattered electron detector for ECCI. The ECCI was obtained by adjusting the tilt and rotation angle of samples to facilitate electron channeling condition. 3. Results and Discussion To study the effect of the AlAs nucleation layer, six samples of the GaAs first-step buffer on Si before TCA were grown with various AlAs growth time. Samples of GaAs buffer had different AlAs thicknesses of 0 nm, 0.37 nm, 0.56 nm, 1.68 nm, 3.74 nm, or 7.48 nm. The thickness of the AlAs nucleation layer was estimated from the average growth rate, which was 6.2 nm/sec. The surface roughness of the GaAs buffer samples was measured by AFM. The AFM images of GaAs buffers with the area of 2 × 2 μm 2 are shown in Fig. 2(a-f). The surface of
the thickness of the AlAs nucleation increased(Fig. 3b) In comparison to the sample without AlAs nucleation, the 1.68 nm and 3.74 nm-thick samples exhibited an enhanced PL of 22.5% and 24.7%, respectively. However, the PL peak intensity was degraded when AlAs nucleation thickness was 7.48 nm. We can compare the quantum efficiency of GaAs buffer from the PL intensity, because the PL measurement of entire samples was performed under the same conditions. The intensity of PL was maximized for an AlAs thickness of between 1.68 nm and
Fig. 2. Roughness measurement of GaAs first-step buffer on Si with different AlAs thicknesses. AFM image of GaAs first-step buffer with different AlAs thickness of (a) 0, (b) 0.37, (c) 0.56, (d) 1.68, (e) 3.74, and (f) 7.48 nm. (g) The rms surface roughness of the AFM measurement area of 10 x 10 μm 2.
these samples exhibited rough surfaces and large defects, which was because the first-step buffer was still thin. The root mean square (rms) roughness of the GaAs buffer was measured under an area of 10 × 10 μm 2 (Fig. 2g). The GaAs buffer on Si without AlAs nucleation had a surface roughness of 7.28 nm. When the AlAs thickness increased to 1.68 nm and 3.74 nm, the roughness decreased to 2.25 nm and 2.12 nm, respectively. The roughness increased again to 6.22 nm when the thickness of the AlAs nucleation increased to 7.48 nm. The surface of the GaAs buffer on Si was improved by inserting the AlAs nucleation layer. The AlAs nucleation suppressed three-dimensional growth and provided excellent seeding of GaAs [18], resulting in improved surface roughness. However, the surface was degraded when the AlAs nucleation was too thick at 7.48 nm. We concluded that there was an optimum thickness of AlAs nucleation for improving the surface of GaAs buffer on Si. The optical properties of the GaAs first-step buffer on Si were characterized by using PL measurement at room temperature with 532 nm continuous-wave laser excitation. Figure 3(a) shows the PL spectra of GaAs buffer samples with different AlAs thicknesses. While the peak wavelength was only slightly changed, peak intensity was highly variable as a function of AlAs thickness. The PL peak intensity increased as
Fig. 3. PL analysis of GaAs first-step buffer. (a) The PL spectra of GaAs first-step buffer with different AlAs thickness of 0, 0.37, 0.56, 1.68, 3.74, and 7.48 nm measured at room temperature. (b) The PL peak intensity with different thickness of AlAs.
3.74 nm. The optical properties had a similar trend to that of AFM surface roughness, previously discussed. Therefore, the optimum thickness of AlAs nucleation was between 1.68 and 3.74 nm. The intensity of PL is enhanced for rough surface samples owing to light scattering. Although the 1.68 nm and 3.74 nm-AlAs thickness samples had smoother surfaces with little light scattering compared to the other samples, they exhibited a higher intensity of PL and therefore a higher quantum efficiency. The AlAs nucleation of 1.68 and 3.74 nm thickness provided improved surface roughness and quantum efficiency of the GaAs buffer on Si. There were various techniques to measure the TD density, including defect-selective etching, transmission electron microscopy (TEM), and cathodoluminescence. As a non-destructive measurement method, the ECCI has been reported as an effective technique to measure the TD density of GaAs [20]. We characterized the TD of the GaAs buffers using the ECCI. To obtain the required conditions for electron channeling, the samples were excited by the electron beam with a high acceleration voltage of 28.5 kV. By adjusting the tilt angle from 3° to 8° and the rotation angle of the samples, the channeling condition of both {040} and {220} excitation was satisfied under the electron channeling pattern shown in the yellow box of Fig. 4(a). The ECCI image was then obtained, as shown in Fig. 4(b) and the dislocations were visualized as bright contrast in the ECCI image. The TD density of GaAs first-step buffer samples was estimated from the ECCI measurements. Figures 5(a-f) shows the ECCI images of GaAs first-step buffer samples with different AlAs thickness. The TD density was 7.15 × 108, 5.44 × 108, 5.49 × 108, 6.67 × 108, 7.42 × 108, and 6.63 × 108 cm-2 for samples of AlAs thicknesses of 0, 0.37, 0.56, 1.68, 3.74, and 7.48 nm, respectively. While surface roughness and quantum efficiency were strongly affected with AlAs thickness, the TD density was only slightly modified by AlAs nucleation thickness. Because, nevertheless, the roughness and the quantum efficiency were improved for the AlAs nucleation of around 1.68 nm and 3.74 nm thickness, the GaAs second-step full buffer with the TCA and HT GaAs growth was obtained based-on the GaAs first-step buffer of 0.56 nm, 1.68 nm, and 3.74 nm thickness of AlAs nucleation. We performed the ECCI measurement of GaAs second-step full buffer on Si. Figures 6(a-c) show ECCI images of the GaAs second-step full buffer with AlAs thicknesses of 0.56, 1.68, and 3.74 nm. We measured the TD density of the samples from seven ECCI images of ~ 51 μm2 area with different positions
Fig. 4. TD analysis by the ECCI. (a) Electron channeling pattern of GaAs first-step buffer grown on Si. The yellow box indicates the excitation condition to measure ECCI (b) ECCI of the GaAs on Si.
Fig. 5. The ECCI images of the GaAs first-step buffer on Si with different AlAs thickness of (a) 0, (b) 0.37, (c) 0.56, (d) 1.68, (e) 3.74, and (f) 7.48 nm
across a quarter of 2 inch wafer. Average TD densities of the full buffer samples were shown in Fig. 6(d). The TD densities of GaAs full buffer on Si were 8.65, 5.45, and 5.57 × 107 cm-2 for samples with an AlAs thickness of 0.56, 1.68, and 3.74 nm, respectively. As a result of the TCA and HT GaAs growth, TD density was effectively reduced to approximately 1/10 of the original density. We also carried out PL measurements of GaAs full buffer samples at room temperature. The relative PL peak intensity of GaAs full buffer samples were 0.780, 1, and 0.999 for AlAs thickness of 0.56, 1.68, and 3.74 nm, respectively. The AlAs nucleation of 1.68 nm thickness provided the GaAs full buffer with high quantum efficiency as well as a low TD density. We confirmed the optimal thickness of AlAs nucleation layer for the roughness, quantum efficiency, and the TD density of GaAs on Si. Moreover, the final thickness of GaAs full buffer was as thin as approximately1.5 μm. We measured the TEM of the GaAs full buffer sample with
Fig. 6. TD analysis of the GaAs second-step buffer. ECCI images of the GaAs full buffer with different AlAs thickness of (a) 0.56, (b) 1.68, and (c) 3.74 nm. (d) Variation of TD density of the GaAs full buffer as a function of thickness of AlAs.
with a thin buffer for LDs epitaxially grown on Si (001). 4. Conclusion
Fig. 7. Cross-sectional scanning TEM image of GaAs full buffer with AlAs thickness of 1.68 nm. Yellow lines indicate interfaces of GaAs layers.
optimized AlAs nucleation thickness of 1.68 nm. Figure 7 shows cross-sectional scanning TEM image of GaAs full buffer on Si, where the TDs were visualized. High density TDs are formed at the interface between GaAs and Si substrate. The TDs are remarkably reduced through growing HT GaAs layers. It was confirmed that HT GaAs growth with TCA effectively reduced the TD density. We additionally optimized the growth temperature of HT GaAs using the GaAs first-step buffer with an optimized AlAs thickness of 1.68 nm. The GaAs second-step full buffers were grown at three different growth temperatures of HT GaAs (640℃, 680℃, and 720℃). We also carried out the ECCI measurement of the GaAs full buffer samples with different growth temperature. The GaAs buffer sample grown at 680℃ exhibited the lowest TD density of 5.45 × 107 cm-2 (Fig. 8). Thus, we obtained the optimum condition for GaAs full buffer on Si. The LD could be obtained by growing a quantum well or quantum dot with a cladding layer on the optimized GaAs buffer on Si. The AlAs nucleation layer enhanced the surface roughness and quantum efficiency of GaAs. At the same time, TCA with HT-GaAs effectively reduced the TD density with a thin GaAs buffer. Thin GaAs buffers on Si could avoid the effect of different thermal expansion and cracking that has been observed with a thick GaAs on Si. Moreover, we found the optimal thickness of AlAs nucleation for GaAs buffer on Si. By adopting the hybrid technique, we obtained high quality GaAs
We obtained high quality GaAs epitaxially grown on Si (001) substrate with low TD density and small roughness surface by adopting a hybrid technique comprised of the TCA process and AlAs nucleation. The hybrid technique benefitted from the advantages of reducing TD density with a thin GaAs buffer and improving the roughness of the GaAs buffer. We found the optimal thickness of the AlAs nucleation layer through measurements of surface roughness, PL intensity, and TD density. The TD density of GaAs buffer was quantitatively characterized by the ECCI measurement as a non-destructive measurement. Through TCA processes and two-step HT GaAs growth, the TD density of the GaAs buffer was effectively reduced with a thin buffer thickness of around 1.5 μm. Furthermore, the growth temperature of HT GaAs was optimized for the GaAs full buffer on Si. Through utilization of the optimized AlAs nucleation thickness and optimized buffer growth conditions, the TD density of the GaAs full buffer was reduced to 5.45 x 107 cm-2. The hybrid technique of AlAs nucleation and TCA provided high quality GaAs epitaxially grown on Si, which is an important step towards development of a silicon-based light source. Acknowledgments This work was partly supported by Institute of Information & communications Technology Planning & Evaluation (IITP) grant funded by the Korea government(MSIT) (No.2018-0-01632, Development of devices and components beyond single-carrier 400G for next generation optical transmission networks) and (No.2017-0-00074, Generic Technology Study for Quantum Photonic Integrated Circuits) References [1] [2] [3]
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Fig. 8. The TD density of the GaAs second-step buffer with different growth temperature of HT-GaAs as (a) 640℃, (b) 680℃, and (c) 720℃.
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Young-Ho Ko was born in Cheongju, Republic of Korea in 1985. He received the B.S. degree in physics from Korea Advanced Institute of Science and Technology (KAIST), Daejeon, Republic of Korea, in 2008 and the Ph.D. degree in solid-state based nano photonics from KAIST in 2014. Since 2014, he has been with the Electronics and Telecommunications Research Institute (ETRI), Daejeon, Republic of Korea, where he is currently a Senior Researcher with the Photonics/Wireless Convergence Research Department. His research interest includes the nano photonic device and solid-state quantum photonics such as the quantum light sources for the quantum computation, the quantum communication, and the quantum imaging. Won Seok Han was born in Daejeon, Republic of Korea in 1970. He received the B.S. degree in physics from Chungnam National University(CNU), Daejeon, Republic of Korea, in 1993 and the Ph.D. degree in III-V compound semiconductors based vertical cavity surface emitting laser(VCSEL) from CNU in 2000. Since 2001, he has been with the Electronics and Telecommunications Research Institute (ETRI), Daejeon, Republic of Korea, where he is currently a Principal research engineer with the Photonics/Wireless Convergence Research Department. His research interest include III‐V compound semiconductors for high speed optoelectronic devices, quantum light source, and multi-junction solar cells.
High quality GaAs was directly grown on Si(001) substrate through the hybrid technique of AlAs nucleation and thermal cycle annealing methods. Threading dislocation density was quantitatively studied through the electron channeling contrast imaging. Optimal thickness of AlAs nucleation was determined as 1.68 nm through structural and optical characterization. GaAs on Si(001) was obtained for laser diodes with a threading dislocation density of 5.45 × 107 cm-2 with thin buffer thickness of 1.5 μm.