Mechanical sensors integrated in a commercial CMOS technology

Mechanical sensors integrated in a commercial CMOS technology

TUgT0S A ELSEVIER Sensors and Actuators A 62 (1997) 698-704 PHYSICAL Mechanical sensors integrated in a commercial CMOS technology J. Bausells a,.,...

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TUgT0S A ELSEVIER

Sensors and Actuators A 62 (1997) 698-704

PHYSICAL

Mechanical sensors integrated in a commercial CMOS technology J. Bausells a,., j. Carrabina

b, A.

Merlos a, S. Bota e, j. Samitier c

Centre Nacional de Microelectrbnic'a ( CSIC), Campus UAB, E-08193 Bellaterra, Barcelona, Spain h Dept. d'lnj'brmhtica, Universitat A utbnoma de Barcelona, E-08193 Bellaterra, Barcelona, Spain Dept. Fisica Aplicada i Electrimica, Universitat de Barcelona, Avda. Diagonal 645, E-08028 Barcelona, Spain

Abstract Pressure sensors and aceelerometer structures have been fabricated in a commercial CMOS foundry technology ( 1.0 ixm from Atmel-ES2) using a post-processing for back-side wafer micromachining. The overall technology (CMOS plus post-processing) can be used for integrated sensor system design through a specific design kit in the standard foundry design environment. Fabrication is then performed so that postprocessing is transparent to the user. © 1997 Elsevier Science S.A. Keywords: Accelerometers; CMOS; Post-processing; Pressure sensors

1. Introduction Integrated sensor systems have a broad market potential in a number of fields. However, access of small and mediumsize enterprises (SMEs) to such systems is still limited, due to non-industrial technological steps and/or a lack o f standardized design and fabrication procedures similar to the semi-custom approach for application-specific integrated circuits (ASIC). In particular, for silicon mechanical sensors the micromachining technology has to be made compatible with integrated circuit (IC) technologies such as CMO S. This compatibility can have different levels [ 1,2]. Almost any sensor type can be fabricated by using a dedicated integrated technology. However, this approach may notbe cost effective for many specific applications of SMEs, which would only require small or medium series. A step forward regarding compatibility is to use a standard technology plus 'closed' compatible modules at any point of the process [3]. Many sensor types have been obtained with this approach, including pressure [4] and acceleration [5,6] sensors. This approach has the problem, from the point of view of cost, that it cannot be used with commercial ASIC foundries. The use of a standard IC technology plus some post-processing steps [7] is the strategy that allows higher degrees of freedom while still using standard commercial foundry technologies. A nice review on this topic has recently been presented by BaRes [ 8]. In particular, by combining a post* Corresponding author. Tel,: + 343 580 26 25, Fax: + 343 580 14 96. E-mail: [email protected] 0924-4247/97/$17,00 © 1997 Elsevier Science S.A. All rights reserved P I I S 0 9 2 4 - 4 2 4 7 (¢)7) 0 1588-4

processing consisting of maskless front-side silicon micromachining with commercial CMOS, many sensor devices have been fabricated [ 1,2,9]. The post-processing approach has the additional advantage that the standard design environment and CAD tools of the foundry can be used for the design and simulation of the complete system [ 10]. On this standard design environment a semi-custom approach based on sensor standard cells can be defined [ 11 ]. The use of the standard-cell semi-custom approach would make much easier the access of SMEs to the design and manufacturing of application-specific integrated sensor systems (AS1S). In this work a back-side post-processing technology is presented, capable of producing silicon membranes and spring-mass structures from a commercial CMOS foundry technology. Pressure sensors and accelerometer structures have been fabricated with this approach. Full-custom and semi-custom design kits for integrated sensor system design have been developed based on the foundry's standard design environment. This work is part of a more general activity on the design and fabrication methodology for ASIS, which has been recently summarized in Ref. [ 12]. A complete design and fabrication structure is being set up, including a postprocessing service transparent to the user.

2. Technology The standard t .0 p,m CMOS technology from Atmel-ES2 is used. The technology features one polysilicon and two metal levels. A post-processing technology has been defined

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that allows the fabrication of devices based in silicon micromachined membranes, obtained by anisotropic etching l?om the back side of the wafer and defined by a double-side aligned photolithographical step. With only one additional processing step, spring-mass structures can be obtained. An integrated pressure sensor obtained by post-processing of the 1.5 Ixm ES2 technology was previously presented by Weber etal. [13]. 2. I. M e m b r a n e structures The silicon membrane thickness is defined by an electrochemical etch stop at the n-well/substrate p-n junction (Fig. 1). Theret'ore all n-well regions acting as etch-stops have to be electrically contacted during the etching. This is achieved by a metal 2 conducting grid over the whole wafer through the scribe line, which is defined during the design back-end processing. As a photolithographical process has to be performed on the back side of the wafer, a polished back side is required. Therefore post-processing starts with back lapping and polishing of the silicon wafers to a final thickness of 300 Ixm. A 0.5 #,m PECVD silicon nitride layer is deposited on the back side of the wafer. A photolithography with dou ble-side alignment is then performed on the back side, and the nitride layer is patterned by reactive ion etching (RIE). Micromachining of the membranes is perforined by an anisotropic etching process in TMAH (25%) at 80°C [ 141]. Good quality of the etched surfaces has been obtained, as can be seen in Fig. 2. The etching is stopped by the electrochemical method [ 151 at the n-well/substrate p-n junction. In this way a membrane thickness of 5 >m, as measured by infrared interferometry, has been obtained. The underetching, i.e., the etching of the silicon ( 111 ) planes under the nitride mask, is related to the anisotropic properties of the etching solution. In TMAH solutions it depends on the process conditions and on the substrate properties, specially on the doping level. For the Atmel-ES2 Passivation

/

Metal 2

/

Subst~te

Fig. I, Cross-sectional structure of the silicon membrane for pressure sensors.

Fig, 2, SEM micrograph o1' a silicon membrane cavity.

Fig. 3. Photograph of a pressure sensor, The square membrane is seen in a lighter grey due to back-side illumination,

wafers and the process conditions discussed above, we have found that the horizontal underetching velocity vttt is such that t.,mo/v~ = 6.1 + 1. l. This means that for a wafer thickness of 300 wm the final underetching is in the range of 42 to 60 /xm. This variation is mainly from wafer to wafer. Within one wafer the variation of the underetching is about half this magnitude. Piezoresistive pressure sensors have been fabricated by using this post-processing technology. The piezoresistors are obtained fi'om the standard PMOS transistor source and drain doping step of the CMOS process. A number of designs have been implemented. Fig. 3 shows a pressure sensor with membrane diinensions of 600 I~ln × 600 Ixm connected to several Atmel-ES2 I/O pad standard cells. The large number of pads in this particular example is due to the presence of transistor test structures in the same device. This device has not yet been optimized. It can be seen that the positions of the piezoresistors are relatively far from the membrane edges. This is due to conservative design rules and to the large underetching discussed above. Piezoresistive devices with a membrane identical to this one but with a standard design

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J. Bausells et al. /Sensors and A cttlators A 62 (1997) 698-704 Metal 2

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Metal 1

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Fig. 5. Schematic cross section of a s p r i n g - m a s s accelerometer structure,

0 0.0

,I, 0. l

I 0.2

I 0.3

Pressure (bar) Fig. 4. Typical response of a piezoresistive pressure sensor with membrane dimensions of 600 /.am × 600 /.Lm with 5 V supply. The offset has been subtracted.

(without test structures) have been measured for 0.3 bar range applications. A sensitivity of about 20 mV V - ] barhas been obtained, with a non-linearity of less than 0.4%. Fig. 4 shows a typical output from these pressure sensors. For industrial fabrication, reproducibility of the sensor performance is important. In the current stage of this work, only preliminary reproducibility information is available. Variations of sensor response parameters, such as sensitivity, within one wafer seem to be less than 10%, whereas variations from wafer to wafer are about 20%. Fig. 6. Top SEM view of an accelerometer structure.

2,2. Spring-mass structures Spring-mass structures consist of a thick silicon mass suspended by thin silicon beams. To fabricate these structures, the thick silicon mass is first defined on a thin silicon membrane. The mass is fabricated by using convex comercompensation structures [16]. A TMAH:IPA (isopropyl alcohol) solution can be used to reduce the convex comer etching rate of TMAH [14]. On the front side of the membrane the beams that support the mass are defined by areas of stacked contact/via/passivation openings on the CMOS technology, which leave the silicon surface exposed to the ambient. A maskless dry silicon RIE from the front side is used to etch the silicon membrane in those regions. The presence of IPA has the additional effect of reducing the underetching to values in the range 25-30 ~m, for a wafer thickness of 300 Ixm. The final result is the structure schematically shown in Fig. 5. These structures have been successfully fabricated. Figs. 6 and7 show top and bottom views of a twin-mass [ 17] piezoresistive accelerometer fabricated in this technology. An approximate analytical calculation [ 18] can be used to predict the sensitivity of this device. In our case, with bridges of 5 ~m thick silicon with all the CMOS dielectrics on top, and masses with dimensions of about 1.6 m m × 0.9 mm × 300 Ixm, the calculated sensitivity is 30 IxV V - ~g - ~, which is a relatively low value. The static response of the accelerometers

Fig. 7. Bottom SEM view of an accelerometer structure.

has been measured by rotating them in the earth's gravitational field. They have operated successfully with a sensitivity of 20 0.VV -~ g-~.

3. D e s i g n kit

As discussed in Section 1, the use of a commercial C M O S foundry plus post-processing to fabricate integrated s e n s o r systems has the advantage that the standard design environ-

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ment of the foundry can be used to design the complete systems. This means that the existing IC design environment has to be extended to include the sensor devices. In our case, a design kit has been defined [ 191 for full-custom and standard cell semi-custom design under the Cadence Design Framework II (DFWlI) design environment of Atmel-ES2. It includes the mechanical sensors fabricated by the postprocessing technology defined in this work, plus ISFET chemical sensors [12], and will also include additional micromachined thermopile-based sensors [20] and specific signal-processing circuit cells.

3.1. Full-custom design environment: technologyfile The full-custom design environment is required to design devices that are not available as standard cells, and is also used to design the cells themselves. It includes essentially a set of design rules for the different mask levels, with automatic design-rule checking, and the generation of the device models. Basic tools fi'om a design framework can easily cope with enhancements to take sensors into account, through the technology file for all geometry definitions and relations, and through the simulation environment that allows the integration or link with additional simulators [21]. The technology file is the standard term of DFWII that contains the layer SENSOR area

I

1 184 p.m

<

i

(

Physical membrane

)

Drawn membrane

(MEMBR shape) '

~i \

~ 150 ~m ---'9 206 ~m Fig. 8. Schematic cross section of a pressure sensor showing its main design rules.

701

information, device definition, design rule check, device extraction and the layout versus schematic tool. Sensor layouts are drawn using different geometries depending on the type of sensor being designed. Therefore, the set of design rules is specific for each of them. This is done by marking a sensor region with an additional layer, the 'sensor' layer, and indicating the type of sensor in the 'text' layer. As an example, drawings on the 'membrane' layer (the mask layer that defines the membrane opening on the back side) are different for a pressure sensor, based on only a single membrane, and accelerometers that use a big mass of silicon. For accelerometers there are also some specific relationships between the membrane (back side) and passivation (front-side opening) masks. By using these two masks, passivation and membrane, all types of sensors can be defined. For each type of sensor, a specific set of design rules is defined for the membrane mask. Also, the rules for the rest of the layers inside the sensor structure are redefined. As an example, Table 1 and Fig. 8 show the design rules for pressure sensors. Note that most dimensions involved in sensor design are much larger than the typical critical dimensions of the standard CMOS layers. In particular, the design rules concerning the back-side etching have large values due to technological restrictions. These are the accuracy of the frontto-back-side mask-alignment equipment, which is + I0 ~m, and the underetching discussed in Section 2. For the device extractor and the layout versus schematic tool, the sensor scheme has to be defined in advance, in order to back-annotate the geometrical parameters to the corresponding properties of the device model. There are additional rules concerning the floorplan of microsystems consisting of sensor devices and circuitry, since the sensor devices cannot be placed everywhere, There are different types of physical restrictions: the distance between the sensor and the rest of the circuit, in order to preserve the CMOS devices from the sensor-specific technological processes; the distance of micromachined sensors to the pads, since wire bonding on pads located over partially back-side etched regions may result in low bonding quality; or the

Table 1 List of main design rules for pressure sensors. The MEMBR layer is the mask that is used for back-side etching of silicon. The SENSOR layer is used to identify sensor regions in order to apply there the specific sensor design rules. Some of the minimum dimensions depend on the wafer thickness. The values shown are for a wafer thickness of 300 ~m Design-role name

Minimum dimension (~m)

MEMBR shapes must be inside SENSOR areas MEMBR shapes must be rectangular CMOS circuits must be outside SENSOR areas Membrane n-wells must be connected to the scribe line through metal 2 Spacing between MEMBR shapes Size of MEMBR shapes Spacing between bonding pad and MEMBR shape Difference between drawn membrane and physical membrane Spacing from physical membrane to n-well Spacing from piezoresistor to physical membrane Spacing between MEMBR shape and chip boundary

145 367 23 - I84 30 30 150

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distance of micromachined sensors to the chip boundary, for the mechanical stability of the chip. These restrictions result in specific design rules. Their values for pressure sensors can be seen in Table 1. There are also purely electricai restrictions, similar to those found in mixed A / D ICs, such as couplings among sensitive lines and parasitic resistances of the connections of different lines up to the piezoresistor bridge. The effect of these restrictions is that the device has to be made as symmetrical as possible. 3.2. Semi-custom environment

The microsystem semi-custom environment contains a basic sensor cell library with all representations (i.e., electrical models, geometrical structures), which includes parametrizable devices automatically generated, and the simulation environment. Of the two types of devices discussed in this work, currently only the pressure sensors are available as standard cells. Our semi-custom environment also includes specifically designed analog cells that meet the electrical constraints of sensors (low signal level, impedance coupling, etc.), and the common cells usual in cell libraries (analog and digital) together with some macrocells (i.e., A / D converters) coming from the ECPD 10 Atmel-ES2 standard circuit cell library. Models for devices can in general be obtained either from some analytical theory, which can be easily implemented using soNers (such as Mathematica) [22], or from parametric models coming from structural simulators. The critical point becomes the agreement between simulation and measurement. In many cases, for specific sensors the differences are small (similar to those found in MOS transistors, for example), and some known sources of non idealities can be easily introduced in the models (for example, the mask misalignment). We have based our approach on parametric models, for a number of reasons: first, sensor models are easily transportable to different host computers through standard programming (C language); secondly, the models can include all main representations (simulation models, geometric aspect) starting from high-level specifications (such as the measurement range) ; thirdly, basic equations for sensors can be made relatively simple (polynomials), and therefore convergence problems are reduced; finally, different models can be used for the same sensors in different conditions. The choice of the model will then depend on the sensor range and precision. Different models have been generated in a spice-like format. For the pressure sensor, the design kit includes four static models. The model level 1 is based on the linear plate theory, with first-order piezoresistive coefficients and simple temperature dependence. Level 2 has a more precise model for temperature dependence, based on an electrothermal coupling for elementary parameters. Level 3 takes into account large membrane deflection effects. For an optimal representation of the non-linearity, the sensor output is represented by a look-up table Vo,, = t i P , T). Level 4 is sire-

ilar to level 3, but includes second-order piezoresistive coefficients. It also produces a look-up table. The concept of a specific sensor cell library, integrated with the rest of cell libraries under Cadence DFWII, is being developed with two approaches: to define a set ofpredesigned and precharacterized sensors that cover specific ranges of applications, and to allow the automatic generation of sensors within a given range. For pressure sensors, currently in the first approach the standard devices have membrane dimensions of 600 ixm × 600 txm, with the sensor characteristics discussed in Section 2.1. In the second approach the membrane thickness is fixed, but the membrane lateral dimensions and piezoresistor positions can be varied. Devices in the range 200 p,m × 200 ~m to 800 p,m × 800 ~m have been fabricated and tested. Together with this library, there is another interface cell library that contains specifically designed analog interface ceils. In some cases, such as in the pressure sensors, there are two versions of the interface circuit cell, stand-alone or in a macrocell that includes the specific sensor for which it has been designed. An important point in defining a design methodology for ASIS is the simulation environment, and its connection with test and calibration. These subjects are still open questions for microsystems [23,24]. At the simulation level, the number of signal sources is limited (one for each sensor type) and the dynamic range of the devices is quite low compared to MOS transistors (tens of kilohertz). Typical analyses to be performed are d.c., a.c., transitory and noise. In our simulation environment, those analyses can be done for the sensor and analog circuitry with electrical simulators. The system-level simulations, that also include digital cells, are done with mixed-signal tools (Analog Artist) integrated into DFWII. In this case a transitory analysis can be made based on communicating the analog simulator (cdsspice, spectre or hspice) with the standard digital simulator of Atmel-ES2 (Verilog).

4. Conclusions In summary, pressure sensors and accelerometerstructures have been fabricated in a commercial CMOS foundry technology ( 1.0 ~m from Atmel-ES2) using a post-processing approach for silicon micromachining from the back side of the wafers. This technology can be used for integrated sensor system design through a specific design kit that has been defined in the standard foundry design environment. The pressure-sensor devices have been included in the design kit as standard cells. The fabrication of the devices can then be performed with the post-processing transparent to the user.

Acknowledgements This work has been supported by the ESPRIT Programme of the EC through the DEMAC project (No. 8756). The

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authors are grateful to the additional partners of the DEMAC consortium: Atmel-ES2, ETH ZUrich and Fagor Sensores. The contribution of P. Sagnol from Atmel-ES2 is specially acknowledged. CNM and UB acknowledge support from CICYT through grants TIC95-119I-CE and TIC95-I708CE.

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[ 18] S. Shen, J. Chen and M.H. Bao, Analysis on twin-mass structure for a piezoresistlve accelerometer, Sensors and Actltators A, 34 (1992) 101-107. [ 19 ] J. Carrabina, L. I--I6brard,A. Merlos, J. Saiz and J. Bausells, Design kit for mierosystems design for an enhanced CMOS process, Proc. Eur. Design Test Conf. 1996, Paris, France, 11-14 March, 1996, p. 619. [20] F. Mayer, O. Paul and H. BaRes, Influence of deslgn geometry and packaging on the response of thermal CMOS flow sensors, Tech. Digest, 8th lnt. Conf Solid-State Sensors and Actuators (Transducers '95/Eurosensors IX), Stockhohn, Sweden, 25-29June, 1995, pp. 528531. [21] J.M. Karam, B. Courtois and M. Bauge, High level CAD melds microsystems with foundries, Proc~ Eur. Design Test C o t f 1996, Paris, France, 11-14 March, 1996, pp. 442-447. [22] L. Hfbrard, Electrical models for piezoresistive pressure sensors, Tech. Report, CNM, 1995, ~ [23] J,M. Karam, B, Courtois, A. Poppe, K, Hoffmann, M, Reaez, M. Glesner and V. Sz6kely, Applied design and analysis of mierosystems, Proc. Enr. Design Test Conf 1996, Paris, France, 11-14 March, !996, pp. 528-532. [24] W. Suss, K. Lindemann, H. Eggert, M. Gorges-Sehleuter, W. Jakob, W. Hoffmann and R. Rapp, Step by step from specification to realization of an electrochemical mierosystem, Proc, Eur. De,~ign Test Conf 1996, Paris, France, l l-14 March, 1996, pp, 533-537.

Biographies

Joan Bausetls was bona in Barcelona, Spain, in 1957. He graduated in physics in 1980, and received M.S. (1982) and Ph.D. (1986) degrees in solid-state physics, all from the University of Barcelona. From 1981 to 1986 he worked as a process and R&D engineer in the semiconductor industry. In 1986 he joined CNM, where he has been a permanent researcher since 1988. At CNM he worked in ion-implantation technology, was manager of clean-room operations and head of the former Sensor and Actuator Group. Currently he is a member of the Microsystems Department. His research interests are silicon sensor and actuator devices and their integration in silicon microsystems. Jordi Carrabina was born in Manresa, Catalonia, in 1963. He graduated in physics in 1986, and received M.S. (1988) and Ph.D. ( 1991 ) degrees in microelectronics computer science, from the University Autonoma of Barcelona. In 1986 he joined CNM with a national fellowship, where he has been collaborator researcher since that time. Since 1990, he has been an associate professor at the Computer Science Department of the University Autonoma of Barcelona, heading a group of 11 researchers on applications and CAD for microelectronics. His research interests are CAD tools for microsystems and hardware-software codesign methodology. Angel Merlos was born in Barcelona, Spain, in 1965. He graduated in sciences (physics) in 1988 and received the Ph.D. degree in 1993 from the Universitat Autbnoma de Barcelona. In 1988 he joined the Centre Nacional de Microelectrbnica (IMB-CNM-CSIC). Since 1988 he has been working in the Silicon Technology and Microsystems Department. The main topics of his research activity are

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related to the development of silicon micromechanics, silicon sensors and silicoa microsystem technologies. Sebastian A. Bota was born in Mallorca, Spain, in 1964. He received the degree in physics in June 1987, and the degree of Doctor in Microelectronics in June 1992, both from the University of Barcelona. Since 1988 he has been with the Department of Applied Physics and Electronics at the University of Barcelona, where he is currently associate professor in electrical engineering. Josep Samitier has been a full professor at the University of Barcelona since February 1995. From 1977 to 1982 he studied physics at the University of Barcelona. He was research fellow during 1983 and 1984 in the Applied Physics

Department of the University of Barcelona in the field of GaAs MESFET devices and electro-optical characterization of III-V semiconductors. From February 1984 to June 1985 he was visiting research fellow at the Laboratoire D'Electronique Philips, LEP, Paris, France. He received his Ph.D. from the University of Barcelona in 1986. In 1988, he was appointed as assistant professor of electronics at the same university working in the development of microsystem devices and electronic instrumentation. Cun'ent research and developed projects concern the design, test and signal conditioning of microsystems and the design of interface circuits for physical and chemical sensors. At present, he coordinates the research activities on electronic instrumentation developed at the Electronic Matelials and Engineering Laboratory.