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NiO stacked heterostructure
Microelectronic Engineering 104 (2013) 85–89
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Fabrication and mechanism of high performance bipolar resistive switching device based on SrTiO3/NiO stacked heterostructure Yongdan Zhu a,b, Meiya Li a,⇑, Zhongqiang Hu a, Hai Zhou a, Xiaolian Liu a, Xiaoli Fang a a b
School of Physics and Technology, and Key Laboratory of Artificial Micro/Nano Structures of the Ministry of Education, Wuhan University, Wuhan 430072, PR China School of Information Engineering, Hubei University for Nationalities, Enshi, 445000 Hubei, PR China
a r t i c l e
i n f o
Article history: Received 19 June 2012 Received in revised form 19 September 2012 Accepted 21 November 2012 Available online 8 December 2012 Keywords: Thin film SrTiO3/NiO stacked heterostructure Bipolar resistive switching Multilevel memories
a b s t r a c t This paper reports the bipolar resistive switching effect in a SrTiO3/NiO stacked heterostructure which was epitaxially deposited on an Nb doped SrTiO3 substrate by pulsed laser deposition. This heterostructure shows high resistive switching ratio of over 104 at the read voltage of 0.5 V and an expected retention ability of ten years, which is better than that of NiO-based device. Moreover, the resistive switching ratio can be adjusted by changing the maximum applied voltage or compliance current, which shows promising for multilevel nonvolatile memories application. Meanwhile, these results have been discussed by carrier injection-trapped/detrapped process. Ó 2012 Elsevier B.V. All rights reserved.
1. Introduction Metal oxide resistive switching memory is one of the most competitive candidates for future nonvolatile memory applications due to its simple structure, fast switching speed, great scalability and compatibility with current semiconductor technology [1,2]. The physics of resistive switching (RS) effect and the potential application for the future generation of non-volatile memory have attracted great research interests of scientists over the world. At present, studies of RS have been done for many oxide materials, including binary metal oxides such as NiO [3–5], TiO2 [6,7], ZnO [8,9] and GO [10], perovskite type oxides such as La0.7Ca0.3MnO3 [11], Pr0.7Ca0.3MnO3 [12], BiFeO3 [13] and SrTiO3 [14] etc. Among various RS materials available, simple binary oxide materials, such as NiO and TiO2 [3–7], are better candidates than ternary or quaternary oxides for microelectronics applications because of their simpler fabrication process and compatibility with standard semiconductor technology. Because forming process or high read voltage can result in inconvenience in most devices, to develop a high performance RS device with high RS ratio, low read and operating voltage and without forming process is an important task. To date, based on different device structures and results, many different models about RS including the conductive filaments, Schottky barrier, oxygen migration, trapping–detrapping process etc. have been proposed [15]. Recently, oxygen vacancies are believed to be one of the key issues for understanding the RS mechanisms such ⇑ Corresponding author. Tel.: +86 27 68752336; fax: +86 27 68752569. E-mail address: [email protected] (M. Li). 0167-9317/$ - see front matter Ó 2012 Elsevier B.V. All rights reserved. http://dx.doi.org/10.1016/j.mee.2012.11.023
as Schottky barrier, trapped–detrapped and the conductive filament. However, the understanding of physics and mechanism of RS are still an open question because of the complexity of RS due to the differences in materials, preparing methods and equipments involved, which may limit the practical application in ReRAM [1,2]. Most RS devices are based on a metal–insulator–metal (MIM) structure with a single oxide thin film, and their performances are not very good. However, recent reports indicated that multilayer-based RS device could obtain excellent performance such as high RS ratio, fast switching speed, great scalability and ultra-low power. Cheng et al. reported a stacked GeO/SrTiOx based high performance and low-power operated resistive memory [16]. Liu et al. reported an improved RS effect by inserting a thin YSZ film between Pr0.7Ca0.3MnO3 and W electrode, and improved RS properties in TiOx/La0.7Ca0.3MnO3 stacked structures [17,18]. In our previous study, we reported a RS effect in ZnO/HfO2 stacked films [19]. In this study, an epitaxial SrTiO3/NiO stacked heterostructurebased device was fabricated, in which NiO used as a p-type layer and SrTiO3 as a carrier trapping layer. Bipolar switching behavior with high performance was demonstrated in this structure. This kind of insulator/semiconductor-based device may open a new way to the research and development of RRAM, and what is more, to the exploration of the mechanism of RS. 2. Experiments The samples were fabricated by pulsed laser deposition (PLD) using a KrF excimer laser (k = 248 nm). 100 nm-thick NiO and 10 nm-thick SrTiO3 thin films were grown in sequence on a Nb
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(0.7% wt) doped SrTiO3 (1 0 0) (NSTO) single crystal substrate. The substrate temperature was kept at 650 °C and the laser energy was kept at 300 mJ during the whole deposition process. The oxygen pressure was kept at 13 Pa for the deposition of SrTiO3 and 20 Pa for that of NiO, respectively. After the deposition, the films were cooled to room temperature at a cooling rate of about 2.7 °C/min. Before the electrical measurements, Ag electrodes were deposited on the SrTiO3 film using DC magnetron sputtering through a shadow mask with a diameter of 0.2 mm and the bottom electrode In was pressed on the NSTO to form ohmic contacts, forming a Ag/SrTiO3/NiO/NSTO/In device. The current–voltage (I– V) characteristics of the devices were measured with two-probe configuration by Keithley-4200SCS. The current from top electrodes to NSTO was defined as a positive direction. RS effect was investigated by applying different voltages at room temperature. The crystalline structure of the films was characterized by X-ray diffraction (D8 Advance, Bruker, Germany) with Cu Ka radiation and the chemical state of the constituent elements of the films was investigated by X-ray Photoelectron Spectroscopy (XPS, VG Multilab 2000).
3. Results and discussion As we known the SrTiO3 film can be epitaxially grown on NSTO substrate at high temperature, we concern more about the growth orientation of NiO film on NSTO [14]. Fig. 1(a) shows the XRD patterns of NiO film deposited on NSTO. As can be seen from the h–2h pattern in Fig. 1(a), the NiO film exhibits only (2 0 0) peak without any other diffraction peaks, suggesting (2 0 0) orientation growth of the film. XRD U-scan has been carried out to identify the epitaxial growth of the (2 0 0) oriented NiO film on NSTO. Fig. 1(b) shows the U-scan patterns of the NiO film along (1 1 1) planes with four peaks located at every 90° in the pattern, indicating the epitaxial growth of NiO on NSTO (1 0 0) substrate. To analyze the chemical states of the constituent elements, XPS measurement was performed. Fig. 1(c) shows the typical Ni2p XPS spectrum of the NiO film. The binding energy of Ni 2p3/2 is located at about 854.3 eV in
the spectrum, consistent well with that expected by theory for Ni2+ (854.3 eV) within a certain range of error, indicating Ni2+ ions are dominant in this sample. Fig. 1(d) presents the O1s XPS spectrum of the NiO film and the large peak is well fitted by two nearly Gaussian components, centered at 529.7 eV (Oa) and 531.75 eV (Ob), respectively. The Oa peak at a low binding energy is attributed to the Ni–O bonds [20]. While the Ob peak at higher binding energy is usually attributed to the chemisorbed or dissociated oxygen or OH species on the surface of the NiO film, such as –CO3, adsorbed H2O or O2. Therefore, the large and high Oa peak suggests that the Ni–O bonds are the main chemical state in the NiO film. The RS behavior of the SrTiO3/NiO stack-based Ag/SrTiO3/NiO/ NSTO/In device was investigated in detail. An inset graph in Fig. 2(a) shows the device structure. The RS characteristic of the device was investigated by applying swept voltage in sequence as 0 V ? +5 V ? 0 V ? 5 V ? 0 V, where positive direction was defined as the current flowing from the Ag electrodes to NSTO. As shown in Fig. 2(a), the device exhibits typical stable bipolar RS behavior without forming process. When the voltage was swept from 0 V to +5 V, the resistance of the device changed from high resistance state (HRS) to low resistance state (LRS) at a specific voltage and ‘‘on’’ state was achieved, i.e., set process. But LRS cannot come back to HRS as the positive voltage swept backward. When the voltage was swept from 0 V to 5 V, the current increased to a maximum value at around 1.2 V, and then decreased gradually to a low value. Therefore, the resistance state became HRS again and ‘‘off’’ state was achieved, i.e., reset process. Thus 5 V is a sufficient reset voltage for bipolar RS of the device. Similar bipolar RS behaviors were also reported by other groups [13,14]. The RS effect can be seen at both the positive and negative voltage regions. However, the I–V curves are asymmetric and the RS effect in the negative region is more pronounced than that in the positive region. We define the RS ratio at a specific read voltage as RHRS/RLRS. The curve of RHRS/RLRS varying with different read voltages under the sweeping voltage of [ 5 V, 5 V] is shown in Fig. 2(b). High RHRS/RLRS ratio of several thousand could be reached in the device at low voltage region. We noticed that the voltage
Fig. 1. The XRD patterns for NiO/ NSTO in h–2h scan (a), and the U-scans of NiO (1 1 1) and NSTO (1 1 1) planes (b). Typical XPS spectra of the NiO film for Ni 2p (c), and O1s (d).
Y. Zhu et al. / Microelectronic Engineering 104 (2013) 85–89
Fig. 2. (a) Typical I–V characteristics of the Ag/SrTiO3/NiO/NSTO/In device. The inserted graph is its schematic structure. (b) Dependence of RS ratio on read voltage derived from the I–V loop in a voltage range [ 5 V, 5 V]. (c) The time retention characteristics of HRS and LRS read at 05 V.
range in which the RS ratio reached considerable large value was just from 0 V to 0.2 V in positive region, while the correlated negative region was from 0 V to 1 V which showed higher read reliability. Therefore, we concerned more about the RS effect in the negative region and chose 0.5 V as a suitable read voltage. At the read voltage of 0.5 V, the RS ratio is about 4 104, indicating the potential for resistance memory application. Compared with the RS ratio of 102 in the SrTiO3/NSTO structure device reported by Ni et al. [14], our SrTiO3/NiO double layer based device shows improved RS behavior. As a RS device for non-volatile memory, the time retention characteristic is an important parameter to reflect the performance of the device. Generally speaking, the retention characteristic of heterostructure-type RS device is not very stable. Ni et al. [14] reported the SrTiO3/NSTO bipolar RS and its time retention characteristic was of long time relaxation properties given by the CurieVon Schweidler law [21]. In this work, for our SrTiO3/NiO
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stacked-based device, after 100 cycles’ sweeping, the RHRS and RLRS read at 0.5 V showed good time retention characteristic, as shown in Fig. 2(c). Moreover, ten years of retention ability under room temperature can be expected in this device by extrapolation according to the Curie–Von Schweidler law, which shows great potential in nonvolatile memory application [22]. As discussed above, the forward voltage can set the resistance state to LRS and the reverse voltage can reset it to HRS. In order to investigate the influence of the maximum reverse voltage on the HRS, we applied different maximum reverse voltage such as 1 V, 2 V, 3 V, 4 V and 5 V, while the maximum forward voltage was kept at 5 V. It should also be noticed that the resistance state was drove to LRS by 5 V set voltage before each new cycle starting, so that the LRS was the same for each cycles. The voltage was swept in sequence as 0 V ? 5 V ? 0 V ? Vmax ? 0 V with a compliance current of 0.01A. The I–V curves under different reset voltage are shown in Fig. 3(a). It is very interesting that the I–V curve with the small reset voltages exhibit weak hysteresis. But as the reset bias increases to above 2 V, the hysteresis becomes more and more prominent. The dependence of RHRS and RLRS read at 0.5 V on the maximum reset voltage is shown in Fig. 3(b). As can be seen in the figure that the RHRS can be adjusted by different reset voltages and the larger reset voltage leads to larger RS ratio. The resistance of HRS was increased from 890 X to 9.6 106 X as the reset voltage increased from 1 V to 5 V. In addition, we have also investigated the I–V curves of the device after applying different forward voltage while keeping the reset voltage at 5 V (not shown here). It seems that, with the increase of the forward voltage, the I–V hysteresis of the device became more pronounced. Moreover, the RS characteristics versus the compliance current were investigated. As shown in Fig. 3(c), with the decrease of the compliance current, the currents gradually reduced and the switching ratio also changed correspondingly. Similar results were also observed in other studies [23]. These results suggest a feasible way to control the switching characteristics of the device and may have potential application in multilevel memories. In Ni’s report [14], the pulse voltage could switch the resistance to different resistance states. The RS ratio of their device is only 102 which could be distinguished into at maximum only three effective memory states. However, the high RS ratio in our device is about 104 which could be distinguished into at maximum four memories states. Moreover, the multilevel resistance states in our device can be controlled by voltages or compliance current. In addition, good time retention characteristic is demonstrated in our device. Therefore, our SrTiO3/NiO based device shows promising potential in multilevel memory application. We now turn to the origin of the above discussed RS behaviors. The excellent performance of SrTiO3/NiO stack-based RS device should be closely associated with the structure and the mechanism. Firstly, the conduction mechanisms in the positive and negative voltage regions during one typical RS process have been investigated. Fig. 4 shows the double logarithmic plots for the I– V curve of Ag/SrTiO3/NiO/NSTO/In under the sweeping voltage of ±5 V in the positive (Fig. 4(a)) and negative (Fig. 4(b)) voltage regions. When the device in HRS was applied positive voltage, the I–V curve showed a linear behavior for V < 0.2 V, then a sharp current increased with a slope of 6 for V > 0.8 V (positive threshold voltage (VPT)) and followed by a slope of 2. This behavior can be well described by the trap controlled space charge limited current (SCLC) mechanism [14,24]. VPT is the transition voltage from the trap-unfilled to trap-filled space charge limited region. Upon decreasing the voltage, the current remains at the higher value indicating that the trapped carriers are not released from the trap centers, which result in the hysteresis of I–V curves. Fig. 4(b) shows the resistance state from LRS to HRS under negative bias. We can see that at the low voltage region (|V| < negative threshold voltage
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Fig. 3. (a) The I–V curves of the SrTiO3/NiO stacked based device at different max reverse voltages with max positive voltage +5 V; (b) the max reverse voltage amplitude dependence of HRS and LRS of the device read at 0.5 V; (c) RS characteristics of the device under various compliance currents; (d) the I–V curves of the device with three kinds of structures: NiO, STO/NiO and STO/NiO/STO.
Fig. 4. I–V curves of the Ag/SrTiO3/NiO/NSTO/In device in double logarithmic plot for positive voltage region (a), and negative voltage region (b).
|VNT| = | 1.1 V|), I–V curve exhibits linear behavior, corresponding to the ohmic conduction mechanism. Then, a negative differential resistance can be observed when the sweeping voltage was higher than the VNT (|V| > |VNT|). As the voltage sweeps back from 5 V to 0.4 V, the slope is 4 followed by a slope of 1, characterized as the
SCLC controlled exponentially distributed traps. As the applied voltage closes to 0 V, the transport is of ohmic feature owing to the free carriers in the film. Therefore, the SCLC is a key transport mechanism at the Ag/SrTiO3/NiO/NSTO/In interfaces and the films, which induces the I–V hysteresis. For the Ag/SrTiO3/NiO/NSTO/In device structure, the RS behavior may come from following parts: Ag/SrTiO3, SrTiO3/NiO, NiO/ NSTO, and NSTO/In interface, SrTiO3 and NiO films, and the NSTO substrate. The contacts of In/NSTO as well as Ag/SrTiO3 are ohmic and we know the ohmic contact has no contribution to RS. The asprepared SrTiO3 film usually contains oxygen vacancies, which act as defects; while the NiO film is a p-type semiconductor which contains Ni vacancies and other defects. Therefore when a SrTiO3 film was deposited on a NiO film, a junction with large barrier can be formed at the interface. On the other hand, when a p-type NiO film is epitaxial grown on an n-type NSTO substrate, a p–n junction can be formed. Thus, to distinguish the role of different parts of the device, we have also prepared a Ag/NiO/NSTO/In device which shows weak RS effect as shown in Fig. 3(d). The PN junction of NiO/NSTO in this device only acts as a diode-like device with weak RS effect. Actually, the diode-like behavior of the NiO/NSTO junction plays an important role for this asymmetric I–V hysteresis. Therefore, we deduce preliminarily that the RS effect of the device can be mainly attributed to the SrTiO3/NiO interface state. As discussed before, SrTiO3 is an insulator and may usually contain oxygen vacancies which would act as carrier trapping centers. Therefore the RS behavior of SrTiO3/NiO may be due to the carrier injection-trapped/detrapped process at the interface between NiO and SrTiO3 by applied electric field. Since the carrier concentration of NiO is larger than that of SrTiO3, the built-in potential of the junction should be mainly applied to SrTiO3. As a result, the depletion layer of SrTiO3/NiO junction is mainly located in SrTiO3. The property of the junction is determined by the depletion layer. When the forward voltage applied on the device, the PN junction of NiO/NSTO was at ‘‘on’’ state, so the electronic carrier would across the interface of NiO/NSTO and inject into the SrTiO3/NiO interface and be trapped by oxygen vacancies and other defects. Consequently, the depletion layer of SrTiO3/NiO is narrowed, and
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the junction becomes conductive (LRS). These trapped electrons cannot be released until the reverse voltage is applied on the device. In this case, accordingly, the width of the depletion layer is increased and the barrier height is raised, resulting in the resistance state from LRS to HRS. More importantly, the number of trapped (detrapped) electrons can be controlled by the magnitude of forward (reverse) voltage, which would lead to forming controllable resistance state that has potential application in multilevel memories [25]. We must also note that these resistance states are nonvolatile, as shown in Fig. 2(c), which can be attributed to the proper trapping center in the SrTiO3/NiO and the PN junction barrier existed in between NiO and NSTO. Therefore, the trapped electrons cannot be released because of the double-barriers, indicating stable resistance states. Moreover, we have also prepared another Ag/SrTiO3/NiO/ SrTiO3/NSTO/In device by inserting an extra 10 nm-thickness SrTiO3 layer at the NiO/NSTO interface of the original Ag/SrTiO3/ NiO/NSTO/In device, as shown in Fig. 3(d). The RS effect of this device can be compared with the original device in capable of multilevel memories and long retention time, with only the work current decreased by one order of magnitude and the set voltage increased. This is understandable because when a 10 nm-thickness SrTiO3 layer was inserted at the NiO/NSTO interface, a trapping layer was formed at the interface and the barrier between NiO and NSTO would be increased, thus the RS effect was enhanced. But when double-trapping layers were formed, the carrier trapping/detrapping would become difficult, so the required set and reset voltage was increased. 4. Conclusions In summary, a SrTiO3/NiO stacked film was grown on a NSTO substrate to form a Ag/SrTiO3/NiO/NSTO/In heterostructure device. High performance bipolar RS behavior with a high RS ratio of over 104 at a read voltage of 0.5 V and an expected retention ability of ten years were demonstrated in this device. The resistance states in this device are non-volatile and can be adjusted by different applied voltages or compliance current, which show promising for multilevel memories. This RS behavior can be ascribed to the change of the interfacial barrier between SrTiO3 and NiO, which is induced by carrier injection-trapped/detrapped process due to oxygen vacancies or other defects.
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Acknowledgements This work was supported by the National Natural Science Foundation of China (Grant Nos. 11074193 and 51132001).
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Microelectronic Engineering journal homepage: www.elsevier.com/locate/mee
Fabrication and mechanism of high performance bipolar resistive switching device based on SrTiO3/NiO stacked heterostructure Yongdan Zhu a,b, Meiya Li a,⇑, Zhongqiang Hu a, Hai Zhou a, Xiaolian Liu a, Xiaoli Fang a a b
School of Physics and Technology, and Key Laboratory of Artificial Micro/Nano Structures of the Ministry of Education, Wuhan University, Wuhan 430072, PR China School of Information Engineering, Hubei University for Nationalities, Enshi, 445000 Hubei, PR China
a r t i c l e
i n f o
Article history: Received 19 June 2012 Received in revised form 19 September 2012 Accepted 21 November 2012 Available online 8 December 2012 Keywords: Thin film SrTiO3/NiO stacked heterostructure Bipolar resistive switching Multilevel memories
a b s t r a c t This paper reports the bipolar resistive switching effect in a SrTiO3/NiO stacked heterostructure which was epitaxially deposited on an Nb doped SrTiO3 substrate by pulsed laser deposition. This heterostructure shows high resistive switching ratio of over 104 at the read voltage of 0.5 V and an expected retention ability of ten years, which is better than that of NiO-based device. Moreover, the resistive switching ratio can be adjusted by changing the maximum applied voltage or compliance current, which shows promising for multilevel nonvolatile memories application. Meanwhile, these results have been discussed by carrier injection-trapped/detrapped process. Ó 2012 Elsevier B.V. All rights reserved.
1. Introduction Metal oxide resistive switching memory is one of the most competitive candidates for future nonvolatile memory applications due to its simple structure, fast switching speed, great scalability and compatibility with current semiconductor technology [1,2]. The physics of resistive switching (RS) effect and the potential application for the future generation of non-volatile memory have attracted great research interests of scientists over the world. At present, studies of RS have been done for many oxide materials, including binary metal oxides such as NiO [3–5], TiO2 [6,7], ZnO [8,9] and GO [10], perovskite type oxides such as La0.7Ca0.3MnO3 [11], Pr0.7Ca0.3MnO3 [12], BiFeO3 [13] and SrTiO3 [14] etc. Among various RS materials available, simple binary oxide materials, such as NiO and TiO2 [3–7], are better candidates than ternary or quaternary oxides for microelectronics applications because of their simpler fabrication process and compatibility with standard semiconductor technology. Because forming process or high read voltage can result in inconvenience in most devices, to develop a high performance RS device with high RS ratio, low read and operating voltage and without forming process is an important task. To date, based on different device structures and results, many different models about RS including the conductive filaments, Schottky barrier, oxygen migration, trapping–detrapping process etc. have been proposed [15]. Recently, oxygen vacancies are believed to be one of the key issues for understanding the RS mechanisms such ⇑ Corresponding author. Tel.: +86 27 68752336; fax: +86 27 68752569. E-mail address: [email protected] (M. Li). 0167-9317/$ - see front matter Ó 2012 Elsevier B.V. All rights reserved. http://dx.doi.org/10.1016/j.mee.2012.11.023
as Schottky barrier, trapped–detrapped and the conductive filament. However, the understanding of physics and mechanism of RS are still an open question because of the complexity of RS due to the differences in materials, preparing methods and equipments involved, which may limit the practical application in ReRAM [1,2]. Most RS devices are based on a metal–insulator–metal (MIM) structure with a single oxide thin film, and their performances are not very good. However, recent reports indicated that multilayer-based RS device could obtain excellent performance such as high RS ratio, fast switching speed, great scalability and ultra-low power. Cheng et al. reported a stacked GeO/SrTiOx based high performance and low-power operated resistive memory [16]. Liu et al. reported an improved RS effect by inserting a thin YSZ film between Pr0.7Ca0.3MnO3 and W electrode, and improved RS properties in TiOx/La0.7Ca0.3MnO3 stacked structures [17,18]. In our previous study, we reported a RS effect in ZnO/HfO2 stacked films [19]. In this study, an epitaxial SrTiO3/NiO stacked heterostructurebased device was fabricated, in which NiO used as a p-type layer and SrTiO3 as a carrier trapping layer. Bipolar switching behavior with high performance was demonstrated in this structure. This kind of insulator/semiconductor-based device may open a new way to the research and development of RRAM, and what is more, to the exploration of the mechanism of RS. 2. Experiments The samples were fabricated by pulsed laser deposition (PLD) using a KrF excimer laser (k = 248 nm). 100 nm-thick NiO and 10 nm-thick SrTiO3 thin films were grown in sequence on a Nb
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(0.7% wt) doped SrTiO3 (1 0 0) (NSTO) single crystal substrate. The substrate temperature was kept at 650 °C and the laser energy was kept at 300 mJ during the whole deposition process. The oxygen pressure was kept at 13 Pa for the deposition of SrTiO3 and 20 Pa for that of NiO, respectively. After the deposition, the films were cooled to room temperature at a cooling rate of about 2.7 °C/min. Before the electrical measurements, Ag electrodes were deposited on the SrTiO3 film using DC magnetron sputtering through a shadow mask with a diameter of 0.2 mm and the bottom electrode In was pressed on the NSTO to form ohmic contacts, forming a Ag/SrTiO3/NiO/NSTO/In device. The current–voltage (I– V) characteristics of the devices were measured with two-probe configuration by Keithley-4200SCS. The current from top electrodes to NSTO was defined as a positive direction. RS effect was investigated by applying different voltages at room temperature. The crystalline structure of the films was characterized by X-ray diffraction (D8 Advance, Bruker, Germany) with Cu Ka radiation and the chemical state of the constituent elements of the films was investigated by X-ray Photoelectron Spectroscopy (XPS, VG Multilab 2000).
3. Results and discussion As we known the SrTiO3 film can be epitaxially grown on NSTO substrate at high temperature, we concern more about the growth orientation of NiO film on NSTO [14]. Fig. 1(a) shows the XRD patterns of NiO film deposited on NSTO. As can be seen from the h–2h pattern in Fig. 1(a), the NiO film exhibits only (2 0 0) peak without any other diffraction peaks, suggesting (2 0 0) orientation growth of the film. XRD U-scan has been carried out to identify the epitaxial growth of the (2 0 0) oriented NiO film on NSTO. Fig. 1(b) shows the U-scan patterns of the NiO film along (1 1 1) planes with four peaks located at every 90° in the pattern, indicating the epitaxial growth of NiO on NSTO (1 0 0) substrate. To analyze the chemical states of the constituent elements, XPS measurement was performed. Fig. 1(c) shows the typical Ni2p XPS spectrum of the NiO film. The binding energy of Ni 2p3/2 is located at about 854.3 eV in
the spectrum, consistent well with that expected by theory for Ni2+ (854.3 eV) within a certain range of error, indicating Ni2+ ions are dominant in this sample. Fig. 1(d) presents the O1s XPS spectrum of the NiO film and the large peak is well fitted by two nearly Gaussian components, centered at 529.7 eV (Oa) and 531.75 eV (Ob), respectively. The Oa peak at a low binding energy is attributed to the Ni–O bonds [20]. While the Ob peak at higher binding energy is usually attributed to the chemisorbed or dissociated oxygen or OH species on the surface of the NiO film, such as –CO3, adsorbed H2O or O2. Therefore, the large and high Oa peak suggests that the Ni–O bonds are the main chemical state in the NiO film. The RS behavior of the SrTiO3/NiO stack-based Ag/SrTiO3/NiO/ NSTO/In device was investigated in detail. An inset graph in Fig. 2(a) shows the device structure. The RS characteristic of the device was investigated by applying swept voltage in sequence as 0 V ? +5 V ? 0 V ? 5 V ? 0 V, where positive direction was defined as the current flowing from the Ag electrodes to NSTO. As shown in Fig. 2(a), the device exhibits typical stable bipolar RS behavior without forming process. When the voltage was swept from 0 V to +5 V, the resistance of the device changed from high resistance state (HRS) to low resistance state (LRS) at a specific voltage and ‘‘on’’ state was achieved, i.e., set process. But LRS cannot come back to HRS as the positive voltage swept backward. When the voltage was swept from 0 V to 5 V, the current increased to a maximum value at around 1.2 V, and then decreased gradually to a low value. Therefore, the resistance state became HRS again and ‘‘off’’ state was achieved, i.e., reset process. Thus 5 V is a sufficient reset voltage for bipolar RS of the device. Similar bipolar RS behaviors were also reported by other groups [13,14]. The RS effect can be seen at both the positive and negative voltage regions. However, the I–V curves are asymmetric and the RS effect in the negative region is more pronounced than that in the positive region. We define the RS ratio at a specific read voltage as RHRS/RLRS. The curve of RHRS/RLRS varying with different read voltages under the sweeping voltage of [ 5 V, 5 V] is shown in Fig. 2(b). High RHRS/RLRS ratio of several thousand could be reached in the device at low voltage region. We noticed that the voltage
Fig. 1. The XRD patterns for NiO/ NSTO in h–2h scan (a), and the U-scans of NiO (1 1 1) and NSTO (1 1 1) planes (b). Typical XPS spectra of the NiO film for Ni 2p (c), and O1s (d).
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Fig. 2. (a) Typical I–V characteristics of the Ag/SrTiO3/NiO/NSTO/In device. The inserted graph is its schematic structure. (b) Dependence of RS ratio on read voltage derived from the I–V loop in a voltage range [ 5 V, 5 V]. (c) The time retention characteristics of HRS and LRS read at 05 V.
range in which the RS ratio reached considerable large value was just from 0 V to 0.2 V in positive region, while the correlated negative region was from 0 V to 1 V which showed higher read reliability. Therefore, we concerned more about the RS effect in the negative region and chose 0.5 V as a suitable read voltage. At the read voltage of 0.5 V, the RS ratio is about 4 104, indicating the potential for resistance memory application. Compared with the RS ratio of 102 in the SrTiO3/NSTO structure device reported by Ni et al. [14], our SrTiO3/NiO double layer based device shows improved RS behavior. As a RS device for non-volatile memory, the time retention characteristic is an important parameter to reflect the performance of the device. Generally speaking, the retention characteristic of heterostructure-type RS device is not very stable. Ni et al. [14] reported the SrTiO3/NSTO bipolar RS and its time retention characteristic was of long time relaxation properties given by the CurieVon Schweidler law [21]. In this work, for our SrTiO3/NiO
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stacked-based device, after 100 cycles’ sweeping, the RHRS and RLRS read at 0.5 V showed good time retention characteristic, as shown in Fig. 2(c). Moreover, ten years of retention ability under room temperature can be expected in this device by extrapolation according to the Curie–Von Schweidler law, which shows great potential in nonvolatile memory application [22]. As discussed above, the forward voltage can set the resistance state to LRS and the reverse voltage can reset it to HRS. In order to investigate the influence of the maximum reverse voltage on the HRS, we applied different maximum reverse voltage such as 1 V, 2 V, 3 V, 4 V and 5 V, while the maximum forward voltage was kept at 5 V. It should also be noticed that the resistance state was drove to LRS by 5 V set voltage before each new cycle starting, so that the LRS was the same for each cycles. The voltage was swept in sequence as 0 V ? 5 V ? 0 V ? Vmax ? 0 V with a compliance current of 0.01A. The I–V curves under different reset voltage are shown in Fig. 3(a). It is very interesting that the I–V curve with the small reset voltages exhibit weak hysteresis. But as the reset bias increases to above 2 V, the hysteresis becomes more and more prominent. The dependence of RHRS and RLRS read at 0.5 V on the maximum reset voltage is shown in Fig. 3(b). As can be seen in the figure that the RHRS can be adjusted by different reset voltages and the larger reset voltage leads to larger RS ratio. The resistance of HRS was increased from 890 X to 9.6 106 X as the reset voltage increased from 1 V to 5 V. In addition, we have also investigated the I–V curves of the device after applying different forward voltage while keeping the reset voltage at 5 V (not shown here). It seems that, with the increase of the forward voltage, the I–V hysteresis of the device became more pronounced. Moreover, the RS characteristics versus the compliance current were investigated. As shown in Fig. 3(c), with the decrease of the compliance current, the currents gradually reduced and the switching ratio also changed correspondingly. Similar results were also observed in other studies [23]. These results suggest a feasible way to control the switching characteristics of the device and may have potential application in multilevel memories. In Ni’s report [14], the pulse voltage could switch the resistance to different resistance states. The RS ratio of their device is only 102 which could be distinguished into at maximum only three effective memory states. However, the high RS ratio in our device is about 104 which could be distinguished into at maximum four memories states. Moreover, the multilevel resistance states in our device can be controlled by voltages or compliance current. In addition, good time retention characteristic is demonstrated in our device. Therefore, our SrTiO3/NiO based device shows promising potential in multilevel memory application. We now turn to the origin of the above discussed RS behaviors. The excellent performance of SrTiO3/NiO stack-based RS device should be closely associated with the structure and the mechanism. Firstly, the conduction mechanisms in the positive and negative voltage regions during one typical RS process have been investigated. Fig. 4 shows the double logarithmic plots for the I– V curve of Ag/SrTiO3/NiO/NSTO/In under the sweeping voltage of ±5 V in the positive (Fig. 4(a)) and negative (Fig. 4(b)) voltage regions. When the device in HRS was applied positive voltage, the I–V curve showed a linear behavior for V < 0.2 V, then a sharp current increased with a slope of 6 for V > 0.8 V (positive threshold voltage (VPT)) and followed by a slope of 2. This behavior can be well described by the trap controlled space charge limited current (SCLC) mechanism [14,24]. VPT is the transition voltage from the trap-unfilled to trap-filled space charge limited region. Upon decreasing the voltage, the current remains at the higher value indicating that the trapped carriers are not released from the trap centers, which result in the hysteresis of I–V curves. Fig. 4(b) shows the resistance state from LRS to HRS under negative bias. We can see that at the low voltage region (|V| < negative threshold voltage
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Fig. 3. (a) The I–V curves of the SrTiO3/NiO stacked based device at different max reverse voltages with max positive voltage +5 V; (b) the max reverse voltage amplitude dependence of HRS and LRS of the device read at 0.5 V; (c) RS characteristics of the device under various compliance currents; (d) the I–V curves of the device with three kinds of structures: NiO, STO/NiO and STO/NiO/STO.
Fig. 4. I–V curves of the Ag/SrTiO3/NiO/NSTO/In device in double logarithmic plot for positive voltage region (a), and negative voltage region (b).
|VNT| = | 1.1 V|), I–V curve exhibits linear behavior, corresponding to the ohmic conduction mechanism. Then, a negative differential resistance can be observed when the sweeping voltage was higher than the VNT (|V| > |VNT|). As the voltage sweeps back from 5 V to 0.4 V, the slope is 4 followed by a slope of 1, characterized as the
SCLC controlled exponentially distributed traps. As the applied voltage closes to 0 V, the transport is of ohmic feature owing to the free carriers in the film. Therefore, the SCLC is a key transport mechanism at the Ag/SrTiO3/NiO/NSTO/In interfaces and the films, which induces the I–V hysteresis. For the Ag/SrTiO3/NiO/NSTO/In device structure, the RS behavior may come from following parts: Ag/SrTiO3, SrTiO3/NiO, NiO/ NSTO, and NSTO/In interface, SrTiO3 and NiO films, and the NSTO substrate. The contacts of In/NSTO as well as Ag/SrTiO3 are ohmic and we know the ohmic contact has no contribution to RS. The asprepared SrTiO3 film usually contains oxygen vacancies, which act as defects; while the NiO film is a p-type semiconductor which contains Ni vacancies and other defects. Therefore when a SrTiO3 film was deposited on a NiO film, a junction with large barrier can be formed at the interface. On the other hand, when a p-type NiO film is epitaxial grown on an n-type NSTO substrate, a p–n junction can be formed. Thus, to distinguish the role of different parts of the device, we have also prepared a Ag/NiO/NSTO/In device which shows weak RS effect as shown in Fig. 3(d). The PN junction of NiO/NSTO in this device only acts as a diode-like device with weak RS effect. Actually, the diode-like behavior of the NiO/NSTO junction plays an important role for this asymmetric I–V hysteresis. Therefore, we deduce preliminarily that the RS effect of the device can be mainly attributed to the SrTiO3/NiO interface state. As discussed before, SrTiO3 is an insulator and may usually contain oxygen vacancies which would act as carrier trapping centers. Therefore the RS behavior of SrTiO3/NiO may be due to the carrier injection-trapped/detrapped process at the interface between NiO and SrTiO3 by applied electric field. Since the carrier concentration of NiO is larger than that of SrTiO3, the built-in potential of the junction should be mainly applied to SrTiO3. As a result, the depletion layer of SrTiO3/NiO junction is mainly located in SrTiO3. The property of the junction is determined by the depletion layer. When the forward voltage applied on the device, the PN junction of NiO/NSTO was at ‘‘on’’ state, so the electronic carrier would across the interface of NiO/NSTO and inject into the SrTiO3/NiO interface and be trapped by oxygen vacancies and other defects. Consequently, the depletion layer of SrTiO3/NiO is narrowed, and
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the junction becomes conductive (LRS). These trapped electrons cannot be released until the reverse voltage is applied on the device. In this case, accordingly, the width of the depletion layer is increased and the barrier height is raised, resulting in the resistance state from LRS to HRS. More importantly, the number of trapped (detrapped) electrons can be controlled by the magnitude of forward (reverse) voltage, which would lead to forming controllable resistance state that has potential application in multilevel memories [25]. We must also note that these resistance states are nonvolatile, as shown in Fig. 2(c), which can be attributed to the proper trapping center in the SrTiO3/NiO and the PN junction barrier existed in between NiO and NSTO. Therefore, the trapped electrons cannot be released because of the double-barriers, indicating stable resistance states. Moreover, we have also prepared another Ag/SrTiO3/NiO/ SrTiO3/NSTO/In device by inserting an extra 10 nm-thickness SrTiO3 layer at the NiO/NSTO interface of the original Ag/SrTiO3/ NiO/NSTO/In device, as shown in Fig. 3(d). The RS effect of this device can be compared with the original device in capable of multilevel memories and long retention time, with only the work current decreased by one order of magnitude and the set voltage increased. This is understandable because when a 10 nm-thickness SrTiO3 layer was inserted at the NiO/NSTO interface, a trapping layer was formed at the interface and the barrier between NiO and NSTO would be increased, thus the RS effect was enhanced. But when double-trapping layers were formed, the carrier trapping/detrapping would become difficult, so the required set and reset voltage was increased. 4. Conclusions In summary, a SrTiO3/NiO stacked film was grown on a NSTO substrate to form a Ag/SrTiO3/NiO/NSTO/In heterostructure device. High performance bipolar RS behavior with a high RS ratio of over 104 at a read voltage of 0.5 V and an expected retention ability of ten years were demonstrated in this device. The resistance states in this device are non-volatile and can be adjusted by different applied voltages or compliance current, which show promising for multilevel memories. This RS behavior can be ascribed to the change of the interfacial barrier between SrTiO3 and NiO, which is induced by carrier injection-trapped/detrapped process due to oxygen vacancies or other defects.
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Acknowledgements This work was supported by the National Natural Science Foundation of China (Grant Nos. 11074193 and 51132001).
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