Non-quasi-static approach with surface-potential-based MOSFET model HiSIM for RF circuit simulations

Non-quasi-static approach with surface-potential-based MOSFET model HiSIM for RF circuit simulations

Available online at www.sciencedirect.com Mathematics and Computers in Simulation 79 (2008) 1096–1106 Non-quasi-static approach with surface-potenti...

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Available online at www.sciencedirect.com

Mathematics and Computers in Simulation 79 (2008) 1096–1106

Non-quasi-static approach with surface-potential-based MOSFET model HiSIM for RF circuit simulations T. Ezaki a,∗ , D. Navarro a , Y. Takeda a , N. Sadachika a , G. Suzuki a , M. Miura-Mattausch a , H.J. Mattausch a , T. Ohguro b , T. Iizuka b , M. Taguchi b , S. Kumashiro b , S. Miyamoto b a

Graduate School of Advanced Sciences of Matter, Hiroshima University, 1-3-1 Kagamiyama, Higashi, Hiroshima 739-8530, Japan b Semiconductor Technology Academic Research Center, Kanagawa 222-0033, Japan Received 12 October 2007; received in revised form 15 October 2007; accepted 15 October 2007 Available online 18 December 2007

Abstract We develop a non-quasi-static MOSFET compact model suitable for simulating RF circuits operating under GHz frequency. The model takes into account the carrier dynamics by incorporating the time delay for the carriers to form a channel. Both the timedomain and frequency-domain expressions are successfully derived from the same basic equation by using the proposed modeling methodology, and the consistency of the both representations are verified. The model accuracy in predicting transient currents is demonstrated by comparing with simulation results of a 2D device simulator. The developed NQS model is implemented into SPICE3f5 and achieves stable circuit simulations with only 3% simulation time increase. © 2007 IMACS. Published by Elsevier B.V. All rights reserved. Keywords: Non-quasi-static effect; Time domain; Frequency domain; Surface-potential; MOSFET compact model

1. Introduction The recent progress in nano-fabrication technologies provides MOSFETs with sub-100 nm gate length as commercial products. In research studies even sub-10 nm size MOSFETs were successfully fabricated, and transistor operations in such ultra-small devices were demonstrated by several groups [3,15]. The faster switching speed of the smaller devices makes the MOSFET technology suitable for RF circuit applications. The accuracy of models in predicting phenomena arising from very fast switching inevitably becomes a primary issue [14]. Conventional MOSFET models for circuit simulations, employed to predict device characteristics, are based on the quasi-static (QS) approximation, where carriers can respond to voltage changes without any delay, and the steady state distributions of carriers and potential are instantaneously achieved. Fig. 1 shows the drain current calculated by a QS approach implemented in the surface-potential-based compact model Hiroshima-University STARC IGFET Model (HiSIM) [1,7], or HiSIM-QS for short, in comparison with 2D device simulator results. The result obtained from the QS model shows the physically inappropriate dip and jump. Fig. 2 also shows unphysical voltage overshoot peaks when transistors in an inverter circuit are operated at very fast switching. This is a clear evidence showing that the basic ∗

Corresponding author. Tel.: +81 82 424 7639. E-mail address: [email protected] (T. Ezaki).

0378-4754/$32.00 © 2007 IMACS. Published by Elsevier B.V. All rights reserved. doi:10.1016/j.matcom.2007.10.008

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Fig. 1. Erroneous calculation of drain current at fast switching by a quasi-static-based model HiSIM-QS (broken line) as compared with a 2D device simulator (solid line). Dotted line shows the voltage signal shape applied to a MOSFET gate.

assumption of QS at RF switching fails. Therefore the delay for carriers to respond to the voltage change in time, what we call non-quasi-static (NQS) effects, should be taken into account in order to model device characteristics under high speed operations. Several approaches have been proposed to model the NQS effect. One is by dividing the channel into N segments, each segment representing a sub-transistor [13]. This prohibits physical analysis since it is not clear whether the N sub-transistors preserve the same characteristics of the original transistor in addition to enhanced simulation cost. Another approach is by introducing resistive elements into the equivalent circuit solved by the simulator [2]. However, the real NQS effect is hardly predictable by simple resistances. Another approach to represent the carrier delay is by an RC subcircuit which requires additional nodes [4]. We aim to develop a new NQS model which incorporates delay mechanisms for the formation of carriers in the channel without sacrificing simulation time as well as the physical origin of the NQS effect, which is the carrier response delay.

Fig. 2. Voltage overshoot peaks calculated by HiSIM-QS at high frequency switching of a simple inverter circuit. A mixed-mode simulation was performed by using the 2D device simulator.

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2. Modeling of non-quasi-static effects Before discussing a non-quasi-static modeling, we will briefly introduce the transient current expression used in SPICE-like circuit simulators. According to the integral representation of the Maxwell equations, the time varying current I(t) flowing out of a terminal and the charge associated with a terminal q(t) satisfy the following relation: ∂q(t) , (1) ∂t where the change of magnetic fields in time is assumed to be negligible. In practical devices, currents can be divided into the transport and charging components. In circuit simulators, the terminal currents are expressed by the sum of a carrier transport component IT and the charging current expressed as dq(t)/dt [12]. The expression of terminal currents i(t) in the transient analysis mode of circuit simulators is then given by I(t) =

dq(t) , (2) dt where IT is the current as a function of the instantaneous terminal voltages, and is approximated by the steady-state solution. In order to predict transient currents with a high degree of accuracy, the core task is how we describe the charge term q(t) associated with the device terminal as in Eq. (2), which will be discussed in the following sections. i(t) = IT (t) +

2.1. Non-quasi-static formulation If a step-like voltage change in time is applied to MOSFETs, carriers follow the voltage change with a delay, and finally form a steady state distribution. In principle, such a response of charge q(t) is described by the following differential equation: dq(t) = Q − q(t), (3) dt where Q is the charge in the steady state. τ indicates the carrier-transit delay which is effective time for carriers to cross the channel as depicted in Fig. 3. For a continuously varying applied voltage, the charge Q in Eq. (3) is approximately replaced by Q(t) = Q(V (t)) where V (t) is the instantaneous voltage at time t. For the limit of τ → 0 where carriers τ

Fig. 3. Difference between non-quasi-static and quasi-static carrier concentration as simulated in the 2D device simulator. The quasi-static calculation assumes steady state distribution at every moment.

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instantaneously follow the voltage change, the charge q(t) is identical to the steady state value Q(t), because dq(t) = 0 for τ → 0. (4) dt This is just a formula for the quasi-static approximation, which means that the quasi-static approach is also included in Eq. (3) as a special case of the equation. Approximating the differentiation in Eq. (3) by the difference of the charge, we obtain [10]: Q(t) − q(t) = τ

τ(q(ti ) − q(ti−1 )) = (ti − ti−1 )(Q(ti ) − q(ti )), ⇒ q(ti ) =

1 ti (q(ti−1 ) + , Q(ti )), 1 + ti /τ τ

(5) (6)

where q(ti ) and Q(ti ) represent the charge under the transient condition and the steady state charge at time ti , respectively [10,5,11]. In other words, q(ti ) and Q(ti ) can be referred to as the NQS and QS charges, respectively. ti−1 indicates the time at the previous time step, and ti ≡ ti − ti−1 is the time interval between the current and previous steps. The equation implies that the formation of carriers is always delayed by τ with respect to the QS case. Eq. (6) is the NQS charge formula suitable for time-domain transient analysis. Fig. 4 shows the flowchart of the NQS for time-domain calculations. The NQS approach shown above, developed for time-domain analysis, can be easily applied for frequency-domain analysis just by taking a Fourier transformation of Eq. (3): ˆ iτωˆq(ω) = Q(ω) − qˆ (ω)  ∞ 1 ˆ Q(t) = Q(ω) eiωt dω, 2π −∞

(7) (8)

ˆ where Q(ω) and qˆ (ω) are the Fourier transforms of the NQS charge and the QS charge, respectively. The NQS charge is then expressed as [6]:   τω 1 ˆ Q(ω). (9) − i qˆ (ω) = 1 + (τω)2 1 + (τω)2 The modeling approach developed here concentrates on the derivation of a description for the charge q(t) associated with a terminal under the approximation that the delay of the potential response is negligible in comparison with the carrier response. Therefore our methodology enables us to perform transient analysis without solving the Poisson equation numerically along the MOSFET channel.

Fig. 4. Flowchart of the developed non-quasi-static approach for time-domain analysis. In this chart, qi = q(ti ) and Qi = Q(ti ). The NQS charge q0 for the initial time step i = 1 is given by the QS charge Q1 in the initialization stage.

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2.2. Carrier-transit delay The key when modeling the NQS effects [8,9] is how we model the carrier-transit delay τ, which is composed of two possible delay mechanisms: τ1 arising from the carrier-supply mechanism at the source side, and τ2 caused by the transit-carrier delay in the channel. Since these two delay mechanisms are assumed to be independent, the total transit delay τ can be given by employing the Matthiessen rule: 1 1 1 + . = τ τ1 τ2

(10)

In the present approach, we simplify the developed model by taking into account τ2 only. All the carriers in the channel are considered to experience delay caused by diffusion and conduction of carriers, because the current, in general, consists of the diffusive and conductive components. Diffusion delay τdiff denotes the time delay due to carrier concentration gradients in space, and conduction delay τcond accounts of the time for the carriers to flow due to the applied bias. The carrier deficit in the channel before the channel formation is modeled by the slow diffusive transit delay mechanism. At weak inversion, the transit time delay of carriers is governed by diffusion: τdiff =

qL2 , μkT

(11)

where L is the channel length, μ is the carrier mobility, k is the Boltzmann constant, T is the temperature and q is the elementary charge. At strong inversion, there is already conduction of carriers. The transit delay due to this carrier flow is calculated directly from the inversion charge Qi and the drain current Ids provided by HiSIM-QS: τcond =

|Qi | . Ids

(12)

These delay mechanisms are again combined as 1 1 1 + = . τ τdiff τcond

(13)

The total delay and the two delay components under saturation condition with an input signal of 20 ps rise time are shown in Fig. 5. The NQS model is implemented into the surface-potential-based model HiSIM on the SPICE3f5 platform, and especially achieves stable circuit simulations with only 3% simulation time increase. 2.3. Charge partitioning In the previous sections, we have concentrated on the formulation of the NQS charge assigned to a terminal. When we apply the model to a specific device such as the MOSFET, we have to also consider the charge partitioning between the source and drain terminals of the MOSFET, because the charge in the inversion layer is shared by the source and drain terminal as shown in Fig. 6. The inversion charge qi is divided into the source and drain charges with the partitioning ratio Xd : qS = (1 − Xd ) · qi ,

(14)

qD = Xd · qi ,

(15)

where qS and qD are the charges associated with the source and drain nodes, respectively. Xd is equal to 0.5 under equilibrium, and reduces to 0.4 at saturation within the quasi-static-approximation. 3. Model verification and discussion Figs. 7 and 8 compare the calculated drain currents by the NQS and QS models. The artifacts associated with conventional QS modeling, which become prominent for faster switching as depicted by the circles, are successfully eliminated as can be seen for a 20 ps-switching in Fig. 8. Circuit simulation tests with standard circuits were performed

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Fig. 5. Time-delay mechanisms calculated for a 20 ps switching time at high drain bias.

to check the simulation runtime of the NQS model in comparison with the QS model. Only 3% increase in simulation runtime is achieved in comparison to the QS approach without sacrificing accuracy of calculation. In calculating the above currents, the calculated non-quasi-static charge density is partitioned into source and drain charges following the HiSIM-QS source-drain partitioning. However, this partitioning fails at fast switching as can be deduced from Fig. 9. The difference between the quasi-static current and the transient source/drain currents shows that the source charging current is greater than the drain charging current. This is because at saturation, electrons come from the source and have reached the drain before current flowes. Therefore, it is expected that charge partitioning becomes dynamic, being a function of the input voltage. One approximation is that the partitioning ratio starts from 100/0 and then relaxes to be constant value when the input settles to a constant and equilibrium is achieved. To include the change in the partitioning ratio in the NQS model, an empirical equation is applied during a time-varying input

Fig. 6. Inversion carrier density distributions along the channel direction at t = 5 and 10 ps simulated by the 2D device simulator. The inset shows an input signal shape with 20 ps rise time applied to the gate electrode. The lower illustration shows the associated charges in the source and the drain, and also the charging current flows.

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Fig. 7. Transient drain current for 80 ps (a) rising and (b) falling input. Solid and broken lines show the results of HiSIM-NQS and HiSIM-QS, respectively. Dotted lines depict the voltage signal shape applied to the MOSFET gate.

which relaxes to a constant value when the input voltage does not change. This assures that carriers start from the source, and current flows once they reach the drain. Good agreement with 2D device simulation results are verified in Fig. 10. This validates the accuracy of the NQS model developed. Frequency-domain simulation of MOSFET drain currents was also carried out by using both NQS and QS approximations, in order to estimate the importance of NQS effects along the frequency dimension (Fig. 11). The gate length of the MOSFET considered in this simulation is 2 ␮m, and the cutoff frequency fT at Vg = 1 V and Vd = 0.1 V is about 2.5 GHz. Under the QS approximation, where the carrier’s dynamic behavior is completely ignored, the real part of the current stays constant and the imaginary part increases linearly with respect to frequency. The current obtained from the NQS approximation shows large deviation from the QS results, especially beyond fT /3 in the real part. Therefore, the NQS approach is essential for correctly simulating the circuit performance under fast switching. The proposed NQS model is applicable for both the time-domain and frequency-domain analysis. Since the timedomain and frequency-domain representations shown in Eqs. (6) and (9), respectively, are derived from the same expression in Eq. (3), the same results should be obtained from the both approaches. The consistency check of the

Fig. 8. Transient drain current for 20 ps (a) rising and (b) falling input. Solid and broken lines show the results of HiSIM-NQS and HiSIM-QS, respectively. Dotted lines depict the voltage signal shape applied to the MOSFET gate.

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Fig. 9. Difference between the quasi-static current and the transient drain/source current calculated by a 2D device simulator. The amount of drain/source charging currents differs from the 60/40 partitioning ratio normally applied in modeling.

developed NQS model was carried out by comparing drain currents as a function of the small input signal frequency. Fig. 12 shows the simulation results by HiSIM-NQS-FD and HiSIM-NQS-TD. The sinusoidal voltage signals with amplitudes of 0.1 and 0.05 V were applied to the MOSFET gate. The DC component of gate voltage was 1 V. The difference is negligible up to at least the cutoff frequency fT even for an increased amplitude of the input signal, which assures the consistency of both the time-domain and frequency-domain analysis. Y-Parameters are key physical quantities to describe device characteristics under high-frequency operation. The set of Y-parameters is also referred to as admittance matrix. Y-parameters can be determined from the incremental current induced by a small incremental voltage. For a sinusoidal incremental voltage: V (t) = Vy,DC + v˜ y exp(iωt),

(16)

where VDC and v˜ are DC component and amplitude, respectively, the incremental current is expressed as Ix (t) = Ix,DC + ˜ıx exp(iωt),

(17)

Fig. 10. Transient drain current calculated by the NQS model in comparison with 2D device simulator results. In this calculation, the partitioning ratio is a function of the gate voltage.

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Fig. 11. Real and imaginary parts of the drain current as a function of frequency as calculated by NQS (solid lines) and QS (broken lines) approaches. fT ≈ 2.5 GHz is the cutoff frequency.

where IDC and ˜ı are DC component and amplitude of the current. Subscripts x and y denote device terminals. The Y-parameters, or the matrix elements of the admittance matrix, are defined as  ˜ıx  Yxy = . (18) v˜ y v˜  =0, y =/ y y

Fig. 13 compares the Y-parameter results of the model and measurements. Without any additional fitting parameters, the Y-parameter characteristics are well reproduced up to the cutoff frequency. Correct calculation of Y-parameters

Fig. 12. Comparison of drain currents as a function of input signal frequency as calculated by HiSIM-NQS-FD (solid lines) and HiSIM-NQS-TD (broken lines). The vertical line indicates the cutoff frequency fT ≈ 2.5 GHz.

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Fig. 13. Comparison of Y-parameters calculated by HiSIM-NQS-FD with measurements. HiSIM-QS results are also shown for comparison.

guarantees the applicability of the model for actual circuit simulation at very fast switching. Practically no additional calculation time caused by the developed NQS model in frequency domain is observed. 4. Conclusion A non-quasi-static (NQS) model for both the time-domain (TD) and frequency-domain (FD) analysis is developed based on the delay for carriers to form the channel. The conventional quasi-static (QS) approach fails in predicting terminal current characteristics of MOSFETs at very fast switching. The developed model incorporates diffusion and conduction delay mechanisms to introduce delay in the MOSFET channel formation. The proposed model can therefore eliminate artifacts in MOSFET currents due to the QS approximation, and can well reproduce the results obtained from a 2D device simulator. Both the TD and FD calculations are verified to give consistent results, which enables circuit designers to use the model without being concerned about the simulation accuracy of TD and FD analysis. The model also successfully reproduces the measured y-parameters, which guarantees the applicability of the model for simulation of very large circuits. References [1] HiSIM 2.0.0 User’s Manual, 2002, http://www.starc.or.jp. [2] M. Chan, K.Y. Hui, C. Hu, P.K. Ko, A robust and physical BSIM3 non-quasi-static transient and ac small-signal model for circuit simulation, IEEE Trans. Electron Dev. 45 (4) (1998) 834–841. [3] B. Doris, M. Ieong, T. Kanarsky, Y. Zhang, R.A. Roy, O. Dokumaci, Z. Ren, F.F. Jamin, L. Shi, W. Natzle, H.J. Huang, J. Mezzapelle, A. Mocuta, S. Womack, M. Gribelyuk, E.C. Jones, R.J. Miller, H.-S.P. Wong, W. Haensch, Extreme scaling with ultra-thin Si channel MOSFETs, IEDM Techn. Dig. (2002) 267–270. [4] W.C. Elmore, The transient response of damped linear networks with particular regard to wideband amplifiers, J. Appl. Phys. 19 (1948) 55–63. [5] T. Ezaki, D. Navarro, Y. Takeda, N. Sadachika, G. Suzuki, M. Miura-Mattausch, T. Ohguro, T. Iizuka, M. Taguchi, S. Kumashiro, S. Miyamoto, Non-quasi-static analysis with hisim, a complete surface-potential-based MOSFET model, in: MIXDES 2005, Krakow, 2005, pp. 923–928. [6] K. Machida, D. Navarro, M. Miyake, R. Inagaki, N. Sadachika, G. Suzuki, Y. Takeda, T. Ezaki, H.J. Mattausch, M. Miura-Mattausch, Efficient NQS MOSFET model for both time-domain and frequency-domain analysis, in: Proceedings of the SiRF, 2006, pp. 73–76. [7] M. Miura-Mattausch, U. Feldmann, A. Rahm, M. Bollu, D. Savignac, Unified complete MOSFET model for analysis of digital and analog circuits, IEEE Trans. CAD/ICAS 15 (1996) 1–7. [8] N. Nakayama, D. Navarro, M. Tanaka, H. Ueno, M. Miura-Mattausch, H.J. Mattausch, T. Ohguro, S. Kumashiro, M. Taguchi, T. Kage, S. Miyamoto, Non-quasi-static model for MOSFET based on carrier-transit delay, Electron. Lett. 40 (4) (2004) 276–277.

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