p-Si interfaces

p-Si interfaces

Thin Solid Films 396 (2001) 119–125 Annealing behavior of electrical properties in plasma-exposed Tiy p-Si interfaces T. Yamaguchi, H. Kato, N. Fujim...

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Thin Solid Films 396 (2001) 119–125

Annealing behavior of electrical properties in plasma-exposed Tiy p-Si interfaces T. Yamaguchi, H. Kato, N. Fujimura, T. Ito* College of Engineering, Osaka Prefecture University, 1-1 Gakuen-cho, Sakai, Osaka 599-8531, Japan Received 23 June 2000; received in revised form 25 May 2001; accepted 22 June 2001

Abstract The electrical properties of Tiyp-Si interfaces damaged by CHF3 yO2 plasma treatments were investigated as a function of annealing temperature. The Schottky barrier height of plasma-exposed interface increased with increasing rf power density during plasma treatment. It was found that the current transport mechanism of plasma-exposed interface changes as the annealing temperature increases. The current transport mechanism in the sample with plasma treatment is due to thermionic emission in cooperation with recombination in the depletion region in the sample annealed at 4008C. The possible mechanism in the sample annealed at 5008C is multistep tunneling. Meanwhile, thermionic-emission current dominates in the as-deposited state. By contrast, the dominant current was due to thermionic emission and did not change against the annealing temperature in the samples with clean interfaces. As a result, the change in the current transport mechanism could be due to plasma-induced defects and to the formation of Ti5Si3 at the TiySi interface. 䊚 2001 Elsevier Science B.V. All rights reserved. Keywords: Tiyp-Si interface; Schottky barrier height; Reactive ion etching; Plasma-induced damage

1. Introduction Reactive ion etching (RIE), a kind of plasma etching, is one of the most important processing technologies in the fabrication of ultra-large-scale integrated (ULSI) circuits for transferring the circuit patterns into layers of materials precisely. RIE combines physical sputtering with chemically reactive species so that etching is both directional and materials selective. Unfortunately, RIE can also modify the chemical composition and structure of Si surfaces and thereby affects the electrical properties of devices. Several studies on electrical properties of metal–semiconductor interfaces have been reported w1– 5x. Ti y Si interfaces are widely used as contact and interconnect applications in ULSI devices. Ti easily reacts with Si and forms disilicide at relatively low * Corresponding author. Tel.: q81-722-54-9327; fax: q81-72254-9327. E-mail address: [email protected] (T. Ito).

annealing temperatures. TiSi2 has two phases: highresistance metastable C49 TiSi2 and low-resistance C54 TiSi2. On heating Ti deposited on Si, the first disilicide phase to form is C49 phase. Additional heating is needed to form the C54 phase w6x. The actual Ti y Si interfaces used in the devices involve plasma-induced damage. The interfacial reactions and Schottky barrier height (SBH) of Ti y Si system have been changed under the influence of plasma-induced damage w7x. Therefore, it is of much interest to investigate the dependence of the electrical properties of the Ti y Si interfaces involving the plasma-induced damage on the annealing temperature. This article reports the change in the SBH of the plasma-exposed Ti y p-Si interfaces by the annealing. The electrical characterization was carried out using current–voltage (J–V), capacitance–voltage (C–V) and activation energy analysis. Structural characterization was done using reflected high-energy electron diffraction (RHEED).

0040-6090/01/$ - see front matter 䊚 2001 Elsevier Science B.V. All rights reserved. PII: S 0 0 4 0 - 6 0 9 0 Ž 0 1 . 0 1 2 4 5 - 7

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2. Experimental The substrates used in this study were p-type (100) Si wafers with a resistivity of 10–15 V cm. The plasma etching apparatus was a RIE reactor having a parallelplate electrode configuration. All the RIE treatments were done under the conditions with CHF3 y O2 chemistry at the pressure of 5 Pa. The power density ranged from 1.9 to 5.7 W y cm2. For comparison, the samples without RIE treatment were prepared as the control samples. The substrates were exposed to the plasma of CHF3 y O2 gas mixture followed by the chemical cleaning. Fluorocarbon films were deposited on the Si surface during RIE treatment when fluorocarbon based gases were used for RIE treatment w8x. To remove these films, an O2 downstream-plasma treatment and subsequent wet cleaning using a solution of H2SO4 and H2O2 were performed. Ti films of 40 nm in thickness were sputtered onto the substrates immediately after chemical etching with diluted HF solution. The samples were annealed at temperatures in the range of 400–6008C in a vacuum of ;10y7 torr for 60 min. To fabricate Schottky diodes, Pt was sputtered on Ti film through a shadow mask. The Pt film acts as a mask of following wet etching to define the diode area and top electrode. Ti films were wet-etched and patterned using diluted HF solution. The area of diodes was approximately 9 mm2. Pt was also sputtered on the backside of the substrates to obtain ohmic contact. The barrier height obtained from J–V measurement was deduced by assuming the thermionic emission model for forward-bias current at room temperature w9,10x. The forward bias current density for V)3kT y q follows the equation: (1)

JsJ0expŽqV y nkT.

Where q is the electronic charge, k the Boltzman constant, T the absolute temperature, n the ideality factor and J0 the saturation current. The saturation current can be expressed as: J0sA*T2expŽyqfB ykT.

(2) *

where fB is the Schottky barrier height and A is the Richardson constant (A * s30=104 A y m2 K2 for holes). The saturation current was obtained by extrapolating the linear region of the forward lnJ–V curve to zero bias. The barrier height was also determined from the activation energy analysis of ln(J0 y T 2) vs. 1 y T measured in a temperature range of 160–296 K. According to Eq. (2), the plot of ln(J0 y T 2) vs. 1 y T should yield a straight line with a slope given by the barrier height and the intercept given by the Richardson constant. The barrier height was also determined from the capacitance– voltage characteristics by extrapolating the linear portion of the 1 y C 2 vs. V data. Using standard Schottky barrier theory w9,10x, the voltage axis intercepts of this curve

Fig. 1. RHEED patterns of unetched (100) Si (a) in the as-deposited state, (b) annealed at 4008C, (c) annealed at 5008C and (d) annealed at 6008C. RHEED analysis was performed after Ti or silicide was removed.

may be used to yield the barrier height. The C–V measurements were made at 1 MHz at room temperature. 3. Results and discussion To investigate the structure at the Ti y Si interface, RHEED analysis was performed. Prior to RHEED observations, each sample was treated with dilute HF (DHF) and deionized water (DIW) to remove Ti or silicide film on Si. Fig. 1 shows the RHEED patterns from the samples without RIE treatment. The surface is atomically smooth in the as-deposited state since the RHEED pattern displays streak pattern with Kikuchi lines as shown in Fig. 1a. The surface structure is recognized as single crystal since patterns change with changes in the incidence of the electron beam and each pattern can be indexed as a single crystal pattern. At the annealing temperature of 4008C shown in Fig. 1b, RHEED pattern is almost the same as that in the as-deposited state, except for the presence of a ring pattern which is responsible for the poly-crystalline silicon. The formation of poly-crystalline silicon is possibly due to the progress of amorphization w11,12x as the precursor of solid-state reactions between Ti and Si. At the annealing temperature of 5008C (Fig. 1c), RHEED pattern displays the spots and streaks without Kikuchi lines. It seems that the roughness of the surface morphology caused by the formation of C49–TiSi2 produces this RHEED pattern. The pattern from the sample annealed at 6008C is identical with that at 5008C as shown in Fig. 1d. Fig. 2 shows the RHEED patterns from the samples with RIE treatment. The sample in the as-deposited state was completely damaged and consisted of an amorphous structure because the pattern indicated a halo as shown in Fig. 2a. Fig. 2b shows the RHEED pattern from the

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Fig. 2. RHEED patterns of plasma exposed (100) Si (a) in the asdeposited state, (b) annealed at 4008C, (c) annealed at 5008C and (d) annealed at 6008C. RHEED analysis was performed after Ti or silicide was removed.

sample annealed at 4008C. The pattern displays a streak, although the pattern does not involve Kikuchi lines. These results indicate that Ti atoms diffuse in the amorphous layer formed by RIE treatment and the amorphous layer containing Ti atoms is removed by DHF. The actual junction is expected to become the interface between TixSiy and single-crystal silicon. The pattern also indicates ring patterns, which are responsible for the poly-crystalline silicon. It has been confirmed that the Ti-rich silicide Ti5Si3 was formed in the plasmaexposed interface at annealing temperature of 4008C in the previous work w7x. At annealing temperature of 5008C, the pattern is almost same as that from the sample annealed at 4008C except for disappearance of a ring pattern. It has been also confirmed that the C49– TiSi2 was not formed yet at annealing temperature of 5008C when damage was induced at the interface w7x. The pattern from the sample annealed at 600 C was identical with that without RIE treatment. Fig. 3 shows the typical J–V characteristics for Ti y pSi interfaces damaged by plasma treatment as a function of annealing temperature. The J–V characteristic from the as-deposited sample, without annealing, was also shown in Fig. 3. Fig. 3 also shows the J–V characteristics from the sample without plasma-treatment as a control. The control sample was not annealed. The current densities of plasma-exposed samples decreased as compared with that of as-deposited sample without damage. The current density decreased when the plasma-exposed sample annealed at 4008C and slightly increased by annealing at 5008C. Fig. 4 shows the 1 y C 2–V curves from the as-deposited samples as a function of rf power density. These data indicate that the barrier height has been modified by plasma-induced damage. The doping concentration

Fig. 3. Forward current–voltage characteristics of plasma-exposed Ti yp-Si interfaces as a function of annealing temperature. The power densities of plasma treatment were 5.7 Wycm2 . The unected Tiyp-Si interface in the as-deposited state was also shown as a control.

for the samples was found to be 8.6=1014–1.1=1015 cmy3 which was equal to the original doping of the wafer. Fig. 5 shows the barrier height obtained from the C–V measurements as a function of rf power density. Fig. 5 indicates the SBH in the as-deposited sample and the samples annealed up to 6008C. The barrier height varied from 0.40 to 0.95 eV with changing the annealing temperature and rf power density. The SBH of the samples with damage increases at annealing temperature of 4008C and decreases at higher annealing temperatures. The SBH values of the as-deposited sample and the sample annealed at 4008C increases with increasing

Fig. 4. The recriprocal of capacitance (C) squared vs. voltage (V) plot for the Tiyp-Si interfaces in the as-deposited state as a function of rf power density during RIE treatment.

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T. Yamaguchi et al. / Thin Solid Films 396 (2001) 119–125 Table 1 Barrier height values of Tiyp-Si interfaces by different measurement methods Annealing temperature

Barrier height (eV) Without damage

As deposited 4008C 5008C

Fig. 5. Barrier heights obtained from C–V characteristics as a function of rf power density during RIE treatment. The samples were annealed at various temperatures.

the rf power density. The SBH was highest at 4008C and the increase of SBH as a function of power density was also larger than those at any other annealing temperature. In the samples annealed at 500 and 6008C, the SBH also increases with increasing the power density, although the dependence of SBH on the power density fluctuated. This fluctuation occurred possibly due to the structural change caused by the reactions of Ti and Si under the influences of plasma-induced damage. To investigate the current transport mechanism for plasma-exposed Ti y p-Si interface, the J–V–T (J–V as a function of measurement temperature) measurements were performed for the samples without damage and the samples damaged with the power density of 5.7 W y cm2. The barrier height obtained form activation energy analysis, J–V characteristics and C–V characteristics were summarized in Table 1 . Fig. 6 shows the forward J–V characteristics of the samples in the as-deposited state as a function of measurement temperature. As shown in Fig. 6a, the control sample displays good ideality factors of 1.06– 1.14 which are independent of measurement temperature in the range from 160 to 296 K. The dependence of ln(J0 y T 2) on 1 y T is linear with slope giving activation energy of 0.52 eV. These results indicate that the current transport mechanism in the sample without damage in the as-deposited state is due to thermionic emission. This activation energy value is almost identical with the barrier heights obtained from J–V characteristics and C– V characteristics as shown in Table 1. The Richardson constant obtained from the dependence of ln(J0 y T 2) on

With damage

Activation energy

J–V

C–V

0.52 0.52 0.49

0.55 0.56 0.52

0.55 0.57 0.43

Activation energy

J–V

C–V

0.55 0.71

0.66 0.75

0.66 0.92 0.77

1 y T was 6.6=104 A y m2K2. Fig. 6b shows the forward J–V characteristics of the sample with damage. The sample with damage also displays good ideality factors of 1.06–1.16, which are independent of measurement temperature. The dependence of ln(J0 y T 2) on 1 y T is linear with slope giving activation energy of 0.55 eV. These results suggest that the current transport mechanism in the sample with damage in the as-deposited state is also due to thermionic emission. The barrier height determined by the activation analysis, however, is lower than those obtained from C–V characteristics

Fig. 6. Forward current–voltage characteristics of Tiyp-Si interfaces as a function of measurement temperature for the as-deposited samples (a) without RIE and (b) with RIE treatment. The power density of RIE treatment was 5.7 Wycm2.

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Fig. 7. Forward current–voltage characteristics of Tiyp-Si interfaces as a function of measurement temperature for the samples annealed at 4008C (a) without RIE and (b) with RIE treatment. The power density of RIE treatment was 5.7 Wycm2.

(0.66 eV) and J–V characteristics (0.66 eV). The reason for this is that the Richardson constant obtained from the dependence of ln(J0 y T 2) on 1 y T is 0.25=104 A y m2 K2 and it is very small compared with the value assumed for the J–V characteristics at room temperature. The forward J–V characteristics for samples annealed at 4008C are shown in Fig. 7 as a function of measurement temperature. The ideality factors of the diode without damage were measured to be 1.05–1.16 as shown in Fig. 7a. The barrier height value determined by the activation analysis from the sample annealed at 4008C was identical with that in the as-deposited state. These results indicate that the current transport mechanism in the sample without damage annealed at 4008C is also due to thermionic emission. This activation energy value is almost identical with the barrier heights obtained from J–V characteristics and C–V characteristics. While, in the samples with damage, ideality factors increased and became the values of 1.22–1.27 (Fig. 7b), although they were independent of measurement temperatures ranging from 160 to 296 K. It is found that an activation energy is involved in the dominant current mechanism since the plot of ln(J0 y T 2) vs. 1 y T displays the straight line. The barrier height value obtained from

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the activation analysis was 0.71 eV. This value was in good agreement with the barrier height obtained from J–V characteristics. The increase of the ideality factor suggests that the current mechanism changes by annealing at 4008C in the samples with RIE treatment. The current transport mechanism in the sample annealed at 4008C is due to thermionic emission in cooperation with recombination in the depletion region, although thermionic-emission current dominates in the as-deposited state. In the sample with damage annealed at 4008C, the barrier heights obtained from C–V characteristics was 0.92 eV and displayed a very high value compared with those obtained from the other methods. The reason for this may lie in partial shunting of the barrier by holes passing through damage centers w13x. Most probably it lies in the fact that standard Schottky barrier theory for C–V behavior does not account for charge moving in and out of surface state w14x, nor does it account for charge in localized damage-center states existing a few or tens of nanometer below the surface w15x. As a consequence the barrier heights determined by C–V characteristics in the samples with damage become modified from those expected from simple Schottky barrier theory. Fig. 8 a shows the forward J–V characteristics of the control sample annealed at 5008C as a function of temperature. As shown in Fig. 8a, the sample displays good ideality factors of 1.04–1.15 which are independent of measurement temperature in the range from 160 to 296 K. The dependence of ln(J0 y T 2) on 1 y T is linear with slope giving activation energy of 0.49 eV. These results indicate that the current transport mechanism in the sample without damage is due to thermionic emission. It has been reported that there was little change in barrier height by annealing below 5008C and barrier height slightly decreased when the C49–TiSi2 was formed w16,17x. The formation of C49–TiSi2 has been confirmed in this sample w7x. Therefore, this slight decrease of barrier height is due to the formation of C49–TiSi2. The barrier height values obtained from J– V characteristics and C–V characteristics were 0.52 and 0.43 eV, respectively. Fig. 8b shows the forward J–V characteristics of the plasma-exposed sample annealed at 5008C as a function of temperature. As shown in Fig. 8b, the ideality factor increases with decreasing measurement temperature in the range from 160 to 296 K. A striking feature of the forward characteristics in Fig. 8b is that the slope of the lnJ–V plot is almost independent of temperature and consequently, nT is invariant of temperature. Fig. 9 shows the plots of ln(J0 y T 2) vs. 1 y nT for the samples with damage. In the samples with RIE as shown in Fig. 9, the plot of ln(J0 y T 2) vs. 1 y nT for the samples annealed at 5008C is vertical, although the plots for as-deposited samples and the sample annealed at 4008C are straight lines with slopes giving each barrier height value. These results indicate that the

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precursor of solid-state reactions did not affect the barrier height. The possible mechanism in the sample annealed at 5008C is multistep tunneling. While, thermionic-emission current dominates in the as-deposited state. From these results, we propose that a lot of the defect generation at the interface was due to the growth of Ti5Si3 which, leads to the change in the current transport mechanism at annealing temperatures of 5008C. 4. Conclusion

Fig. 8. Forward current–voltage characteristics of Tiyp-Si interfaces as a function of measurement temperature for the samples annealed at 5008C (a) without RIE and (b) with RIE treatment. The power density of RIE treatment was 5.7 Wycm2.

dominant current transport mechanism for the plasmaexposed interface annealed at 5008C is not thermionic emission. Thermionic-field emission is also unlikely, since nT is essentially constant and ln(J0 y T 2 ) vs. 1 y nT is a vertical plot w18x, as shown in Fig. 9. Field emission through the silicon barrier is also ruled out since emission over the barrier exceeds the tunnel current w10x with the doping level used and the temperature range studied here. Consequently, the characteristics displayed in Fig. 8b and Fig. 6 suggest multistep tunneling w19x as a possible mechanism in the plasma-exposed sample annealed at 5008C. In summary, in the samples without damage, the dominant current transport mechanism was due to thermionic emission and did not change against the annealing temperature. In the samples with damage, the current transport mechanism changes as the annealing temperature increases. The current transport mechanism in the sample was annealed at 4008C is due to thermionic emission in cooperation with recombination in the depletion region. The increase of ideality factors in the sample with damage is due to the formation of Ti5Si3 since it has been revealed that the amorphous layer as the

The electrical properties of Ti y p-Si interfaces damaged by CHF3 y O2 plasma treatment were investigated as a function of annealing temperature. The SBH of plasma-exposed interface increased with increasing rf power density during RIE treatment. It was found that the current transport mechanism of plasma-exposed interface changes as the annealing temperature increases. The current transport mechanism in the sample with RIE is due to thermionic emission in cooperation with recombination in the depletion region in the sample annealed at 4008C. The possible mechanism in the sample annealed at 5008C is multistep tunneling. While, thermionic-emission current dominates in the as-deposited state. By contrast, the dominant current was due to thermionic emission and did not change against the annealing temperature in the samples with clean interfaces. It is found that the amorphous layer formed by the plasma-induced damage already recovers and the junction between Ti and Si becomes a single crystal with the annealing at 4008C. It was proposed that the defect generation, due to the formation of Ti5Si3 at the interface, led to the change in the current transport mechanism.

Fig. 9. Measurement temperature dependence of forward current for plasma-exposed Tiyp-Si interfaces in the as-deposited state, annealed at 4008C and 5008C.

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