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Pragmatic testing protocols to measure software reliability
392
World Abstracts on Microelectronics and Reliability
correlations. Correlations are considered by using a classification rule to assign the attribute good or bad to each item in the sample set; this rule uses the non-parametric k-nearest neighbor estimator. The test by which the lot is accepted or rejected, based on the outcomes of the rule for all items in the sample set, is the same as in acceptance sampling by attributes. The estimator has only to be compensated for errors at the level of the classification rule.
Determination of reliability parameters of a digital multiplex frame strategy using Markov chains and a state reduction method. S. S. LIU and J. L. HAMMOND. IEEE Trans Reliab, R-32, 379 (October 1983). This paper discusses the analysis of a digitial multiplex framing strategy to determine certain reliability parameters for the frame synchronization system. The only model found suitable for determining the desired parameters is a Markov chain with ~ 5 x 105 states. To make meaningful calculations using this Markov chain, a state reduction method is employed. This method makes possible a determination of mean time between failures, availability, and several other parameters as a function of channel error rate. The model and analysis are applied to a framing strategy of greater complexity than those reported in the literature. The analysis makes it possible to include several effects, such as channel errors during the frame search operation, which are not possible with other methods. Assessing ATE on a cost-avoidance basis. RUPERT St)AMES. Electron. Prod. 20 (August 1984). ESCAPE (Economic Simulator of Costs in A Production Environment) helps the ATE user calculate the most efficient combination of test techniques. The Wheatstone bridge reduction in network reliability computations. RUB1N JOHNSON. IEEE Trans Reliab. R-32, 374 (October 1983). The subgraph configuration known as the Wheatstone bridge of s-independent elements can be replaced by a single edge in a reliability-preserving network transformation. The formulas for calculating the good and bad probabilities of this edge are presented. This reduction technique reduces by more than half the complexity of some backtrack algorithms that solve network reliability problems. Computational experience indicates that the benefits are worth the extra efforts it takes to perform this
reduction. For problems of moderate size, use of the Wheatstone bridge reduction typically led to computational savings of between 20 o~, and 40 °~o.
Pragmatic testing protocols to measure software reliability. PETER KUBAT and HARVEY S. KOCH. IEEE Trans Reliab. R-32, 338 (October 1983). This paper investigates four different test protocols based upon the Jelinski-Moranda model of software reliability growth. The main task is to estimate the number of remaining errors in a system at the time of system release. These four protocols are: ( 1) testing is discontinued after some number of errors has been observed; (2) testing is discontinued at the end of a prescribed period of time; (3) testing is discontinued when a specified amount of time is observed to be completely error free; (4) error checking and debugging is done only by a prespecified time schedule. Two examples with actual failure data illustrate the estimation procedures under different protocols. ITT's testability analysis program. R. M. McDERMOTT. Electl Commun. 58, 433 (1984). Testable designs ensure product quality and reduce production and life cycle costs. I T T A P - ITT's testability analysis program supports the evaluation and enhancement of design testability. A Monte-Carlo technique for estimating lower confidence limits on system reliability using pass-fail data. RoY E. RICE and ALBERT H. MOORE. IEEE Trans. Reliab. R-32, 366 (October 1983). Several methods for estimating lower s-confidence limits (LCLs) for system reliability were examined using pass-fail data on the components. A new technique was used to obtain limits for selected systems. These limits were compared to those obtained by other methods. The new method was tested to verify its accuracy. Results indicate that the proposed technique is simple to understand, easy to implement, and accurate. One need only supply the component reliabilities, the number of component tests, and the desired level of s-confidence, to obtain, not only an estimated LCL of the system reliability, but also an idea of the accuracy of the estimate. Most of the other techniques are not valid in the case of zero-failures, whereas this method easily accommodates such a situation. This method is not restricted to series systems; it can easily handle parallel configurations.
4. M I C R O E L E C T R O N I C S - - G E N E R A L
Status and prospects for gallium arsenide technology. D.G. FISHER. Electl Commun. 58, 418 (1984). Gallium arsenide integrated circuits have been shown to perform well in ultra high frequency and data rate applications. With the establishment of manufacturing capability, the application of gallium arsenide integrated circuits to a wide range of military and commercial systems applications is now a reality. Semiconductors race to best year ever worldwide; markets zoom across the board. ROBERTJ. KOZMA. Electronics 125 (14 June 1984). Personal computers and office equipment pace demand ; chips will zoom over 30 7o this year and stay strong until 1986. GaAs ICs bid for commercial success. LARRY WALLER. Electronics 101 (14 June 1984). With speed the biggest attraction and materials improving, makers are planning to add capacity as start-ups seek backing. Trends in high voltage integrated circuit technology. RAY
Root'. Solid St. Technol. 147 (May 1984). Interest in extending the voltage range of integrated circuits to address applications in telecommunications, display, automotive, and motor control markets has stimulated development of new process architectures and devices. These are reviewed along with reliability and die size implications of various process steps. A simple expression for calculation of thickness-limited collector-to-emitter breakdown will be discussed which can be used as an aid in the design of high voltage bipolar devices.
Impact of custom VLSI technology. R. F. PRlVETT and P. VAN ISEGHEM. Electl Commun. 58, 364 (1984). The semiconductor industry forecasts that 50'.'/o of the integrated circuits used in 1990 wilt be application specific custom and semi-custom design circuits. ITT's broad product base makes it essential for the corporation to have state-of-the-art design and processing facilities for this key technology. Boom squeezes captive chip makers. WESLEY R. IVERSEN. Electronics 89 (28 June 1984). Increased demand for semi-
World Abstracts on Microelectronics and Reliability
correlations. Correlations are considered by using a classification rule to assign the attribute good or bad to each item in the sample set; this rule uses the non-parametric k-nearest neighbor estimator. The test by which the lot is accepted or rejected, based on the outcomes of the rule for all items in the sample set, is the same as in acceptance sampling by attributes. The estimator has only to be compensated for errors at the level of the classification rule.
Determination of reliability parameters of a digital multiplex frame strategy using Markov chains and a state reduction method. S. S. LIU and J. L. HAMMOND. IEEE Trans Reliab, R-32, 379 (October 1983). This paper discusses the analysis of a digitial multiplex framing strategy to determine certain reliability parameters for the frame synchronization system. The only model found suitable for determining the desired parameters is a Markov chain with ~ 5 x 105 states. To make meaningful calculations using this Markov chain, a state reduction method is employed. This method makes possible a determination of mean time between failures, availability, and several other parameters as a function of channel error rate. The model and analysis are applied to a framing strategy of greater complexity than those reported in the literature. The analysis makes it possible to include several effects, such as channel errors during the frame search operation, which are not possible with other methods. Assessing ATE on a cost-avoidance basis. RUPERT St)AMES. Electron. Prod. 20 (August 1984). ESCAPE (Economic Simulator of Costs in A Production Environment) helps the ATE user calculate the most efficient combination of test techniques. The Wheatstone bridge reduction in network reliability computations. RUB1N JOHNSON. IEEE Trans Reliab. R-32, 374 (October 1983). The subgraph configuration known as the Wheatstone bridge of s-independent elements can be replaced by a single edge in a reliability-preserving network transformation. The formulas for calculating the good and bad probabilities of this edge are presented. This reduction technique reduces by more than half the complexity of some backtrack algorithms that solve network reliability problems. Computational experience indicates that the benefits are worth the extra efforts it takes to perform this
reduction. For problems of moderate size, use of the Wheatstone bridge reduction typically led to computational savings of between 20 o~, and 40 °~o.
Pragmatic testing protocols to measure software reliability. PETER KUBAT and HARVEY S. KOCH. IEEE Trans Reliab. R-32, 338 (October 1983). This paper investigates four different test protocols based upon the Jelinski-Moranda model of software reliability growth. The main task is to estimate the number of remaining errors in a system at the time of system release. These four protocols are: ( 1) testing is discontinued after some number of errors has been observed; (2) testing is discontinued at the end of a prescribed period of time; (3) testing is discontinued when a specified amount of time is observed to be completely error free; (4) error checking and debugging is done only by a prespecified time schedule. Two examples with actual failure data illustrate the estimation procedures under different protocols. ITT's testability analysis program. R. M. McDERMOTT. Electl Commun. 58, 433 (1984). Testable designs ensure product quality and reduce production and life cycle costs. I T T A P - ITT's testability analysis program supports the evaluation and enhancement of design testability. A Monte-Carlo technique for estimating lower confidence limits on system reliability using pass-fail data. RoY E. RICE and ALBERT H. MOORE. IEEE Trans. Reliab. R-32, 366 (October 1983). Several methods for estimating lower s-confidence limits (LCLs) for system reliability were examined using pass-fail data on the components. A new technique was used to obtain limits for selected systems. These limits were compared to those obtained by other methods. The new method was tested to verify its accuracy. Results indicate that the proposed technique is simple to understand, easy to implement, and accurate. One need only supply the component reliabilities, the number of component tests, and the desired level of s-confidence, to obtain, not only an estimated LCL of the system reliability, but also an idea of the accuracy of the estimate. Most of the other techniques are not valid in the case of zero-failures, whereas this method easily accommodates such a situation. This method is not restricted to series systems; it can easily handle parallel configurations.
4. M I C R O E L E C T R O N I C S - - G E N E R A L
Status and prospects for gallium arsenide technology. D.G. FISHER. Electl Commun. 58, 418 (1984). Gallium arsenide integrated circuits have been shown to perform well in ultra high frequency and data rate applications. With the establishment of manufacturing capability, the application of gallium arsenide integrated circuits to a wide range of military and commercial systems applications is now a reality. Semiconductors race to best year ever worldwide; markets zoom across the board. ROBERTJ. KOZMA. Electronics 125 (14 June 1984). Personal computers and office equipment pace demand ; chips will zoom over 30 7o this year and stay strong until 1986. GaAs ICs bid for commercial success. LARRY WALLER. Electronics 101 (14 June 1984). With speed the biggest attraction and materials improving, makers are planning to add capacity as start-ups seek backing. Trends in high voltage integrated circuit technology. RAY
Root'. Solid St. Technol. 147 (May 1984). Interest in extending the voltage range of integrated circuits to address applications in telecommunications, display, automotive, and motor control markets has stimulated development of new process architectures and devices. These are reviewed along with reliability and die size implications of various process steps. A simple expression for calculation of thickness-limited collector-to-emitter breakdown will be discussed which can be used as an aid in the design of high voltage bipolar devices.
Impact of custom VLSI technology. R. F. PRlVETT and P. VAN ISEGHEM. Electl Commun. 58, 364 (1984). The semiconductor industry forecasts that 50'.'/o of the integrated circuits used in 1990 wilt be application specific custom and semi-custom design circuits. ITT's broad product base makes it essential for the corporation to have state-of-the-art design and processing facilities for this key technology. Boom squeezes captive chip makers. WESLEY R. IVERSEN. Electronics 89 (28 June 1984). Increased demand for semi-