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Programming of ROMs after metal definition using MEV ion implantation
116
Nuclear Instruments and Methods in Physics Research B21 (1987) 116-119 North-Holland, Amsterdam
P R O G R A M M I N G OF R O M s A F r E R METAL D E F I N I T I O N U S I N G MEV ION I M P L A N T A T I O N D. P R A M A N I K VLSI Technology, 1101 McKay Drive, San Jos$, CA 95131, USA
A.N. S A X E N A Gould Electronics SCD, 3800 Homestead Road, Santa Clara, Ca 95051, USA
MOS read only memories (ROMs) were programmed after metal definition by using an MeV ion implanter. The energy and dose of the implant had to be adjusted so as to raise the threshold voltage of the transistors, VrI,, to be 5 V. The variation of Vlp with implant energy, E and with the thickness of the layers to be implanted through, was investigated. The anneal temperature after the implant was 450°C. At this temperature only a fraction of the boron is activated and part of the implant damage remains. This degrades the subthreshold characteristics and transconductance of the programmed transistors. In spite of this, good yields were obtained on 64 K ROMs with after metal programming, provided the right implant conditions were utilized.
1. Introduction MeV implantation has been used for various applications in VLSI [1-3]. One of the applications is for the programming of read only memories (ROMs), after the metallization of the circuit has been "completed. The threshold voltage of the memory transistors that are to be turned "off" is increased over that of transistors that are to be kept "on" by implanting boron ions into the channel region of the "off" or programmed transistors. Typically, the program voltage, VTp, is of the order of 5 V. The energy of the boron ions has to be chosen such that the peak of the boron profile is situated below the gate oxide-silicon interface. If the implantation is to be done after metallization, the energy has to be such that the boron ions penetrate through all the films above this interface, viz., the gate oxide, gate material and the dielectric layers above the gate. Implant energies greater than 400 keV are required, the exact value depending on the total thickness of material that has to be penetrated. In this paper the effect of the energy on the program voltage has been studied for after metal programming. Also, the effect of variations in the thickness of the layers, to be implanted through, on VTp has also been determined. The temperature at which the program implants can be annealed to activate them is limited to less than 500 ° C because of the Al metallization. As a result, the implanted boron is not completely activated [4] and the damage introduced by the implantation is not completely annealed out. The effect of the residual damage on the leakage of junctions and on the stability of VTp has been determined. Finally a 64 K ROM was 0168-583X/87/$03.50 © Elsevier Science Publishers B.V. (North-Holland Physics Publishing Division)
fabricated and programmed after metal, using high energy implants to yield working products.
2. Experimental details The test transistors were fabricated on (100) p-type wafers having resistivity 35-60 $2 cm, using a typical NMOS process cycle [5], with gate oxide thicknesses of 300 and 500 A respectively. Several 64 K ROM wafers were fabricated with 500 A gate oxide. The gate material was n ÷ doped polysilicon, 3700 A thick. After definition of the gates and source-drain implantation, some of the wafers had a 1 /.tm thick layer of photoresist spun on and patterned with the program mask. These wafers were implanted with 130 keV B + with doses varying from 2E13 cm -2 to 7E13 cm -2. The devices that were to be implanted were clear of photoresist, whereas the areas that were not to be implanted were covered with the resist. Transistors programmed at this step are henceforth termed AGP (after gate program) transistors. A layer of phosphorus doped glass (PSG) was deposited by CVD and densified at 800 ° C. Contact holes were opened up and A1-1% Si metallization was used to connect to the source, gate and drain for device probing. The final thickness of the PSG at this step ranged from 0.5-0.7/~m for one lot of test transistors. Wafers that had not been programmed earlier and which were meant for after metal programming (AMP) had a 2 /~m thick photoresist program mask applied, after metal patterning. Program implant energies from 400 to 600 keV were used and the dose was fixed at
D. Pramanik, A.N. Saxena / Programmingof ROMs 2E13 cm-2. The lot of 64 K ROMs had thicker PSG ranging from 0.7-0.9 /~m. The program implant energies were increased to take this into account. Wafers were implanted with different doses; 2E13 cm-2 at 600, 625, 650 and 675 keV and 3E13cm -2 at 650 keV. After the implant all the wafers were annealed in forming gas at 450 o C for 30 min. Threshold voltages of the test transistors were measured for both programmed and nonprogrammed transistors. Also, the leakage current of N ÷ - P diode structures with and without the program implant were measured. Both programmed and nonprogrammed transistors were subjected to electrical stress. This consisted of grounding the source, applying a voltage of 5 V to the gate and drain, while the device was maintained at 150°C. After 168 h the devices were cooled to room temperature and the threshold voltage of the transistors measured again.
3. Results
3.1. Transistor characteristics The threshold voltages were determined from the I - V curves. Fig. 1 shows the transconductance and subthreshold curves for a programmed transistor. The subthreshold I - V curves of the AMP transistors indicate poor turn on characteristics, but at low enough voltages the transistors can be turned off. For comparison, similar curves are shown for an AGP transistor that had approximately the same VTp. The turn on characteristics are superior to the AMP transistor and the transconductance is also higher. Nonprogrammed transistors from the AMP wafer and the AGP wafer
I E - 04
10 VD=O1V 9
/~
- - - - AMP
8 7 6
,-f
5 4
._/,"
117
were also compared in order to confirm that the differences observed for the programmed transistors were not due to differences in other variables such as gate oxide thickness. The I - V curves for the nonprogrammed transistors were identical.
3.2. Stability of the transistors under stress After 168 h VTp 6f AMP transistors showed positive voltage shifts that ranged from 0.5 to 1.3 V, with an average of 1 V shift. Nonprogrammed transistors and A G P transistors showed no shift in VTp.
3.3. Masking against high energy implants The threshold voltages of the transistors were measured prior to programming and were typically in the range 0.6-0.8 V. Two thicknesses of photoresist were tried as a masking layer - 1 and 2/~m. Different wafers were implanted with 500, 600, 700 and 800 keV B ÷ ion implants, respectively. The resist was stripped off and the threshold voltages were measured again after annealing. The threshold voltages of all the transistors had increased for all energies for wafers coated with 1 ~m of resist. The shift got progressively larger with increasing ion energy, indicating that the boron ions were penetrating through the resist, the gate and the PSG layer above the gate, even for the lowest energy. No threshold shifts were seen for 2 ~m photoresist even for the highest energy used. Hence all subsequent programming was done using 2 /~m resist.
3.4. Effect of energy on programming voltage In fig. 2 the programming voltage, measured on test transistors is shown as a function of the energy, for the same thickness of PSG for a dose of 2E13 cm -2. The highest voltage was obtained for 400 keV B +, and it fell off with increasing implant energy. This indicates that at 400 keV the peak of the boron profile has penetrated into the channel region. For higher energies the peak moves deeper into the substrate and the boron concentration in the depletion layer under the channel drops, causing V-rp to fall. At 675 keV, the peak moves in so far that the threshold voltage is no longer affected by the high energy implant.
3
3.5. Effect of thickness variations
2 1 0
I
I GATE VOLTAGE (V)
1E-10 10
Fig. 1. Subthreshold and transconductance curves for after gate program (AGP) transistors and after metal program (AMP) transistors. Drain voltage was held constant at 0.1 V. Gate oxide thicknesswas 500 A.
The PSG deposited over the gates were not of uniform thickness across the wafer. As a result VTp was not uniform across a wafer. The PSG thickness was measured at different points on the wafer and V-n, determined at corresponding points. Fig. 3 shows the variation of VTp as a function of the PSG thickness, for
II. CHALLENGES/EMERGING TECHNOLOGIES
118
D. Pramanik, A.N. Saxena / Programmingof R OMs Table 1 Yield of 64 K ROMs and VTp measured on corresponding control transistors, at two sites on wafer, for various program implant energies and doses. Energy (keV)
3
22
600 625 650 650 650 650 675
u)
1
400
I
450
I
5OO
510
Dose (ions/cm 2 ) 2El 3 2E13 2E13 2E13 3E13 3El 3 2E13
VTp at VBS= - 2.5 V (V) Site 1
Site 2
Yield of max. fraction
8 6.5 4.7 5.5 9.5 6.5 4.5
6 5.5 4.7 7.7 7.0 7.5 5
0.48 0.04 0 0.10 1 0.64 0
6~0
ENERGY (KeV)
Fig. 2. Variation of program threshold voltage as a function of program implant energy of boron for a dose of 2E13 cm -2. Gate oxide thickness was 300 ~,.
three different wafers, implanted with 2E13 cm -2 at 400 keV, 4E13 cm -2 at 400 keV and 2E13 cm -2 at 450 keV respectively. The fact that VTp decreases with decreasing thickness indicates that even for the thickest P S G films the boron peak penetrates into the channel, that is, even at 400 keV the B + still penetrates through the areas where PSG is the thickest. When the PSG thickness decreases, the boron peak moves farther into
the substrate, causing VTp to fall. Note that the variation of VTp is the same for all three implant conditions.
3.6. Effect of dose On A G P wafers VTp was found to vary approximately as the square root of dose. On A M P wafers, for identical implant energies, VTp was measured to be 2.7 and 4 V for doses of 2E13 and 4E13 cm -2 respectively. O n another set of wafers, VTp was measured as 3 and 4.25 V for doses of 2E13 and 3E13 cm -2 respectively. F r o m these sets of data it is not possible to determine a clear relationship between dose and VTp.
3. 7. Yield on 64 K ROMs
5
4
q (lONS/cm:)
Table I shows the yields measured for various wafers and the corresponding program implant conditions as well as the Vrp measured on transistors incorporated with the 64 K R O M . VTp was measured with a - 2 . 5 V back bias voltage applied to the substrate, since the part operates with a back bias. The best yield was obtained with the highest V r p . Wafers which had VTp less than 5 V had no operational parts because the parts were designed to operate with a minimum VTpof 5 V.
2 4 x 10t3
o
•
4OO
2 x 10~a
•
450
2 x 1 0 ~a
~ _ _ L _ _ a . _ _
0 40
0.44
0.48 0.52 PSG THICKNESS (ixrn)
056
0.60
Fig. 3. Variation of program threshold voltage with PSG thickness for three implant conditions. Gate oxide thickness was 300 A.
3.8. Leakage Leakage currents of N + - P diodes which received no program implant and diodes which received A G P implants and A M P implants were measured, for reverse bias voltages, extending from 0 to 5 V. N o difference was observed between diodes with no implant and those with the A G P implants. The leakage currents were higher on diodes with A M P implants, reaching an order of magnitude higher at 5 V.
D. Pramanik, A.N. Saxena / Programmingof ROMs 4. Discussion
The energy of the program implant is critical, as the peak of the boron profile has to be positioned directly below the gate oxide-silicon interface, in order to obtain the highest V-~ for a given dose. With 5000 A of PSG, the total effective thickness of SiO 2 to be penetrated was approximately 9000 ,A. The optimum energy of implant should therefore be 425 keV. The actual energy was below 400 keV. When the PSG thickness was increased to 0.8 pm, the optimum energy should be 650 keV but it was less than 600 keV. We have not been able to resolve the discrepancy between the energies expected from calculated ranges and those determined experimentally. For a given average thickness, with the optimum energy, Vxp will decrease for thickness above and below the average and hence variations in Vxp across a wafer will be kept to a minimum. The degradation of the subthreshold characteristics, and the lower transconductance of the AMP transistors relative to the A G P transistors, indicates the presence of surface states and electron traps at the SiO2-Si interface of the A M P transistors. Under bias temperature stress electrons constituting the channel current are trapped by these interface traps and cause a positive shift in Vxp [6]. The traps are related to damage created by the boron implant which is not completely annealed out at 450 ° C. This residual damage is also responsible for the enhanced leakage of N + - P - diodes. The poor turn on characteristics of the programmed transistor are of little concern from a product point of view since in normal operation these transistors are kept "off".
119
Changes in V-rp are also unlikely under normal operation since there is no channel current to provide the electrons for trapping at the interface traps. Even if there are shifts in V-rp, it is in the direction of increasing V-rp, which actually assists ROM performance!
5. Conclusion
Transistors can be programmed to have high threshold voltages after metallization, by using high energy implants followed by low temperature ( < 500 ° C) annealing. The subthreshold and transconductance are degraded because of unannealed residual damage. However, the procedure is still viable for ROMs and the feasibility has been demonstrated on fabricated ROMs.
References
[1] D. Pramanik and M.I. Current, Solid State Technol 211 (1984). [2] D. Pramanik and A.N. Saxena, Nucl. Instr. and Meth. B 10/11 (1985) 493. [3] N.W. Cheung, Proc. Soc. Photo-Optical Instrum. Eng. 50 (1985) 2. [4] T.E. Seidel and A.U. Macrae, in: Ion Implantation (Breach, London, 1971) p. 149. [5] S. Sze, VLSI Technology (McGraw-Hill, New York, 1973) p. 446. [6] T.H. Ning, C.M. Osburn and H.N. Yu, J. Electron Mater. 6 (1977) 65.
II. CHALLENGES/EMERGING TECHNOLOGIES
Nuclear Instruments and Methods in Physics Research B21 (1987) 116-119 North-Holland, Amsterdam
P R O G R A M M I N G OF R O M s A F r E R METAL D E F I N I T I O N U S I N G MEV ION I M P L A N T A T I O N D. P R A M A N I K VLSI Technology, 1101 McKay Drive, San Jos$, CA 95131, USA
A.N. S A X E N A Gould Electronics SCD, 3800 Homestead Road, Santa Clara, Ca 95051, USA
MOS read only memories (ROMs) were programmed after metal definition by using an MeV ion implanter. The energy and dose of the implant had to be adjusted so as to raise the threshold voltage of the transistors, VrI,, to be 5 V. The variation of Vlp with implant energy, E and with the thickness of the layers to be implanted through, was investigated. The anneal temperature after the implant was 450°C. At this temperature only a fraction of the boron is activated and part of the implant damage remains. This degrades the subthreshold characteristics and transconductance of the programmed transistors. In spite of this, good yields were obtained on 64 K ROMs with after metal programming, provided the right implant conditions were utilized.
1. Introduction MeV implantation has been used for various applications in VLSI [1-3]. One of the applications is for the programming of read only memories (ROMs), after the metallization of the circuit has been "completed. The threshold voltage of the memory transistors that are to be turned "off" is increased over that of transistors that are to be kept "on" by implanting boron ions into the channel region of the "off" or programmed transistors. Typically, the program voltage, VTp, is of the order of 5 V. The energy of the boron ions has to be chosen such that the peak of the boron profile is situated below the gate oxide-silicon interface. If the implantation is to be done after metallization, the energy has to be such that the boron ions penetrate through all the films above this interface, viz., the gate oxide, gate material and the dielectric layers above the gate. Implant energies greater than 400 keV are required, the exact value depending on the total thickness of material that has to be penetrated. In this paper the effect of the energy on the program voltage has been studied for after metal programming. Also, the effect of variations in the thickness of the layers, to be implanted through, on VTp has also been determined. The temperature at which the program implants can be annealed to activate them is limited to less than 500 ° C because of the Al metallization. As a result, the implanted boron is not completely activated [4] and the damage introduced by the implantation is not completely annealed out. The effect of the residual damage on the leakage of junctions and on the stability of VTp has been determined. Finally a 64 K ROM was 0168-583X/87/$03.50 © Elsevier Science Publishers B.V. (North-Holland Physics Publishing Division)
fabricated and programmed after metal, using high energy implants to yield working products.
2. Experimental details The test transistors were fabricated on (100) p-type wafers having resistivity 35-60 $2 cm, using a typical NMOS process cycle [5], with gate oxide thicknesses of 300 and 500 A respectively. Several 64 K ROM wafers were fabricated with 500 A gate oxide. The gate material was n ÷ doped polysilicon, 3700 A thick. After definition of the gates and source-drain implantation, some of the wafers had a 1 /.tm thick layer of photoresist spun on and patterned with the program mask. These wafers were implanted with 130 keV B + with doses varying from 2E13 cm -2 to 7E13 cm -2. The devices that were to be implanted were clear of photoresist, whereas the areas that were not to be implanted were covered with the resist. Transistors programmed at this step are henceforth termed AGP (after gate program) transistors. A layer of phosphorus doped glass (PSG) was deposited by CVD and densified at 800 ° C. Contact holes were opened up and A1-1% Si metallization was used to connect to the source, gate and drain for device probing. The final thickness of the PSG at this step ranged from 0.5-0.7/~m for one lot of test transistors. Wafers that had not been programmed earlier and which were meant for after metal programming (AMP) had a 2 /~m thick photoresist program mask applied, after metal patterning. Program implant energies from 400 to 600 keV were used and the dose was fixed at
D. Pramanik, A.N. Saxena / Programmingof ROMs 2E13 cm-2. The lot of 64 K ROMs had thicker PSG ranging from 0.7-0.9 /~m. The program implant energies were increased to take this into account. Wafers were implanted with different doses; 2E13 cm-2 at 600, 625, 650 and 675 keV and 3E13cm -2 at 650 keV. After the implant all the wafers were annealed in forming gas at 450 o C for 30 min. Threshold voltages of the test transistors were measured for both programmed and nonprogrammed transistors. Also, the leakage current of N ÷ - P diode structures with and without the program implant were measured. Both programmed and nonprogrammed transistors were subjected to electrical stress. This consisted of grounding the source, applying a voltage of 5 V to the gate and drain, while the device was maintained at 150°C. After 168 h the devices were cooled to room temperature and the threshold voltage of the transistors measured again.
3. Results
3.1. Transistor characteristics The threshold voltages were determined from the I - V curves. Fig. 1 shows the transconductance and subthreshold curves for a programmed transistor. The subthreshold I - V curves of the AMP transistors indicate poor turn on characteristics, but at low enough voltages the transistors can be turned off. For comparison, similar curves are shown for an AGP transistor that had approximately the same VTp. The turn on characteristics are superior to the AMP transistor and the transconductance is also higher. Nonprogrammed transistors from the AMP wafer and the AGP wafer
I E - 04
10 VD=O1V 9
/~
- - - - AMP
8 7 6
,-f
5 4
._/,"
117
were also compared in order to confirm that the differences observed for the programmed transistors were not due to differences in other variables such as gate oxide thickness. The I - V curves for the nonprogrammed transistors were identical.
3.2. Stability of the transistors under stress After 168 h VTp 6f AMP transistors showed positive voltage shifts that ranged from 0.5 to 1.3 V, with an average of 1 V shift. Nonprogrammed transistors and A G P transistors showed no shift in VTp.
3.3. Masking against high energy implants The threshold voltages of the transistors were measured prior to programming and were typically in the range 0.6-0.8 V. Two thicknesses of photoresist were tried as a masking layer - 1 and 2/~m. Different wafers were implanted with 500, 600, 700 and 800 keV B ÷ ion implants, respectively. The resist was stripped off and the threshold voltages were measured again after annealing. The threshold voltages of all the transistors had increased for all energies for wafers coated with 1 ~m of resist. The shift got progressively larger with increasing ion energy, indicating that the boron ions were penetrating through the resist, the gate and the PSG layer above the gate, even for the lowest energy. No threshold shifts were seen for 2 ~m photoresist even for the highest energy used. Hence all subsequent programming was done using 2 /~m resist.
3.4. Effect of energy on programming voltage In fig. 2 the programming voltage, measured on test transistors is shown as a function of the energy, for the same thickness of PSG for a dose of 2E13 cm -2. The highest voltage was obtained for 400 keV B +, and it fell off with increasing implant energy. This indicates that at 400 keV the peak of the boron profile has penetrated into the channel region. For higher energies the peak moves deeper into the substrate and the boron concentration in the depletion layer under the channel drops, causing V-rp to fall. At 675 keV, the peak moves in so far that the threshold voltage is no longer affected by the high energy implant.
3
3.5. Effect of thickness variations
2 1 0
I
I GATE VOLTAGE (V)
1E-10 10
Fig. 1. Subthreshold and transconductance curves for after gate program (AGP) transistors and after metal program (AMP) transistors. Drain voltage was held constant at 0.1 V. Gate oxide thicknesswas 500 A.
The PSG deposited over the gates were not of uniform thickness across the wafer. As a result VTp was not uniform across a wafer. The PSG thickness was measured at different points on the wafer and V-n, determined at corresponding points. Fig. 3 shows the variation of VTp as a function of the PSG thickness, for
II. CHALLENGES/EMERGING TECHNOLOGIES
118
D. Pramanik, A.N. Saxena / Programmingof R OMs Table 1 Yield of 64 K ROMs and VTp measured on corresponding control transistors, at two sites on wafer, for various program implant energies and doses. Energy (keV)
3
22
600 625 650 650 650 650 675
u)
1
400
I
450
I
5OO
510
Dose (ions/cm 2 ) 2El 3 2E13 2E13 2E13 3E13 3El 3 2E13
VTp at VBS= - 2.5 V (V) Site 1
Site 2
Yield of max. fraction
8 6.5 4.7 5.5 9.5 6.5 4.5
6 5.5 4.7 7.7 7.0 7.5 5
0.48 0.04 0 0.10 1 0.64 0
6~0
ENERGY (KeV)
Fig. 2. Variation of program threshold voltage as a function of program implant energy of boron for a dose of 2E13 cm -2. Gate oxide thickness was 300 ~,.
three different wafers, implanted with 2E13 cm -2 at 400 keV, 4E13 cm -2 at 400 keV and 2E13 cm -2 at 450 keV respectively. The fact that VTp decreases with decreasing thickness indicates that even for the thickest P S G films the boron peak penetrates into the channel, that is, even at 400 keV the B + still penetrates through the areas where PSG is the thickest. When the PSG thickness decreases, the boron peak moves farther into
the substrate, causing VTp to fall. Note that the variation of VTp is the same for all three implant conditions.
3.6. Effect of dose On A G P wafers VTp was found to vary approximately as the square root of dose. On A M P wafers, for identical implant energies, VTp was measured to be 2.7 and 4 V for doses of 2E13 and 4E13 cm -2 respectively. O n another set of wafers, VTp was measured as 3 and 4.25 V for doses of 2E13 and 3E13 cm -2 respectively. F r o m these sets of data it is not possible to determine a clear relationship between dose and VTp.
3. 7. Yield on 64 K ROMs
5
4
q (lONS/cm:)
Table I shows the yields measured for various wafers and the corresponding program implant conditions as well as the Vrp measured on transistors incorporated with the 64 K R O M . VTp was measured with a - 2 . 5 V back bias voltage applied to the substrate, since the part operates with a back bias. The best yield was obtained with the highest V r p . Wafers which had VTp less than 5 V had no operational parts because the parts were designed to operate with a minimum VTpof 5 V.
2 4 x 10t3
o
•
4OO
2 x 10~a
•
450
2 x 1 0 ~a
~ _ _ L _ _ a . _ _
0 40
0.44
0.48 0.52 PSG THICKNESS (ixrn)
056
0.60
Fig. 3. Variation of program threshold voltage with PSG thickness for three implant conditions. Gate oxide thickness was 300 A.
3.8. Leakage Leakage currents of N + - P diodes which received no program implant and diodes which received A G P implants and A M P implants were measured, for reverse bias voltages, extending from 0 to 5 V. N o difference was observed between diodes with no implant and those with the A G P implants. The leakage currents were higher on diodes with A M P implants, reaching an order of magnitude higher at 5 V.
D. Pramanik, A.N. Saxena / Programmingof ROMs 4. Discussion
The energy of the program implant is critical, as the peak of the boron profile has to be positioned directly below the gate oxide-silicon interface, in order to obtain the highest V-~ for a given dose. With 5000 A of PSG, the total effective thickness of SiO 2 to be penetrated was approximately 9000 ,A. The optimum energy of implant should therefore be 425 keV. The actual energy was below 400 keV. When the PSG thickness was increased to 0.8 pm, the optimum energy should be 650 keV but it was less than 600 keV. We have not been able to resolve the discrepancy between the energies expected from calculated ranges and those determined experimentally. For a given average thickness, with the optimum energy, Vxp will decrease for thickness above and below the average and hence variations in Vxp across a wafer will be kept to a minimum. The degradation of the subthreshold characteristics, and the lower transconductance of the AMP transistors relative to the A G P transistors, indicates the presence of surface states and electron traps at the SiO2-Si interface of the A M P transistors. Under bias temperature stress electrons constituting the channel current are trapped by these interface traps and cause a positive shift in Vxp [6]. The traps are related to damage created by the boron implant which is not completely annealed out at 450 ° C. This residual damage is also responsible for the enhanced leakage of N + - P - diodes. The poor turn on characteristics of the programmed transistor are of little concern from a product point of view since in normal operation these transistors are kept "off".
119
Changes in V-rp are also unlikely under normal operation since there is no channel current to provide the electrons for trapping at the interface traps. Even if there are shifts in V-rp, it is in the direction of increasing V-rp, which actually assists ROM performance!
5. Conclusion
Transistors can be programmed to have high threshold voltages after metallization, by using high energy implants followed by low temperature ( < 500 ° C) annealing. The subthreshold and transconductance are degraded because of unannealed residual damage. However, the procedure is still viable for ROMs and the feasibility has been demonstrated on fabricated ROMs.
References
[1] D. Pramanik and M.I. Current, Solid State Technol 211 (1984). [2] D. Pramanik and A.N. Saxena, Nucl. Instr. and Meth. B 10/11 (1985) 493. [3] N.W. Cheung, Proc. Soc. Photo-Optical Instrum. Eng. 50 (1985) 2. [4] T.E. Seidel and A.U. Macrae, in: Ion Implantation (Breach, London, 1971) p. 149. [5] S. Sze, VLSI Technology (McGraw-Hill, New York, 1973) p. 446. [6] T.H. Ning, C.M. Osburn and H.N. Yu, J. Electron Mater. 6 (1977) 65.
II. CHALLENGES/EMERGING TECHNOLOGIES