Simple enumeration of minimal cutsets of acyclic directed graph

Simple enumeration of minimal cutsets of acyclic directed graph

World Abstracts on Microelectronics and Reliability terminal reliability of a given computer communication network is a NP-hard problem. Hence, the pr...

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World Abstracts on Microelectronics and Reliability terminal reliability of a given computer communication network is a NP-hard problem. Hence, the problem of assigning reliabilities to links of a fixed computer communication network topology to optimize the system reliability is also NP-hard. We develop a heuristic method to assign links to a given topology so that the system reliability of the network is near optimal. Our method provides a way to assign reliability measures to the links of a network to increase overall reliability. The method is based on the principle that the most reliable link should be assigned to the most vulnerable edge. The method computes an importance order for the edges of the network and uses the order to assign link reliabilities. If there are less than six links in a network, it can be shown that our heuristic method, with the aid of theorem 2 gives the optimal assignment.

Design of highly reliable tree architectures. KK.Y. SRINIVASAN and A. K, SOOD. Comput. elect. Engng 14(1/2), 43 (1988). It is well established that tree interconnections provide the most natural interconnect architecture for hierarchically organized distributed computing systems. One advantage of the tree architecture is the 0(log N) speed of information exchange between any two nodes of an N node system. Another advantage is that the tree architecture can naturally map several important classes of problems that can be described as divide-and-conquer algorithms. In this paper we address the issue of fault-tolerance in binary tree architectures and present two new reliable tree architectures: the L-tree and the LN-tree. The L-tree is formed by augmenting the simplex binary tree with redundant links; the LN-tree is formed by augmenting the simplex binary tree with redundant nodes as well as links. Comparing the fault-tolerance performance of these two tree structures with other augmented tree structures previously proposed, we find that the L-tree is more reliable than existing faulttolerant tree structures and has the further advantage of permitting simple algorithmic routing. The L-tree tolerates faults with a degradation in performance, however, whereas the LN-tree is not only highly reliable, but also maintains a rigid tree structure in the event of faults. Building circuits that test themselves. STEPHEN F. SCHEIBER. Test Measure. World 61 (November 1988). Whether it can detect all faults or only a subset, self-test simplifies the rest of the verification process for today's complex circuits. The use of Petri nets to analyze coherent fault trees. G. S. HURA and J. W. ATWOOD. IEEE Trans. Reliab. 37(5), 469 (December 1988). This paper discusses the use of Petri nets to represent fault trees. Using reachability and other analytic properties of Petri nets, a more general and useful method to study the dynamic behaviour of the model at various levels of abstraction is discussed. The problems of fault-detection and propagation of faults are discussed in the modeling of fault-tree analysis for obtaining a compact and suitable modeling tool. This provides more insight into behaviour, and offers a better treatment for the reliability evaluation than the conventional representation models. Exact reliability analysis of combinational logic circuits. STAVROS P. DOKOUZGIANNIS and JOHN M. KONTOLEON. IEEE Trans. Reliab. 37(5), 493 (December 1988). This paper presents a new method for the exact reliability analysis of combinational logic circuits. A new model is developed which allows the logic circuit to be represented by a circuit equivalent graph (CEG). The reliability is analysed by a systematic searching of certain subgraphs from the previously developed CEG. A computer algorithm and a demonstrative example are given. The method of reliability evaluation developed in this paper, in contrast with previously published methods, gives the exact solution to the combinational logic circuit reliability-analysis problem. This is achieved by the proper

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gate/circuit modeling, which allows the enumeration of all redundant fault vectors in a given circuit. Due to the concept of dominance among fault vectors, the number of necessary enumerations is appreciably reduced and thus circuits with a few tens of gates can be efficiently analysed.

Reliability modelling of redundant computer systems with common-cause failures. BALBIR S. DHILLON and SUaRANANYAMN. RAYAPATI. Comput. elect. Engng 14(3/4), 125 (1988). This paper presents a common-cause failure analysis of redundant computer systems. Three mathematical models representing a two-unit redundant computer system are developed. Computer system reliability, steady-state availability, mean time to failure and variance of time to failure formulas are developed. In addition, a general formula for redundant computer system steady-state availability is derived when the failed computer system repair times are described by Erlangian distribution. The computer system reliability, availability and mean time to failure plots are shown. Multistate Markov models for systems with dependent units. ANTONIN LESANOVSKY. IEEE Trans. Reliab. 37(5), 505 (December 1988). This paper deals with a system that can be described by a homogeneous continuous-time discretestate Markov process. The case when transition rates or each unit depend on the current state of the system is considered, The condition upon which the transition-rate matrix of the system has the form of a modified Kronecker sum of transition-rate matrices of its units is investigated. An algorithm for determining the transition-rate matrix of the system based on the Kronecker algebra is introduced. Its use is particularly efficient during construction of machines when reliability is evaluated for several systems with the same structure but different transition rates. Simple enumeration of minimal cutsets of acyclic directed graph. S. HASANUDDINAHMAD, IEEE Trans. Reliab. 37(5), 484 (December 1988). There are many methods to enumerate cutsets of acyclic directed graph. All of these involve advanced mathematics. This paper gives 2 methods which use combinations of nodes to enumerate all minimal cutsets. One simply has to enumerate all combinations of orders 1 to N - 3 of nodes from 2 to N - 1, where N is the toal number of nodes. Collecting only those symbols of links of first row of adjacency matrix and in the rows given in a combination which are not in the columns of the combination a cutset of an acyclic directed graph, having all adjacent nodes, is obtained. To obtain the cutsets of a general acyclic directed graph, four rules are given for deletion of those combinations which yield redundant and nonminimal cutsets. These rules provide a reduced set of combinations which then gives rise to minimal cutsets of a general graph. Three examples illustrate the algorithms. Modeling discrete bathtub and upside-down bathtub mean residual-life functions. FRANK MITCHELL GUESS and DONG HO PARK. IEEE Trans. Reliab. 37(5), 545 (December 1988). A useful function for analyzing burn-in, developing maintenance policies, or simply modeling lifetimes of equipment is the mean residual life function. Discrete data arise naturally in various ways: from discretizing or grouping continuous data, devices operate by "cycles" (e.g. a copier "cycle" is a copy, its "lifelength" the total number of copies), etc. This paper develops a general approach to modeling discrete bathtub and upside-down bathtub mean residual-life functions. Because the approach allows parametric modeling of the mean residuaMife, maximum likelihood estimation of models can be done. This will enable estimation of such parametric models for complete discrete data, as well as right censored discrete data. A simple, perhaps surprising, example is presented where the mean residual-life increases, then decreases; however, the hazard

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World Abstracts on Microelectronics and Reliability

rate also increases, drops suddenly at one cycle, then increases again. We discuss two reasonable industrial explanations of such unusual behavior. Measures of testability for automatic diagnostic systems. NAEL A. E. ALY and ADEL A. ALY. IEEE Trans. Reliab. 37(5), 531 (December 1988). This paper presents as investigation into the evaluation models of automatic diagnostic systems taking into consideration their imperfections such as failure to diagnose, incorrect isolation, false alarms, and can-not duplicate. Three measures of effectiveness are developed that enable the decision maker to assess accurately the real capability of the diagnostic system, and to evaluate and compare the performance of alternative automatic diagnostic systems based on their mean life-cycle cost. Analytic procedures for using these measures are developed, and an example is presented. Our conclusions are: • The capability and performance of automatic diagnostic systems can be assessed using three measures of effectiveness: false removal (7 error), failure to diagnose (fl error), and false alarm correction (7)- The 7 error represents problems that arise from false alarms, the fl error measures the capability of correct diagnosis, and y measures the ability of the diagnostic system to correct its actions after indicating a false alarm. These measures show the accuracy and precision of the diagnostic system and cover its imperfections. • The three measures of effectiveness can be used to predict the mean life-cycle cost of automatic diagnostic systems, including the mean cost of imperfections of such systems. An efficient algorithm for computing global reliability of a network. S. P. JAIN and KRISHNA GOPAL. IEEE Trans. Reliab. 37(5), 488 (December 1988). Global reliability of a network is defined. It is evaluated using spanning trees of the network graph. An algorithm for generating spanning trees (termed, appended spanning trees) which are mutually disjoint is proposed. Each appended spanning tree represents a probability term in final global reliability expression. The algorithm thus directly gives global reliability of a network. It is illustrated with an example. The algorithm is fast, requires very little memory, is adaptable to multiprocessors, and can be terminated at an appropriate stage for an approximate value of global reliability.

Distribntion of residual system-life after partial failures. JANUSZKARPINSKI. IEEE Trans. Reliab. 37(5), 539 (December 1988). This paper presents a general method to determine the distribution of residual system life (RSL) of a coherent system after some partial failures. The RSL begins once all the system components of at least one member of the well-defined set of residual life sets have failed. The approach is based on the knowledge of a special distribution of component lives and system life. It is general with respect to statistical dependence of system component states, unless cold standby is included, It can be applied to any coherent system and can be useful for solving problems of safety forecasts for nuclear power plants, chemical systems, and other potentially dangerous (environmentally) systems. A computer program has been written that permits practical application of the method. The process of determining the distribution of the RSL is generally useful for theoreticians. Analytic and numerical examples of the method are included. Qualitative properties of profit-making k-out-of-n systems subject to two kinds of failures. RAAJKUMARSAH and JOSEPH E. ST1GLITZ. IEEE Trans. Reliab. 37(5), 5i5 (December 1988). This paper derives several properties of the optimal k-out-of-n systems where: I) the i.i.d, components can be, with a pre-specified frequency, in one of two possible modes, 2) components are subject to failures in each of the two modes, and 3) the costs of two kinds of system failures are not necessarily the same. A characterization of the optimal k which maximizes the mean system-profit is obtained (a special case of this optimization criterion is the maximization of system reliability). We show how one can predict, based directly on the parameters of the system, whether the optimal k is smaller or larger than ~n. Also, the directions of change in the optimal k resulting from changes in system parameters are ascertained. A sub-class of our formulation and results corresponds to the case examined in the literature in which the optimal k is chosen to maximize the system's reliability. The phoenix of functional test. STEPHEN F. SCHEIBER, TesI Measure. World 57 (February 1989). The re-emergence of functional testing has renewed clamor to solve the problems that led to its fall from grace.

4. M I C R O E L E C T R O N I C S - - G E N E R A L Hazardous waste control: reducing, recycling and reacting. KATHLEEN M. KEARNEY. Semicond. Int. 78 (October 1988). The semiconductor industry responds to regulations concerning the disposal of hazardous waste. Application specific LSIs for specialized and short-life products enjoy an expanding market. JEE (Japan) 28 (January 1989). As the miniaturization and efficiency of electronic applicances advance, the gate array market for custommade LSIs for specialized and electronic products with short lifespans is expanding rapidly. Although not as dramatic as the DRAM market, the demand for application-specific integrated circuits (ASICs) is steadily increasing. The biggest demand is for gate arrays. Although ASIC production is a small percentage of total IC output, as lifecycles of electrical products shorten, it is expected that the ASIC market will grow. As gate array technology advances, the improvements in CAD tools that require gate arrays will occur very quickly. In addition, advances in designer expertise are expected. New testing devices are responding to higher performance in megabit age. JUNJI NISHIMURA. JEE (Japan) 96 (January 1989). The main issues encountered in testing LSI memories in the megabit age are how to cope with time constraints as

the size of memory increases and how to respond to the high-speed devices. Two memory testers, the T5361, which is equipped with two PG, TG and VRAM emulators for operation at 60 MHz, and the T5331P for testing large-scale high speed memories of lM-bit and 4M-bit DR~Ms for operation at 30 MHz, have been developed by Advantest Corp. This article explains these two memory testers. Optics and electronics are living together. JUN SHIBAIA and TAKAO KAJIWARA. IEEE Spectrum 34 (February 1989). Compound-semiconductor ICs, now reaching the market, offer compact, performance-enhancing alternatives to conventional circuits in fiber communication systems, Microcircuit Engineering '88. A report on the 14th International Conference on microfithography and related sectors, held from September 20 to 22, 1988 in Vienna. D. S~SC~KA. Feinwerktechnik & Messtechnik 97(1-2), 39 (1989). (In German.) The conference, which this time had been organized by the Erwin Schr6dinger Gesellschaft ffir Mikrowissenschaften in connection with the Austrian Ministry of Science and Research, gave over 300 scientists from all over the world the opportunity tO discuss the most recent developments and trends on the sector of microstructure technology. The scientific program was subdivided