Simulation of a PCB assembly line: A modified JIT approach

Computers ind. Engng Vol. 17, Nos 1-4, pp, 136-141, 1989 Printed in Great Britain. All rights reserved

0360-8352/89 $3.00+0.00 Copyright © 1989 Pergamon Press plc

SIMULATION OF A PCB ASSEMBLY LINE: A MODIFIED JIT APPROACH

Hsiang-Kuan Kung Wang Laboratory Inc. 836 North Street Tewksbury, MA 01876

Chaweng Changchit Dept. of Management/Marketing Northern Kentucky University Highland Heights, KY 41076

ABSTRACT In this paper, a simulation model of an existing printed circuit board (PCB) assembly line is developed in an attempt to identify strategies which tend to improve the system performance. The model is based on the concept of the JIT (Just-ln-Time) production approach. Parameters investigated include sequencing rules, lot sizes, number of Kanbans used, and number of PCB types. KEYWORDS

Printed Circuit Board,

Just-In-Time,

Simulation.

INTRODUCTION In today's highly competitive electronics industry, a company must be able to adapt to its customers' changing needs in order to survive. It is crucial to quickly and successfully respond to such challenges as rapid changes in technology, demand fluctuations, and design changes. These challenges are obviously related to the production functions of the company and can be translated more directly in terms of: quality, delivery, cost, and flexibility. Printed circuit board (PCB) manufacturing is characterized as highly capital and labor intensive. It is a complex process which involves several operations including mechanical, chemical, and photographic techniques. A typical PCB assembly line is usually required to produce several hundred PCB types. The large variety of product mix, together with complexities of circuits and processes, are the cause for large fluctuations in processing times. In addition to this, the strict requirement on operation precedences makes the facility layout process of the problem highly inflexible [5]. Thus, a PCB assembly line, if not carefully designed, may suffer from poor system performances with respect to one or more of the quality, delivery, cost, and flexibility goals. In this paper, we proposed the use of simulation to identify possible improvements of an existing PCB assembly line. The model is based on the JIT (Just-ln-Time) production concept, that is, components of JIT which have desirable effects on the system performance will be adopted in the model. Various parameters to be investigated in the simulation experiments include: the use of Kanbans to control production activities, lot sizes, sequencing rules, and the product mix. JIT PRODUCTION

SYSTEM

The JIT production concept has gained much attention from researchers and practitioners in the field of production and operations management since its first introduction several years ago. It may be considered as a technique that attempts to reduce production costs, eliminating wastes, and making best use of workers' abilities. The main emphasis of JIT is to produce the right part at the right time and in the right amount. In order to achieve this, JIT concentrates on reducing the inventory to its minimum level. In contrast to the traditional "push" production system (in which parts are pushed through the system according to the specified schedule), JIT is considered to be the "pull" approach. That is, a work station will withdraw exactly the amount of needed materials from its preceding work station when production is required. As a rule, a work station is not supposed to produce any part unless it is needed at the succeeding work station. In JIT, the demand at the last work station of the production line is the parameter that dictates the production activity at each work station. Usually, Kanbans (Japanese word for cards) are 136

Kung and Changchit: Simulation of a PCB assembly line

137

used as the aid to control the p r o d u c t i o n and w i t h d r a w a l activities in the system. D e t a i l e d d e s c r i p t i o n s of JIT are covered in several references such as Monden [6], S c h o n b e r g e r [7], and Sugimori et al. [8]. Most of the JIT a p p l i c a t i o n s to date tend to be in high volume type of p r o d u c t i o n such as a u t o m o b i l e (eg. General Motors, Ford, Chrysler), e l e c t r o n i c s (eg. General Electric, Yamaha, W e s t i n g h o u s e ) , and computer (eg. H e w l e t t - P a c k a r d , Texas Instruments) industries, among others. This is due to the belief that JIT is m o s t suitable to p r o d u c t i o n e n v i r o n m e n t s with r e l a t i v e l y stable demand and small v a r i a b i l i t y in process times. However, JIT is also r e c e n t l y adopted in other e n v i r o n m e n t s such as services and small companies, with varied degree of success. Finch and Cox [2] pointed out that JIT c o n s i s t s of several c o m p o n e n t s w h i c h are: focused factory, reduced setup times, group technology, total p r e v e n t i v e m a i n t e n a n c e , c r o s s - t r a i n e d employees, u n i f o r m work loads, JIT delivery, and Kanban m e t h o d of p r o d u c t i o n control. They r e c o m m e n d e d that although small companies may not be able to adopt the w h o l e JIT concept, several c o m p o n e n t s such as reduced setup times, total p r e v e n t i v e m a i n t e n a n c e , c r o s s - t r a i n e d workers, and focused factory can also lead to improved system p e r f o r m a n c e s . Thus, part of the total JIT concept should be c o n s i d e r e d rather than the " a l l - o r - n o t h i n g " approach. Huang et al. [4], based on the results from their s i m u l a t i o n e x p e r i m e n t s on a multi-line, m u l t i - s t a g e JIT p r o d u c t i o n system, also provided a similar recommendation. Recently, Gravel and Price [3] reported the a p p l i c a t i o n of JIT with Kanban to a job shop system. In contrast to the earlier belief that the use of Kanban in c o n t r o l l i n g p r o d u c t i o n a c t i v i t i e s is not suitable to a job shop, they r e p o r t e d c o n s i d e r a b l e improvements in terms of throughput, m a c h i n e utilization, and average WIP inventory in their experiments. SYSTEM D E S C R I P T I O N An earlier version of this system is p r o v i d e d in Cross [i]. In his paper, he d i s c u s s e d several concepts which include the U - l i n e / w o r k cell layout, q u a l i t y at the source, j u s t - i n - t i m e production, and worker flexibility, w h i c h w e r e adopted in order to s i m p l i f y the system. Based on an actual experiment, the project was considered successful since s i g n i f i c a n t i m p r o v e m e n t s w e r e achieved. T h r o u g h p u t time and the WIP level were reduced to under 3 days rather than the p r e v i o u s average of about 20 days. The number of d e f e c t i v e boards was also reduced by 30 %. In our study, we feel that the system can be a n a l y z e d in more details by the use of simulation experiments. Thus, effects of various control p a r a m e t e r s may be investigated without a c t u a l l y d i s r u p t i n g the system. The system consists Of four identical a s s e m b l y lines and work loads are a s s i g n e d to each of them a c c o r d i n g to the master plan derived from the MRP routine. There are 8 d i f f e r e n t cells in each line as illustrated in Figure I. Raw circuit boards first enter the s y s t e m at one of the DIP m a c h i n e s where integrated circuits are inserted. A c c o r d i n g to the specified routing, each board then p r o c e e d s to either the RAD or VCD machines. The next three cells are s e m i - a u t o insertion, manual assembly, and manual wiring. Currently, the system has only one wave solder m a c h i n e to be shared by the four lines. Thus, this process is usually c o n s i d e r e d a b o t t l e n e c k and must be c a r e f u l l y s c h e d u l e d in order to avoid u n n e c e s s a r y "blocking" or "starving". Any additional parts that cannot be p r o c e s s e d through the wave solder m a c h i n e may be m a n u a l l y inserted. The c o m p l e t e d boards are then checked at the incircuit test process. Those that do not pass the test are analyzed and repaired at the fault analysis cell. They are then checked again at the incircuit test. In c o n t r a s t to the p r e v i o u s p r a c t i c e of "quality by inspection", the current system adopted the JIT p h i l o s o p h y of "quality at the source". That is, workers are r e s p o n s i b l e for their own quality, and are e n c o u r a g e d to stop the line if q u a l i t y was found to be unacceptable. This seems to have a d r a m a t i c effect on the product q u a l i t y since the average passing rate at the incircuit test is now e x c e e d i n g 90%. The idea of c r o s s - t r a i n e d workers coupled with the U-line layout is also viewed favorably since it allows workers who can handle several tasks to m o v e around in order to relieve b o t t l e n e c k s . Furthermore, with proper scheduling, it is felt that smaller lot sizes may be possible, thus, increasing the system flexibility. However, the r e l a t i v e l y large setups required in the current system, as compared to p r o c e s s i n g times, may have to be reduced before any s i g n i f i c a n t improvement based on smaller lot sizes could be realized.

138

MODEL

Proceedings of the 1l th Annual Conference on Computers & Industrial Engineering

DESCRIPTION

The model was d e v e l o p e d using the W I T N E S S s i m u l a t i o n F o l l o w i n g s are a s s u m p t i o n s and r e q u i r e m e n t s of the model:

language

[9].

i. Each board must be c o m p l e t e l y p r o c e s s e d b e f o r e leaving the system. Thus, all parts r e q u i r e d must be available, otherwise, there is no need to start the process. 2. M a c h i n e s are assumed to function p r o p e r l y t h r o u g h o u t the shift. The events of m a c h i n e b r e a k d o w n and m a i n t e n a n c e s c h e d u l e are not c o n s i d e r e d in the model.

INCIRCUIT TEST

POST I

l

,m, q

I

8

'

'

"3

r-

i-i-I'' I

1

'

'

I

I

I

L ....

MANUAL ASSEMBLY

SEMI-AUTO

F---I

I- . . . .

''FN I '1'

I

I'

'Lo r@ d

AUTO-INSERTION

-I I-

I'

'

I

I

L -" -" _ _ MANUAL WIRING

FAULT ANALYSIS

-I

I

FIGURE 1. SYSTEMFLOW CHART

3. Each lot is s e l e c t e d for p r o c e s s i n g a c c o r d i n g to a given s e q u e n c i n g rule. Once a PCB lot enters the system, it must be p r o c e s s e d by a series of m a c h i n e s w i t h o u t any i n t e r f e r e n c e from other board types. The line may be c o n s i d e r e d as a c o n t i n u o u s flow in w h i c h one type of boards is c o n t i n u o u s l y p r o c e s s e d in each cell until it is c o m p l e t e l y done b e f o r e other PCB types are allowed to enter the cell. This p o l i c y is adopted in order to reduce the effect of setup times. 4. Only one set of p r o d u c t i o n and w i t h d r a w a l Kanbans is used b e t w e e n any two s u c c e s s i v e s t a t i o n s r e g a r d l e s s of PCB types. Since a PCB lot is not allowed to mix with other type, it is not n e c e s s a r y to d i f f e r e n t i a t e Kanbans among various products. Thus, the main p u r p o s e of using Kanbans in the a s s e m b l y line is to p r o v i d e a control m e c h a n i s m for p r o d u c t i o n a c t i v i t i e s in the system. In a d d i t i o n to this, a "signal" K a n b a n will be used to i n d i c a t e the type of board w h i c h is c u r r e n t l y p r o c e s s e d in each cell. The s i m u l a t i o n e x p e r i m e n t s in this study is b a s e d on one of the four identical a s s e m b l y lines. The data used in this paper have been altered in order to p r o t e c t the c o m p a n y ' s security. In a given year, the system m a y need to process several h u n d r e d PCB types. Usually, b o a r d s which are h i g h l y similar may be grouped together, and those boards with low volumes may be o c c a s i o n a l l y subcontracted. In the a s s e m b l y line to be analyzed, we assumed that there are 15 m a x i m u m p o s s i b l e PCB types to be processed. Each board type has a s p e c i f i c routing a c c o r d i n g to the eight cells in the line. P r o c e s s i n g times are assumed to be n o r m a l l y d i s t r i b u t e d with r e l a t i v e l y low standard deviations. Several setup types which depend on the board type are used. The

Kung and Changchit: Simulation of a PCB assembly line

139

system is operated based on a 4 8 0 - m i n u t e shift per day. Parameters to be i n v e s t i g a t e d in various s i m u l a t i o n e x p e r i m e n t s are s e q u e n c i n g rules, number of Kanbans used, lot sizes, and the product mix. The system p e r f o r m a n c e is m e a s u r e d by system utilization, q u e u e length and time, W I P inventory, and job throughput. RESULTS AND D I S C U S S I O N Sequencing Rule Three s e q u e n c i n g rules used to d e t e r m i n e job p r i o r i t i e s are c o m p a r e d in this experiment. The first rule belongs to the SPT (Shortest P r o c e s s i n g Time) group and is referred to as SPT/SETUP/LATE. As m e n t i o n e d earlier, the current s y s t e m involves large setup times with r e l a t i v e l y small p r o c e s s i n g times, thus, a high p r i o r i t y should be given to jobs with same or similar setups. In a d d i t i o n to this, any job that cannot be p r o c e s s e d a c c o r d i n g to the schedule is c o n s i d e r e d late and will be a s s i g n e d the highest p r i o r i t y in the n e x t shift. Thus, this rule is a t r u n c a t e d - S P T rule in w h i c h SPT is used as long as there is no late job, or no job which is the same as, or h i g h l y similar to, the job p r e v i o u s l y processed. SPT will also be used as a tie breaker if there is m o r e than one late job or similar job. The second rule is HIF (Hot Item First) w h i c h reflects some degree of expediting. In our simulation, "hot items" are g e n e r a t e d randomly a c c o r d i n g to the h i s t o r i c a l data. The third rule to be i n v e s t i g a t e d is FCFS (First-Come-First-Serve) w h i c h is quite popular due to its s i m p l i c i t y and practical appeal. The results o b t a i n e d from this experiment are given in Table i. The data used in this case are 5 PCB types and 3 Kanbans. The lot sizes for the five PCB types are fixed at 20, 15, 25, 30, and 35. F r o m the table, the SPT/LATE/SETUP rule tends to be m o r e e f f e c t i v e than the other two rules in terms of u t i l i z a t i o n , flow time, q u e u e parameters, and WIP inventory. The a v e r a g e s y s t e m u t i l i z a t i o n is around 59%. B o t t l e n e c k s usually occur at the first cell since several jobs may arrive s i m u l t a n e o u s l y and almost all the boards need to be p r o c e s s e d in this cell. The u t i l i z a t i o n for this cell is u s u a l l y in the 75-85% range. Similarly, the wave solder m a c h i n e also has a high u t i l i z a t i o n rate since it is shared among four a s s e m b l y lines. Similar results in regard to the three s e q u e n c i n g rules were also o b t a i n e d with other c o m b i n a t i o n s of Kanbans, product mix, and lot size. The d i f f e r e n c e among these rules tend to be more s i g n i f i c a n t when the product mix is increased. In most cases, FCFS tends to be the least e f f e c t i v e rule. Table 1: Effectiveness of Sequencing Rules

Sequencing

AverageSystem

Average FlowTime

Rule

Utilizstion(%)

SPT/LATE/SETUP

QueueParameters

(airs)

Mean (Units)

Max Time (Units) (Mins)

58.87

286.39

3.92

18.82

15.59

14.93

HIF

52.79

299.37

4.32

21.36

16.87

16.56

FCFS

47,54

302,32

5.56

26.48

17,27

15.74

Average

WIP

Lot Size and Number of Kanbans In this experiment, we investigated the effect of lot size on the system performance. The s e q u e n c i n g rule is S P T / L A T E / S E T U P and there are 5 PCB types in the system. Figures 2 show plots of the average flow time against various number of Kanbans used a c c o r d i n g to three lot sizes (5, 15, and 30). As w i d e l y believed, the ideal lot size for a h i g h l y f l e x i b l e system is one. However, in this situation, a lot size of 5 w o u l d be c o n s i d e r e d very small and would tend to reduce the system effectiveness. With this lot size, the a v e r a g e flow time is at a very high level of around 2~00 m i n u t e s when only one Kanban is provided. However, it is reduced e x p o n e n t i a l l y with more Kanbans and tends to remain stable at around 7~0 m i n u t e s when six or more Kanbans are used. The other lot sizes of 15 and 30 also have similar effect

140

Proceedings of the 1lth Annual Conference on Computers & Industrial Engineering

on the average flow time but with much less s e n s i t i v i t y to the number of Kanbans. Similar o b s e r v a t i o n s can also be m a d e from F i g u r e 3, which shows plots of the average system u t i l i z a t i o n against the number of Kanbans for the three lot sizes. Lot size of 30 has the h i g h e s t u t i l i z a t i o n rate since it tends to require less setups. It is also more sensitive to a very low number of Kanbans. For this experiment, the most a p p r o p r i a t e number of Kanbans is six. Product Mix and Number of Kanbans The last experiment in this study involves the effect of product mix on the system behavior. The s e q u e n c i n g rule is again S P T / L A T E / S E T U P w h i c h should have m o r e impact in situations with large product variety. The lot size used in this case is 15, a typical lot size for m a n y products. Figures 4 and 5 p r o v i d e the c o m p a r i s o n of 5, 10, and 15 PCB types. As shown in Figure 4, the system flow time tends to increase w i t h the product mix. However, with sufficient number of Kanbans, the d i f f e r e n c e in flow time b e c o m e less significant. F r o m F i g u r e 5, the system u t i l i z a t i o n may be increased by increasing the number of PCB types up to a certain level where there is only small increase in the utilization. Based on the set of p a r a m e t e r s used in this experiment, the system seems to handle the case of 15 board types r e a s o n a b l y well. This product mix f l e x i b i l i t y may be further improved if setup times can be reduced to their a b s o l u t e minimums. Averwe System

I004.

Utazatlon i~,)

avwatDe Row

TN tM,m)

~

i

LolIbe. 30

ze.5

F ' " - - Lot~ t - tS

k,......_ tot ~z,, s

I

I

l

I

I

I

I

I

I

t

1

2

|

4

|

I

r

6

i

10

II Hut~Ol el KwLbans

I

I

i

I

I

I

i

I

I

2

3

4

5

i

1

o

9

tO

N u n ~ el Klmbanl I'-

Figure 3 Effect el Lot Size and Nund~er of Kanbans on Average System Utilization

Figure 2. Ellect of Lot Size and Humber el Kaud)ans on Average Flow Time A¥oragl

SVstOm tH|zNkm

xvtm~ Row 11m

18 PC9 Typll

~

S +"

. i i l [ l l [ l l l 1 | ~ 4 i l 7 | 9 1 0

Figure 4. Effect el Product Mix and Number of Kanbans on Average Ftow Time

I t

I I

I 3

. . . - ~ 15 PC9 Types

L_o ,P Tc~,.

"+ ~....JPCOTyZpea

i 4

I 6

I I

I r

I I

I o

i Io

Ip 14~

ol K I I ~

Figure 5, Elleot of Produ,ct Mix and I'lu.ter of Kanbam on Average System Utilization

Kung and Changchit: Simulation of a PCB assembly line

141

CONCLUSION In this paper, we presented a simulation model of an existing PCB assembly line. The model is based on the JIT production concept, with some modifications made in order to reflect the system characteristics. With the model, much more insight can be gained by investigating the system behavior according to several control parameters. Some general conclusions which may be made from this preliminary study are: i. The SPT/LATE/SETUP rule seems to be more effective than the expediting rule of HIF and the commonly used of FCFS rule. 2. Small lot sizes tend to reduce the system effectiveness, especially with very low number of Kanbans used. Larger lot sizes are, however, less sensitive to the increased number of Kanbans. 3. Larger product types tend to improve the system utilization but also tend to increase the flow time. Increasing the number of Kanbans, up to certain point, has positive effect on the system performance especially in the case of high product mix. REFERENCES

[i] Cross, K.F. (1988), Wang Scores 'EPIC' Success with Circuit Board Assembly Redesign, Industrial Engineering, 52-56. [2] Finch, B. J. and Cox, J. F. (1986), An Examination of Just-In-Time Management for the Small Manufacturer: with an Illustration, International Journal of Production Research, 24, 329-342. [3] Gravel, M. and Price, W. L. (1988), Using the Kanban in a Job Shop Environment, International Journal of Production Research, 26, 11051118. [4] Huang, P. Y., Rees, L. P., and Taylor III, B. W. (1983), A Simulation Analysis of the Japanese Just-In-Time Technique (with Kanbans) for a Multiline, Multistage Production System, Decision Sciences, 14, 326-344. [5] Lin, L. and Cochran, J. F. (1987), Optimization of a Complex Flow Line for Printed Circuit Board Fabrication by Computer Simulation, Journal of Manufacturing S[stems, 6, 47-57. [6] Monden, Y. (1983), Toyota Production System, Management Press, Atlanta, Georgia.

Industrial Engineering and

[7] Schonberger, R. J. (1982), Japanese Manufacturing Techniques: Hidden Lessons in Simplicity, Free Press, New York.

Nine

[8] Sugimori, Y., Kusunoki, K., Cho, F., and Uchikawa, S. (1977), Toyota Production System and Kanban System: Materialization of Just-In-Time and Respect for Human System, International Journal of Production Research, 15, 6, 564-594. [9] WITNESS User's Manual BIOGRAPHICAL

(1987), ISTEL Corp., Burlington,

MA.

SKETCH

Hsiang-Kuan Kung is a Manufacturing Engineer at Wang Laboratory, Inc. He holds the M.S. and Ph.D. degrees in Industrial Engineering from the University of Rhode Island and Oklahoma State University, respectively. He was an Assistant Professor in the Department of Industrial Engineering and Information Systems at Northeastern University prior to joining the Wang Lab. His research interests include CIM, CAPP, and JIT production system. He is a member of lIE and Alpha Pi Mu. Chaweng Changchit is an Assistant Professor in the Department of Management and Marketing at Northern Kentucky University. He obtained a B.E. degree in Industrial Engineering from the University of New South Wales, Australia. His M.S. and Ph.D. are both in Industrial Engineering from Oklahoma State University. His research interests include of multiobjective decision- making process, flexible manufacturing systems, group technology, and system analysis in water resources systems. He is a member of IIE, Alpha Pi Mu, TIMS, and APICS.