Temperature coefficient of resistance for p- and n-type silicon

Temperature coefficient of resistance for p- and n-type silicon

MiC:RO"EL:ECTRON|CS World Abstracts Papers published in 1975-1980 which are considered to be of technical merit will be abstracted by Charles E. Jowet...

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MiC:RO"EL:ECTRON|CS World Abstracts Papers published in 1975-1980 which are considered to be of technical merit will be abstracted by Charles E. Jowett and published in this, a nd subsequent issues of Microelectronics Journal. Abstracts in this issue comprise papers published in 1978. They are classified under the following headings: Integrated Circuit Technology Memories Microprocessors Optoelectronics Hybrids Discrete Devices Charged Coupled Devices Materials Production and Processing Testing Applications It is the intention, in successive issues of the Journal, to bring the paper abstracts up-to-date, presenting the reader with an easy reference to many of the important papers which have been published in journals throughout the world.

1.

Hybrids

Temperature coefficient of resistance for p- and n-type silicon P. N O R T O N and J. BRANDT Solid-St. Electron., 21, p.969 (1978). The temperature coefficient of resistance for n- and p-type silicon has been calculated between - 5 0 and 125°C for a wide range of concentrations and levels of compensation. These results provide a useful guide for the design of silicon integrated resistors. Solderable low contact resistance metallisations for PTC thermistors S. M. MARCUS and F. K. PATTERSON Proc. IEEE 28th Electron. Components Conf., Anaheim, 24-26 April 1978, p.80. Barium titanate-based PTC ceramic bodies exhibit high contact resistance when terminated with conventional noble metal thick film conductors. The mechanism for this contact resistance and typical multistep terminating procedures to provide solderable ohmic contacts are reviewed. The development of thick film silver conductors to provide solderable ohmic contacts are reviewed. The development of thick film silver conductors to provide soldrable ohmic contacts in a single-step process is described. Pertinent performance data are presented.

High temperature properties of solid tantalum chip capacitors D. G. THOMPSON and S. G U N N A L A IEEE Trans. Parts, Hybrids, Packaging PHP.13(4), p.390 (1977). The use of tantalum chip capacitors in conjection with hybrid circuitry requires stable capacitor characteristics that will withstand the stresses of component attachment, testing, and circuit operations. A line of miniature tantalum chip capacitors is discussed with emphasis on materials, constructional methods, and resultant performance of the devices under environmental and operational conditions.

Results of exposure to high temperature attachment conditions are presented with details of impedance and dissipation factor characteristics as well as other traditional capacitor parameters. A thick film capacitive temperature sensor S. L E P P A V U O R I and P. NIEMELA

Proc. IEEE 28th Electron. Components Conf., Anaheim, 24-26 April 1978, p.47. The use of thick film capacitors for temperature measurement is a new application of thick film materials. In this study sensors have been made based on barium strontium titanate materials. The reactance of capacitors made with such a material is proportional to temperature. By adjusting the composition of the sen/ior material, the minimum temperature of the sensing range can be varied between - 180°C and + 1800C. Over a temperature range of 100°C the maximum change in reactance of the sensor is 65% and the uncertainty of measurement due to non-linearity is 1.5°C. The encapsulations used give an uncertainty of measurement due to instability of less than 2°C.

Lead forming and outer lead bond pattern design of tape bonded hybrids W. R. R O D R I G U E S de MIRANDA. R. G. OSWALD and D. BROWN Proc. IEEE 28th Electron. Components Conf., Anaheim, 24-26 April 1978, p. 159. Recent progress in Tape Automated Bonding (TAB) technology has made it possible to automate the hybrid assembly process. Because hybrid production runs are usual!y made in relatively low quantities, at least as compared to monolithic circuits, some basic aspects of such automation must now be faced. Because if the cost of TAB assembly tooling high and the number of different chip sizes, a measure of standardisation must be introduced to make TAB technology economically feasible. That is, the largest potential cost advantage, testing of chips prior to assembly, must not be offset by unduly high costs for T A B tooling.

MICROELECTRONICS JOURNAL Vol. 11 No. 3 ~c~1980 Mackintosh Publications Ltd., Luton.

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