Microelectronics Reliability 46 (2006) 440–448 www.elsevier.com/locate/microrel
Thermal resistance analysis and validation of flip chip PBGA packages Kuo-Ming Chen a
a,*
, Kuo-Hsiung Houng b, Kuo-Ning Chiang
c
United Microelectronics Corporation, No. 3, Li-Hsin Rd. II, Hsinchu Science Park, Hsinchu 300, Taiwan, ROC b TwinMos Technology Inc., Corporation, Taiwan, ROC c Department of Power Mechanical Engineering, National Tsing Hua University, Taiwan, ROC Received 7 March 2005; received in revised form 9 May 2005 Available online 22 July 2005
Abstract This work proposes a finite element numerical methodology to predict the thermal resistance of both flip chip-plastic ball grid array (FC-PBGA) with a bare die and FC-PBGA with a metal cap. The 3D finite element model was initially constructed to simulate the thermal resistance of FC-PBGA. A thermal resistance experiment was performed to verify the FEM results, following the construction of specimens of FC-PBGA with a bare die and with an aluminum cap, using six-layered substrate. The verified finite element model was employed to determine the thermal resistance of FC-PBGA with a copper cap using four-layered and six-layered substrates. Experimental results demonstrated that FC-PBGA with a metal cap improves thermal performance by 35% over with a bare die. FC-PBGA with a copper cap slightly improves thermal performance from 2% to 2.8% over that of FC-PBGA with an aluminum cap. The thermal resistance of FC-PBGA with a four-layered substrate is reduced by 4.0% to 5.9% from that of FC-PBGA with a sixlayered substrate, since the four-layered substrate contains less metal. The finite element numerical results negligibly differ from the experimental results by 6% to 8.1%. A finite element numerical methodology is here proposed to predict the thermal resistance of FC-PBGA. The methodology is effective in researching and developing new products or improving existing packages. 2005 Elsevier Ltd. All rights reserved.
1. Introduction Flip chip package meets the requirements of advanced semiconducting devices because of its higher I/O density, better electrical performance, easier thermal management, and smaller footprint than other types of package. Heat must be immediately dissipated from a die through a package to maintain the reliability and * Corresponding author. Tel.: +886 3 578 2258x31335; fax: +866 3 577 7336. E-mail address:
[email protected] (K.-M. Chen).
functionality of a device. Thermal resistance is the principal index that indicates the capability for thermal dissipation. Thermal resistance of package is determined in two ways. One is to perform an experiment using a thermal test chip. The other is to perform analysis using simulation and modeling tools, for example the finite element method (FEM) and computational fluid dynamics (CFD). Thermal resistance measurements were made to investigate the effects of physical parameters like pressure, temperature and studied power on the thermal performance of the material of nickel-plated surface [1]. The thermal test chip in wire-bond package has been
0026-2714/$ - see front matter 2005 Elsevier Ltd. All rights reserved. doi:10.1016/j.microrel.2005.06.001
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extensively applied in measuring thermal resistance, since it can be easily used for a wide range of bonding pad pitch, bonding pad number, substrate or lead frame dimension, and package type. However, the bonding pad pitch and bonding pad number of a flip chip package must comply fully with the thermal test chip. Therefore, the thermal resistance measurement of flip chip package is more difficult, complex and expensive than that of wire-bond package. Ammous et al. [2] presented the behavioral thermal model of discrete power semiconductor packages is presented. Its main interest is the use of the thermal transient impedance as input data. Such data are obtained by means if experimentation or computed from manufacturer data-sheets. Zhang et al. [3] reported the characterization of air-cooled vapor chamber heat sink (VCHS) and liquid cooled heat sinks (LCHS) for electronic packages with a targeted power dissipation of 140 W. The test vehicle is 12 mm · 12 mm FCPBGA. Hwang [4] investigated the thermal features of flip chips on FR-4 boards by considering five thermal design variables, using the CFD. Lee [5] presented a thermal enhancement model of a 279 I/Os flip chip PBGA package, using the CFD and then used a model to examine the effect of various enhancement techniques. Shidore et al. [6] proposed compact thermal model topologies in CFD for flip chip PBGA. Joiner et al. [7] compared the thermal performance of 360-ball 25 mm · 25 mm flip chip package between plastic laminate substrate ceramic substrate using finite element analysis. Bhowmik et al. [8] studied the transient natural convection heat transfer from an array of four in-line, flush-mounted simulated chips in a vertical up-flow rectangular channel during power-on transient operation to determine the overall heat transfer coefficient. This study proposes a FEM methodology to predict the thermal resistance of a flip chip package. Flip chip thermal resistance is analyzed by considering different control variables. These variables include the power load, substrate layer, and metal cap material in the work. The functionality of the metal cap promotes thermal dissipation, protects the chip from cracking and improves the warpage of the package. The thermal dissipation of the flip chip package is easily managed because the metal cap is directly attached to the backside of the chip through thin gap filler, thereby decreasing thermal resistance. The heat transfer coefficient was initially introduced to determine the temperature distribution of package. The 3D finite element model was then constructed for thermal resistance analysis of FC-PBGA with a bare die, and FC-PBGA with a metal cap. Analysis of both packages involved a six-layered substrate under natural convection conditions, and was performed using ANSYS software. The thermal resistance experiment was conducted on the constructed FC-PBGA with both a bare die and an aluminum cap, to verify the FEM results. The verified finite element model was employed
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to predict the thermal performance of FC-PBGA with a copper cap, and using four-layered and six-layered substrates.
2. Thermal resistance Thermal resistance is generally used to characterize the thermal performance of a package. Thermal resistance is defined in Eq. (1). hja ¼
Tj Ta PH
ð1Þ
where hja is the thermal resistance between the junction and the ambient environment (C/W); Tj and Ta are the chip junction and ambient temperatures (C), respectively, and PH is the chip power dissipation (W). The definition of thermal resistance is strictly valid for one component of the board.
3. FEM analysis A quarter of the finite element model is constructed here. Table 1 specifies the FC-PBGA package. Table 2 summarizes the material properties of the specimen. Figs. 1 and 2 depict the cross section and detail the dimensions, respectively, of FC-PBGA with a metal
Table 1 Package specification Items
Dimension
Package size Die size Solder ball diameter Solder ball pitch Bump diameter Bump pitch Standoff Thermal test board
37.5 mm · 37.5 mm · 1.75 mm 11 mm · 11 mm · 0.55 mm 0.76 mm 1.27 mm 0.13 mm 0.35 mm 0.1 mm 114.3 mm · 76.2 mm · 1.5 mm
Table 2 Material properties Items
K (W/m C)
E (MPa)
a (ppm/C)
m
Die Substrate Solder bump Solder ball Underfill Aluminum Copper Cap filler Thermal test board
150 0.34 50 50 0.7 155 393.3 3.05 0.39
169 540 18 617 6270 6270 5880/196 68 950 110 320 421.4 27 925
3.6 16 24 24 30/100 23 0.3 12/66 14
0.278 0.3 0.4 0.4 0.36 0.345 17.6 0.36 0.28
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with a metal cap, respectively. The heat transfer coefficients on the side surfaces are ignored since heat is dissipated through these surfaces are insignificant compare with the top and bottom surfaces of finite element models. The following formulas are used to obtain the values of hf and hr [9]. 0.25 TS TB ð2Þ hf ¼ 1.42 L Fig. 1. Cross section of FC-BGA with a metal cap.
cap. Fig. 3(a) and (b) presents finite element models of FC-PBGA with a bare die and FC-PBGA with a metal cap. The following boundary conditions were used in the work. Assume that both quarterly symmetrical surfaces in the FEM satisfy adiabatic conditions. The heat transfer coefficients are applied to all the surfaces of the flip chip package and to the thermal test board. Fig. 4(a) and (b) depicts each heat transfer coefficients (hi) of the FC-PBGA with a bare die and of the FC-PBGA
which hf is heat transfer coefficient due to convection, L is the distance from the bottom of the surface where the boundary layer starts, TS is the temperature at the surface of the model, and TB is bulk temperature of the adjacent fluid. The bulk temperature equals the ambient temperature in the case of a computer which is 45 C. hr ¼ reðT 2S þ T 2B ÞðT S þ T B Þ
ð3Þ
where hr is the heat transfer coefficient due to radiation, r is the Stefan–Boltzmann constant and equals 5.67 · 108 W/(m2 Æ K4), and e is surface emissivity.
Fig. 2. Dimension of FC-BGA with a metal cap (unit in mm).
Fig. 3. A quarterly FC-BGA FEM model. (a) 1/4 FEM mesh of FC-BGA with a bare die and (b) 1/4 FEM mesh of FC-BGA with a metal cap.
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the FEM numerical thermal resistance of FC-PBGA with a bare die and of FC-PBGA with a metal cap, from 2 W to 5 W. The FC-PBGA with a metal cap has thermal performance 34.4% to 35.3% better than that of FC-PBGA with a bare die, implying that the metal cap effectively improves thermal performance. Fig. 5(a)–(c) shows the FEM results of FC-PBGA with a bare die at 3 W and of FC-PBGA with an aluminum cap at 3 W and 5 W, respectively, using a six-layered substrate. Table 3 gives the FEM numerical thermal resistance of FC-PBGA with a bare die and of FC-PBGA with a metal cap, from 2 W to 5 W. The FC-PBGA with a metal cap has thermal performance 34.4% to 35.3% better than that of FC-PBGA with a bare die, implying that the metal cap effectively improves thermal performance.
4. Experiment
Fig. 4. Heat transfer coefficients of FC-BGA. (a) FC-BGA with a bare die mounted on thermal test board and (b) FCBGA with a metal cap mounted on thermal test board.
The emissivity is assumed to be 0.8 for a package at 45 C above ambient temperature, and radiating to a black enclosure. In every element the values of hf and hr are then determined by the following iterative method: (1) Assume an initial value h0f ; then, T 0S can be calculated from Eq. (2) and h0r can be obtained from Eq. (3). (2) ðT 0S ÞFEM can be obtained after substituting h0f , h0r into ANSYS software. (3) If jT 0S ðT 0S ÞFEM j 6 0.5 C, then h0f and h0r are solutions. (4) If jT 0S ðT 0S ÞFEM j > 0.5 C, then let T 1S ¼ ½T 0S þ ðT 0S ÞFEM =2 ; substituting T 1S into Eqs. (2) and (3), yields h1f and h1r . (5) Repeat the procedure from (2) to (4) until convergence. The values of hf, hr and TS are finally obtained, then yields the temperature distribution of the thermal resistance test specimen. Fig. 5(a)–(c) shows the results of the analysis of FC-PBGA with a bare die at 3 W and of FC-PBGA with an aluminum cap at 3 W and 5 W, respectively, using a six-layered substrate. Table 3 gives
The thermal test chip incorporate a heating element and typically, two independent methods for on-die temperature monitoring [10]. Fig. 6 displays the picture of thermal test chip. Table 4 lists the information of thermal test chip. Resistive heating is accomplished by driving a current through a doped silicon well between a pair of bus bars, labeled ‘‘Rs’’ and ‘‘Rf’’. The heating element resistance of the thermal test chip was approximately 60X. At the top and bottom of the die are a pair of pads, labeled ‘‘D’’ in the diagram, which connect a serial fivediode temperature sense network. A second temperature monitoring circuit uses a bridge network by connecting the ‘‘V’’ at the top of the die and the ‘‘G’’ at the bottom of the die with one sense pin ‘‘S’’ at the top of the die and the other sense pin ‘‘S’’ at the bottom of the die. The five-diode string from the center is duplicated in all four corners. The corner diode strings are connected in series such that each corner can be monitored individually while driven by a single current source. Numerous pads (labeled ‘‘S’’) can be used to sense the diode voltage. Figs. 7 and 8 show the top and bottom views of FCPBGA with a bare die and of FC-PBGA with a metal cap, respectively. The flip chip package was mounted on a thermal test board using surface mount technology (SMT). The thermal test board was a four-layered structure with dimensions, 114.3 mm · 76.2 mm · 1.5 mm (4.500 · 300 · 0.0600 ), which was shown in Fig. 9 [11]. The procedure by which thermal resistance was measured is as follows. (1) Calibration: Place the specimen into an oven chamber, and apply approximately 0.1 mA to the diode of the thermal test chip. Next, set the oven to three different temperatures (Ti) from room temperature (25 C) to around 100 C. The
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Fig. 5. FEM results of thermal resistance (6 L substrate). (a) FC-BGA with a bare die analysis result at 3 W, (b) FC-BGA with Al metal cap analysis result at 3 W and (c) FC-BGA with Al metal cap analysis result at 5 W.
Table 3 FEM results (unit in C/W) Items
Thermal load
FC-BGA (bare die) FC-BGA (Al metal cap) Enhancement
2W
3W
4W
5W
24.1 15.8 34.4%
23.7 15.5 34.6%
N/A 14.7 N/A
N/A 14.5 N/A
diode voltage (Vi) can be read at each oven temperature when heat transfer is in equilibrium. The relationship between the junction temperature of the thermal test chip (Tj) and the diode voltage (Vi) is expressed in Eq. (4). T j ¼ AV i þ B P P P 3 3 3 3 i¼1 T i V i i¼1 T i i¼1 V i A¼ P P 2 3 3 2 3 i¼1 V i i¼1 V i P P3 3 i¼1 T i A i¼1 V i B¼ 3
ð4Þ
Fig. 6. Thermal test chip picture.
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Table 4 Thermal chip information Items
Data
Chip thickness (lm) Metal thickness (lm) Metal composition Passivation thickness (lm) Passivation type Silicon orientation Silicon type
600–650 1.7 Al/Cu/Si 1 Nitride 1-1-1 P
Fig. 7. FC-BGA with a bare die diagram.
Fig. 9. Thermal test board picture.
Table 5 Experimental results (unit in C/W)
Fig. 8. FC-BGA with a metal cap diagram.
(2) Thermal resistance measurement: Place the specimen in a still air chamber, which must be a cubic enclosure of not less than 0.28 m3 (1.0 ft3) [11,12]. No radiation sources, other than the microcircuit under test, can be in the enclosure. Next, apply the specified power load (PH) to the thermal test chip. The diode voltage (Vi) and ambient temperature (Ta) can be obtained when the heat transfer is in equilibrium. Substituting the diode voltage (Vi) into Eq. (4), yields the junction temperature (Tj); thermal resistance can be calculated from Eq. (1). Table 5 summarizes the experimental thermal
Items
Thermal load 2W
3W
4W
5W
FC-BGA (bare die) FC-BGA (Al metal cap) Enhancement
25.7 16.8 34.6%
25.3 16.3 35.6%
N/A 16 N/A
N/A 15.7 N/A
Table 6 Comparison of FEM and experiment results (unit in C/W) Items
Thermal load
FC-BGA (bare die) FC-BGA (Al metal cap)
FEM Experiment Difference FEM Experiment Difference
2W
3W
4W
5W
24.1 25.7 6.2% 15.8 16.8 6%
23.7 25.3 6.3% 15.5 16.3 4.9%
N/A N/A N/A 14.7 16 8.1%
N/A N/A N/A 14.5 15.7 7.6%
resistance of FC-PBGA with a bare die, and of FC-PBGA with a metal cap from 2 W to 5 W.
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Table 7 Thermal resistance of different metal cap material and substrate layers (unit in C/W) Material
Substrate
Thermal load 3W
Aluminum
Copper
Enhancement (Al ! Cu)
4 Layers 6 Layers Enhancement 4 Layers 6 Layers Enhancement 4 Layers 6 Layers
16.1 15.2 5.6% 15.7 14.9 4.7% 2.5%
4W
5W
15.5 14.7 5.2% 15.2 14.5 5.9% 1.9%
15.1 14.5 4.0% 14.8 14.1 4.7% 2%
2.7%
2.8%
2%
Thermal Resistance (ºC/W)
30 FC-BGA (Al Cap, Experiment) FC-BGA (Al Cap, FEM) FC-BGA (Bare Die, Experiment) FC-BGA (Bare Die, FEM)
25 20 15 10 5 0 2W
3W 4W Applied Power
5W
Fig. 10. Comparison between FEM and experimental result (6 L substrate).
The FC-PBGA with a metal cap increases the thermal performance 34.6% to 35.6% more than that of FC-PBGA with a bare die.
The differences in both FEM and experimental results are 6.0% to 8.1%, confirming that the finite element model is highly accurate. Both FEM and experimental results show that a higher thermal load results in a lower thermal resistance, since increasing the thermal load increases junction temperature, and accordingly, the heat transfer coefficient. The higher heat transfer coefficient implies preferred thermal dissipation. FC-PBGA with an aluminum cap has a thermal performance significantly higher than that of FC-PBGA with a bare die, by 34.6% to 35.6%. This result indicates that the metal cap effectively improves thermal performance. When the area of the metal cap area is approximately 75% of that of the substrate, the thermal performance of FC-PBGA with a copper cap is slightly increased by 2% to 2.8% over that of FC-PBGA with an aluminum cap. Although the thermal conductivity of copper exceeds that of aluminum, both metal cap materials give nearly the same results. The heat conduction in copper is superior to that in aluminum. The heat convection and radiation from the packages surface to the ambient environment depends on the surface area temperature gradient and the emissivity of material. The heat dissipation, by convection and radiation, of copper is slightly higher than that of aluminum because both metal caps have the same surface area. However, thermal conductivity significantly influences thermal resistance when the surface area of the metal cap is increased. This is why the heat sink has many fins to increase the surface area. The thermal resistance of FC-PBGA with a fourlayered substrate is 4.0% to 5.9% lower than that of FC-PBGA with a six-layered substrate, because the six-layered substrate contains much more metal than does the four-layered substrate. Increasing the area of the metal layer of substrate is one way to improve thermal performance. However, higher layer substrate will increase cost and lower yield.
5. Results and discussion
6. Conclusions
The four-layered substrate is adequately applied to low pin counts and low power load package, saving costs. The thermal conductivity of copper (393.3 W/m C) exceeds that of aluminum (155 W/m C), which has superior thermal dissipation capability. The warpage of FC-PBGA with a copper cap is superior to that of FC-PBGA with an aluminum cap as the coefficient of thermal expansion of copper (17.7 ppm/C) is closer to that of the substrate (17 ppm/C) than is that of aluminum (22 ppm/C). Table 6 compares the FEM numerical thermal resistance of FC-PBGA with different metal cap materials, and different substrate layers, from 3 W to 5 W. Tables 6 and 7, Figs. 10 and 11, yield the following information.
This work proposes a finite element numerical methodology to predict the thermal performance of FCPBGA, with both a bare die and a metal cap. The FEM results differ slightly from the experimental results by 6% to 8.1%, implying that the FEM proposed here is highly accurate. A heat transfer coefficient was introduced to help to obtain the temperature distribution. The verified finite element model was applied to predict the thermal performance of FC-PBGA with a copper cap, using four-layered and six-layered substrates. Experimental results demonstrate the effectiveness of FC-PBGA with a metal cap in improving thermal performance by 35%, implying that a metal cap effectively improves thermal performance. Replacing the copper
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Fig. 11. FEM result of thermal resistance. (a) FC-BGA with Cu cap FEM result at 5 W (6L substrate), (b) FC-BGA with Al cap FEM result at 5 W (4L substrate) and (c) FC-BGA with a Cu cap FEM result at 5 W (4L substrate).
cap with an aluminum one increases thermal performance by only 2.0% to 2.8%. Heat is more readily conducted in copper than in aluminum, and heat convection and radiation from copper are slightly higher than from aluminum because both metal caps have the same surface area. Therefore, the material of the metal cap slightly influences the thermal resistance when the heat dissipation is saturated through the metal cap. To increase the surface area, including die and package area, will strengthen the thermal performance. Furthermore, the thermal resistance of the six-layered substrate is lower than that of the four-layered substrate by 4.0% to 5.9%, since the former contains more metal. The FEM proposed herein could be extended to predict the thermal resistance of flip chip packages with different control variables. These control variables include the power load, substrate layer, metal cap material and the size of die, package and metal cap. Moreover, the FEM can be used in researching and developing new products or improving existing packages.
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