New Patents
On an n-type semiconductor substrate having a ridge part of stripe-shaped pattern, the following layers are formed by liquid phase sequential epitaxial growth: an undoped active layer; a p-type clad layer; and an n-type isolation layer. Thereafter, a Cd impurity is diffused in the isolation layer in a stripe-shaped pattern at the position above the ridge part, thereby forming a p + - t y p e conduction region in the central part of the isolation layer. By forming the stripe-shaped ridge part on the substrate overriding the active layer, the injection current is effectively confined to the lasing region which is the thinner part of the active layer and is on the ridge part. Therefore the threshold current is decreased. Accordingly, the light lased in the active layer is effectively confined in a stripe-shaped lasing region thereof, and a stable transverse mode of lasing is obtainable. 4377856
STATIC SEMICONDUCTOR MEMORY W I T H R E D U C E D C O M P O N E N T S AND INTERCONNECTIONS Bruce B Roesner assigned to Burroughs Corporation ÷v w ~ l Is EsL, "pS~
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means are coupled respectively to the setnode and reset-node. A pair of bit lines are coupled respectively to the second terminals on the pair of variable conductance means; and a word line is coupled to the common-node.
4377819 S E M I C O N D U C T O R DEVICE Yoshio Sakai; Toshiaki Masuhara; Osamu Minato; Toshio Saski; Hisao Katto; Norikazu Hashimoto; Shin-ichi Maramatsu; Akihiro Tomozawa assigned to Hitachi Ltd Voo
A semiconductor device including at least a resistance element formed of polycrystalline silicon having a high resistivity. An electrode is provided on the high resistance polycrystalline silicon region with a silicon dioxide film and a silicon nitride film being interposed therebetween. The electrode is coupled to the ground potential. In this manner, high stability is obtained in the behavior of the resistance element inasmuch as the formation of a parasitic MOS device under said high resistance region is suppressed, and the threshold voltage of any such MOS device is made raised.
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Disclosed is a static semiconductor memory which is comprised of a pair of crosscoupled switching means forming a setnode, a reset-node, and a common-node; and a pair of variable conductance means. Each of the variable conductance means are characterized as having first and second terminals with negligible conductance therebetween when the voltage thereacross is less than a predetermined breakdown level, and as having substantial conductance when the voltage thereacross exceed the breakdown level. The first terminals of the pair of variable conductance
4377817 S E M I C O N D U C T O R IMAGE SENSORS Jun-ichi Nishizawa; Tadahiro Ohmi assigned to Semiconductor Research Foundation / s,-Z,.,--~-#: - - r ~ 2 _ ~ . .,~¢-C,~-.-- ~ ' ,
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New Patents
This invention relates to a semiconductor image sensors and more particularly, to a back-illuminated-type static induction transistor image sensors. FIGS. 4A to 4C show the back illuminated type SIT image sensors operating in the electron depletion storing mode, where the n + b u r i e d floating region 23 serves as storage region.
When an insulating layer is formed on a polycrystalline silicon layer by thermally oxidizing the polycrystalline silicon layer, ambient gas to be used as an oxidizing gas comprises an oxygen gas and an inert gas. It is preferable that the ratio of oxygen partial pressure of the ambient gas is up to 0.35.
4377816
4377438
SEMICONDUCTOR ELEMENT W I T H ZONE GUARD RINGS Roland Sittig assigned to BBC Brown Boveri & Company Limited S'
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METHOD FOR P R O D U C I N G S E M I C O N D U C T O R DEVICE Takahiko Moriya; Yoshikazu Hazuki; Masahiro Kashiwagi assigned to Tokyo Shibaura Denki Kabushiki Kaisha
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A semiconductor element having at lease one pn junction and provided with zone guard rings for improving the suppression behavior of the pn junction, wherein the pn junction extends to the peripheral or side surface of the element and the first of a series of guard rings is coordinated with the pn junction and is bounded by the peripheral or side surface and by the lower planar surface of the element.
A method for producing a semiconductor device has the steps of forming an insulating film on an uneven surface of a semiconductor body; and dry etching the insulating film by using as an etchant a gas containing carbon-halogen bonds and hydrogen, whereby the surface of said insulating film is smoothed.
4377605
4377030
METHOD FOR FORMING AN I N S U L A T I N G LAYER ON A P O L Y C R Y S T A L L I N E SILICON LAYER OF A S E M I C O N D U C T O R DEVICE USNG A T W O - S T E P THERMAL OXIDATION TECHNIQUE
M E T A L L I Z A T I O N OF SELECTIVELY I M P L A N T E D AIII-BV C O M P O U N D SEMICONDUCTORS
Takashi Yamamoto assigned to Fujitsu Limited
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Fabricating a semiconductor arrangement with a semiconductor body of an AIII-BV compound, characterized that the semi-