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4520448 Method of characterizing reliability in bipolar semiconductor devices
Microelectron. Reliab., Vol. 26, No. 1, pp. 201 204, 1986. Printed in Great Britain.
0026-2714/8653.00+.00 Pergamon Press Ltd.
NEW PATENTS This Section contains abstracts and, where appropriate, illustrations of recently issued United States patents and published patent applications filed from over 30 countries under the Patent Cooperation Treaty. This information was obtained from recent additions to the Pergamon PATSEARCH ® online database in accordance with interest profiles developed by the Editors. Further information about Pergamon PATSEARCH -~ can be obtained from Pergamon InfoLine Inc., 1340 Old Chain Bridge Road, McLean, Virginia 22101 U.S.A. Copies of complete patents announced in this Section are available from Pergamon InfoLine Inc. for $8 per copy. Payment with order is required. Orders outside North America add $2 for air postage. Order by patent number for Pergamon InfoLine only.
4520309
4520313
SYSTEM FOR TESTING THE MALFUNCTIONING OR CORRECT OPERATION OF A CIRCUIT WITH LOGIC COMPONENTS
SEMICONDUCTOR TESTING AND APPARATUS THEREFOR Laurence L Allred, Bradley Lange assigned to Advanced Semiconductor Materials America Inc
Andre Berard Claud Laviron, Fontaine les Dijon, France assigned to Commissariat a l'Energie Atomique
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A semiconductor die is positioned and examined by means of scanning certain strategic regions which border or overlap said die. The video which results from the scanning is digitized. For example, black is represented by an 0 and white is represented by a 1 . The results may be compared with an acceptable pattern to determine a good die and statistically analyzed to see if the data represents the die or surrounding street.
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The invention relates to a system for testing the malfunctioning or correct operation of a circuit with n logic components. These components respectively present a simulation input receiving a malfunctioning or correct operation simulation signal. The system is characterized in that it comprises test means for placing each component respectively in a state of malfunctioning or of correct operation and vice versa, for one or more combinations of the components of the circuit, the test means present a characteristic output which furnishes a signal of which the logic level depends on the state of malfunctioning or o f correct operation and vice versa, of each of the components of the circuit. Finally, the system comprises stop means for stopping the test means when the tests to be carried out are finished. The invention is more particularly applied to tests of electronic circuits and, by analogy, to tests of hydraulic circuits.
4520448 M E T H O D OF CHARACTERIZING RELIABILITY IN BIPOLAR SEMICONDUCTOR DEVICES Bernard Tremintin, Orvault, France assigned to International Business Machines Corporation This invention concerns a method of characterizing the reliability in bipolar semiconductor 201
202
New Patents
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devices having reliability detracting leakage current due to a parasitic FET transistor between the p-type isolation (source) and base regions (drain) of the bipolar, NPN transistor. The source of this PNP parasitic FET transistor, i.e., the isolation region and the gate are provided with electrodes and the drain region and gate electrodes short-circuited. Then, a reliability function R is determined as equal to the product NSS*Neff*ND1/2, wherein NSS, is the interface charge density, Neff, is the oxide charge density, and ND, is the impurity concentration in the epitaxial layer. This function is correlated with the time-to-fail, such as, for instance, T50. It suffices to characterize the manufacturing line beforehand by plotting curve R = f(T50); to this end, the reliability functions and their respective times-to-fail after a burn-in step, are measured for different batches of wafers. Then, it suffices to measure the reliability function for any given batch and to deduce therefrom, according to the curve, the time-to-fail, directly. Such a method makes it possible to save time on the pilot lines while a novel bipolar semiconductor product is being developed, and to have a very rapid reaction time on the manufacturing lines, when such a reliability defect occurs.
of a biconcave lens and a biconvex lens, the fifth lens component is a bicoflvex lens, and the sixth lens component is a negative meniscus lens, the objective for an IC mask testing device having favorably corrected chromatic aberration for the fluorescent wavelength as well as favorably corrected chromatic aberration in general, a long working distance and high magnification. 4523144 COMPLEX PROBE CARD FOR TESTING A SEMICONDUCTOR WAFER Masao Okubo, Yasuro Yoshimitsu, Tokyo, Japan assigned to Japan Electronic Materials Corp 6
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A probe card includes a printed circuit plate having an aperture at the center thereof and a ring fixed around said aperture on either side of the plate. The ring is adapted to support probe needles in radial arrays with respect to the aperture. Each of the arrays has a multilayer of probe needles which have their terminal tips aligned on a plane in parallel with the plate and their opposite terminal ends connected to the printed circuit for external connection.
4521086
4523145
O B J E C T I V E F O R A N IC M A S K TESTING DEVICE
APPARATUS FOR THE AUTOMATED HANDLING AND TESTING OF ELECTRONIC MODULES
Hiroyuki Kurita, Tokyo, Japan assigned to Olympus Optical Co Ltd
George G Gray assigned to Raytheon Company I i
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An objective for an IC mask testing device comprising a first, second, third, fourth, fifth and sixth lens components wherein the first lens component is a positive meniscus lens, the second lens component is a biconvex lens, the third lens component is a cemented doublet consisting of a biconvex lens and a biconcave lens, the fourth lens component is a cemented doublet consisting
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0026-2714/8653.00+.00 Pergamon Press Ltd.
NEW PATENTS This Section contains abstracts and, where appropriate, illustrations of recently issued United States patents and published patent applications filed from over 30 countries under the Patent Cooperation Treaty. This information was obtained from recent additions to the Pergamon PATSEARCH ® online database in accordance with interest profiles developed by the Editors. Further information about Pergamon PATSEARCH -~ can be obtained from Pergamon InfoLine Inc., 1340 Old Chain Bridge Road, McLean, Virginia 22101 U.S.A. Copies of complete patents announced in this Section are available from Pergamon InfoLine Inc. for $8 per copy. Payment with order is required. Orders outside North America add $2 for air postage. Order by patent number for Pergamon InfoLine only.
4520309
4520313
SYSTEM FOR TESTING THE MALFUNCTIONING OR CORRECT OPERATION OF A CIRCUIT WITH LOGIC COMPONENTS
SEMICONDUCTOR TESTING AND APPARATUS THEREFOR Laurence L Allred, Bradley Lange assigned to Advanced Semiconductor Materials America Inc
Andre Berard Claud Laviron, Fontaine les Dijon, France assigned to Commissariat a l'Energie Atomique
~_
~
_
_
j
~
f ~
A semiconductor die is positioned and examined by means of scanning certain strategic regions which border or overlap said die. The video which results from the scanning is digitized. For example, black is represented by an 0 and white is represented by a 1 . The results may be compared with an acceptable pattern to determine a good die and statistically analyzed to see if the data represents the die or surrounding street.
-~
The invention relates to a system for testing the malfunctioning or correct operation of a circuit with n logic components. These components respectively present a simulation input receiving a malfunctioning or correct operation simulation signal. The system is characterized in that it comprises test means for placing each component respectively in a state of malfunctioning or of correct operation and vice versa, for one or more combinations of the components of the circuit, the test means present a characteristic output which furnishes a signal of which the logic level depends on the state of malfunctioning or o f correct operation and vice versa, of each of the components of the circuit. Finally, the system comprises stop means for stopping the test means when the tests to be carried out are finished. The invention is more particularly applied to tests of electronic circuits and, by analogy, to tests of hydraulic circuits.
4520448 M E T H O D OF CHARACTERIZING RELIABILITY IN BIPOLAR SEMICONDUCTOR DEVICES Bernard Tremintin, Orvault, France assigned to International Business Machines Corporation This invention concerns a method of characterizing the reliability in bipolar semiconductor 201
202
New Patents
*iT
.~_//A
V/////////.
Tt:i: ' ~ ' ~
do
~ ' - , . t'/A<, ."-."..\',.\v//k~q'..~..\\\'.\'.,"K~x.Z~.\',~,~l "
devices having reliability detracting leakage current due to a parasitic FET transistor between the p-type isolation (source) and base regions (drain) of the bipolar, NPN transistor. The source of this PNP parasitic FET transistor, i.e., the isolation region and the gate are provided with electrodes and the drain region and gate electrodes short-circuited. Then, a reliability function R is determined as equal to the product NSS*Neff*ND1/2, wherein NSS, is the interface charge density, Neff, is the oxide charge density, and ND, is the impurity concentration in the epitaxial layer. This function is correlated with the time-to-fail, such as, for instance, T50. It suffices to characterize the manufacturing line beforehand by plotting curve R = f(T50); to this end, the reliability functions and their respective times-to-fail after a burn-in step, are measured for different batches of wafers. Then, it suffices to measure the reliability function for any given batch and to deduce therefrom, according to the curve, the time-to-fail, directly. Such a method makes it possible to save time on the pilot lines while a novel bipolar semiconductor product is being developed, and to have a very rapid reaction time on the manufacturing lines, when such a reliability defect occurs.
of a biconcave lens and a biconvex lens, the fifth lens component is a bicoflvex lens, and the sixth lens component is a negative meniscus lens, the objective for an IC mask testing device having favorably corrected chromatic aberration for the fluorescent wavelength as well as favorably corrected chromatic aberration in general, a long working distance and high magnification. 4523144 COMPLEX PROBE CARD FOR TESTING A SEMICONDUCTOR WAFER Masao Okubo, Yasuro Yoshimitsu, Tokyo, Japan assigned to Japan Electronic Materials Corp 6
~( ^
i
//-
4
2
I
I
3
/
f
/////,
1
( /
~/
W
A probe card includes a printed circuit plate having an aperture at the center thereof and a ring fixed around said aperture on either side of the plate. The ring is adapted to support probe needles in radial arrays with respect to the aperture. Each of the arrays has a multilayer of probe needles which have their terminal tips aligned on a plane in parallel with the plate and their opposite terminal ends connected to the printed circuit for external connection.
4521086
4523145
O B J E C T I V E F O R A N IC M A S K TESTING DEVICE
APPARATUS FOR THE AUTOMATED HANDLING AND TESTING OF ELECTRONIC MODULES
Hiroyuki Kurita, Tokyo, Japan assigned to Olympus Optical Co Ltd
George G Gray assigned to Raytheon Company I i
,
2~ ,~ ~
;8,; ,~0~ ~,,~ rll r12 P13
~- - rl&
An objective for an IC mask testing device comprising a first, second, third, fourth, fifth and sixth lens components wherein the first lens component is a positive meniscus lens, the second lens component is a biconvex lens, the third lens component is a cemented doublet consisting of a biconvex lens and a biconcave lens, the fourth lens component is a cemented doublet consisting
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