A computer-based aptitude test for electrical engineering

A computer-based aptitude test for electrical engineering

Computers Edrrc. Vol. 22, No. 3, pp. 239-250, 1994 Copyright 0 1994Elsevier Science Ltd Pergamon Printed in Great Britain. All rights reserved 0360...

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Computers Edrrc.

Vol. 22, No. 3, pp. 239-250, 1994 Copyright 0 1994Elsevier Science Ltd

Pergamon

Printed in Great Britain. All rights reserved 0360-1315/94 $6.00 + 0.00

A COMPUTER-BASES

APTITUDE TEST FOR ELECTRICAL ENGINEERING

ZENONJ. PUDLOWSKI*and MICHAELRADON NSW 2006,Australia

Department of Electrical Engineering, The University of Sydney, (Received

29 March

1993; accepted 5 August 1993)

Abstract-Based upon successful research results, a computer-based version of the Electrical Engineering Aptitude Test (EEAT) has been developed in the Department of EIectrical Engineering at The University of Sydney, Australia, over the past few years. It permits the easy testing of high school students in order to measure their aptitude for electrical and electronic engineering studies with particular emphasis on circuit theory. This paper presents a thorough overview of the research and developmental work concerning the implementation of computer technology for testing student aptitude. Several stages of this work are demonstrated and discussed. These include the presentation of the structure of a computer program, as well as its important features and functions.

INTRODUCTION

The rapidly increasing number of young people seeking a career in electrical engineering has placed an eno~ous pressure on the selection processes involved in awarding the available places in tertiary institutions. In addition, the increasingly high cost of obtaining an engineering degree has made it highly desirable that students who enrol in degrees will successfully complete their studies. The present selection process based upon the Higher School Certificate (HSC) student aggregate does not provide university education institutions with enough information about the student’s capability and aptitude for a particular discipline. Often, students possess neither knowledge about the requirements of that discipline nor their suitability. This is a result of the existing counselling system failing to provide them with the necessary variety of tools for enabling them to assess their abilities, aptitude, etc. Despite the availability of IQ tests which are valuable for the assessment of general student intelligence, there is a lack of alternative methods for the diagnosis of specific professional abilities and aptitude. The measurement of verbal and non-verbal intelligence may be extremely helpful in the assessment of general student intelligence. There are enough tools, for instance IQ tests, helpful for this assessment, but when it comes to the diagnosis of specific professional abilities, capabilities, or aptitude, there is evidently a lack of effective methods. The assessment of aptitude is particularly important in the engineering profession where professional training becomes particularly sophisticated and expensive. We cannot afford to waste money and resources for professional training where there is a high rate of trainee failure. Traditional tests have proven to be poor predictors of future success in engineering training and there is significant scope for improvement. At present there are insufficient tools effective for aptitude measurement, especially for the diagnosis of specific professional abilities and aptitude, and reliable prediction of the students’ chances of successfully completing their engineering training. AN

ELECTRICAL

ENGINEERING

APTITUDE

TEST

An Electrical Engineering Aptitude Test developed in the Department of Electrical Engineering at The University of Sydney seems to fill that gap[l]. The test has been designed to measure high school students’ aptitude for studies in electrical and electronic engineering. There is particular *Z. J. Pudlowski and the Electrical Engineering Education Research Group (EEERG) have moved to: Faculty of Engineering, Monash University, Clayton, Melbourne, WC 3168, Australia [Fax: +61 3 565 34091. 239

ZENON

240

J.PUDLOWSKI and MICHAEL RADOS

emphasis on electrical circuit theory with reliance on pattern recognition and the ability to absorb high school physics. The test consists of 32 problems grouped in 5 sections in which different aspects of the thought processes used to solve the given electrical problems can be measured. The test is a multiple choice one where the person selects one fragment from the six given options to complete the missing part of an electrical circuit. Brief instructions explaining what needs to be done in a particular problem are displayed underneath each electrical circuit. One hour is given to complete the entire test. Figure 1 depicts a sample question of the written version of the test. The aim of the first two sections is to measure the observation and perception process using an electrical circuit with particular emphasis on the circuit structure and its topology. It also measures the recognition of the signs, symbols and ciphers adopted in electrical engineering, as well as a few conventions used for communication via schematic diagrams. In the first stage of problem solving for this group of questions, the tested subject separates the main elements of the incomplete circuit and thus detects the relationships between those elements. In the next stage, the thought process mainly invotves a comparison between an incomplete circuit and the missing graphic elements in it and the given options for completing the circuit. These two sections do not require a pre-existing knowledge for electrical engineering or related fields. Section three of the test is designed to measure the student’s ability to recognize circuit structure and possible connections between the resistances in order to determine an equivalent circuit resistance. To solve a problem of this class successfully, the subject needs to carry out a combined graphic and structural analysis of the given network using a very basic knowledge of principles relating to the combination of resistances. The fourth section is used to assess the subject’s ability to understand and use the basic laws of circuit theory such as Ohms’ law and Kirchoff’s voltage and current laws. The last section evaluates the problem solving ability composed of the elements measured by the previous sections. The last two sections depend on a fundamental knowledge of high school physics. It should be emphasized that the first two sections measure the ability to discern and identify signs, symbois and conventions adopted in electric circuits. As they function here simply as graphic patterns, the mental manipulation of these images requires no knowledge of circuit theory. Further problems in the latest sections, which aim to measure some understanding of the principles of fundamental circuit theory, do require a basic knowledge of physics. 4-2

B

A -_____'"_-'---] I

Q

I

:

-+

c ___--_______-_, 2Q

19

I

1n f 4U

19

2U

Choose the appropriate fragment for the abwe circuit which praduces a voltage between the terminals A and II equal to 1 volt.

~ I__,___J*,,,,-,

SELECTIOti : : FWGHENT 1 : SKIP Fig. I. A sample

Skip

1 : HELP 1 : qlJIT

screen of the initial computerized

version

question 1 : CONFIRH

of the EEAT

Electrical Engineering Aptitude Test

241

The test is a multiple choice one, in which an electrical circuit must be correctly completed by selecting a small circuit (called a fragment) from six possible choices. Both the principal circuit and the six fragments are displayed on the screen during the time the question is being attempted (see Fig. 1). One hour is available to attempt 32 questions. The entire test is divided into five sections. Each section is designed to assess a different aspect of the thought processes involved in solving an electrical circuit problem, thus measuring the student’s aptitude. Comprehensive results of research carried out at The University of Sydney in conjunction with Jagiellonian University in Cracow, Poland and The University of Cape Town in the Republic of South Africa were helpful in determining the test’s reliability, validity and applicability. A reliability coefficient of the test and a correlation coefficient between the test results and student achievements in electrical engineering courses at first year level have been determined[2,3]. It was found that this aptitude test was ideally suited for implementation on a personal computer. Running the test on a personal computer permits a level of testing that would be difficult, if not impossible with a written test. Su~rvision of testing is thereby extremely simplified. As a result of the highly encouraging research results obtained with the written version of the Electrical Engineering Aptitude Test, as well as the easy access to computer technology, a decision was made in 1986 to develop a computer-based version of the EEAT[4]. The availability of computer hardware has encouraged engineering educators to consider alternative ways and methods of information dissemination. The introduction of more advanced approaches and techniques would definitely facilitate student academic activities. There are, however, many problems and issues relating to the application of computer technology and personal computers, in particular in academia, which need to be identified and addressed[5]. The main advantages of the application of a personal computer are that this machine is now readily available at a reasonable cost, and it can demonstrate a variety of applications and offers tremendous flexibility. Being more specific, it has been realized that computer technology provides an excellent opportunity for the introduction of more effective methods for testing. The process of administering a computer-based test to students requires minimal resources and is extremely easy to handle. It facilitates greatly the process of the quantitative and qualitative analysis of student achievements, allowing an easy storage and retrieval of the test subject’s results. However, one must realize that the quality of computer graphics used for the presentation of electrical circuit diagrams still cannot match that of drawings and diagrams on paper. Screen resolution plays a decisive role when it comes to producing computer-based images. The perception processes taking place when observing such graphical means may be significantly impaired when the computer graphics do not offer good quality images[6,7]. Because the EEAT relies heavily on visual communication via drawings, diagrams, figures, ciphers, etc. the quality of the computer graphics was the main concern whilst developing the computerized version of the EEAT. The problem of information transfer via visual means is discussed elsewhere [8]. Another important aspect of this work was the organization of the computer screen. An individual problem included in the written version of the EEAT is presented on an ACsized full page (210 x 297 mm). However, a single computer screen frame offers less space. Therefore, an individual screen frame was organized in such a way that the circuit diagrams would retain their original size and proportions, with the constraint that the screen must not be crammed. Written instructions were placed in the bottom left-hand part of the frame, just below the main circuit diagram as depicted in Fig. 1. THE

INITIAL

VERSION

As mentioned previously, a decision was made in 1986 to develop a computerized version of the EEAT. The development was based on the ready availability of an ACT Apricot personal computer, which at that time had a superior high resolution screen of 800 x 400 pixels. A demonstration version was available in a relatively short time. It was presented at a number of conferences and meetings, as well as other occasions to many specialists in psychology, education

242

ZENONJ.PUDLOWSKI~~~

MICHAEL RADOS

and engineering education. The program was very well received and praised for its consistency, visual clarity, easy access and usage, as well as its efficient administration. An opinion was expressed that the test would have a wide application in education institutions worldwide. It was emphasized by many experts that the test would become an important tool which should enrich the process of professional advice and guidance. However, it also attracted criticism for the hardware used as only few education institutions, at that time, were equipped with Apricot computers. To convert the program for use on a mainframe was not possible as it would have required a number of graphic terminals, and would have definitely reduced the speed of the test’s graphics. The next step was to use an IBM personal computer with a Monochrome Graphics Board (Hercules Card-720 x 348) and a suitable monochrome monitor to increase the number of potential users. A version for the IBM Colour Graphics Adapter (CGA-640 x 200) was considered but the relatively low resolution of the display graphics restricted the ability to present complex electrical diagrams. However, a short demonstration version with a few simple circuit diagrams was developed. Finally, an initial version of the test, called Version 1.0, was made available for an ACT Apricot, Victor 9000 (ACT Sirius), and an IBM-PC, XT or AT (or a close compatible) personal computer equipped with a minimum memory of 128 kbytes and at least one floppy disk drive. In creating this computer program the aim was to allow the implementation of several important features in the testing of student aptitude. These features include a quantitative analysis of individual responses. The program development, though time-consuming, demonstrates that the interactive human-machine type of testing can be successfully achieved, with many benefits. Among others, the more general features were: l l l l

No need for human supervision. Exact time constraints may be placed on individual parts of the test. Analysis of the student’s aptitude is immediately available. Information relating to time/question, answers selected, etc. is immediately attention.

stored

for future

I

SYtlBOLS AND CONVENTIONS USED IN THE TEST

RESISTOR (arrow

V points

to

the

positive

terminal)

15 I

(value

CURRENT FLOW shown in direction

R

4

shown)

“OLTAG: DROP U (across the resistor R with the arrow pointing to the most positive point)

L I NODE N (JUNCTION)

(a common

point

of the

same potential) NO JUNCTION - wires

Press

‘RETURN’ to continue

the

Fig. 2. The simple single help screen.

test.

not

connected

Electrica Engineering Aptitude Test

243

It must be pointed out, however, that by running the test in its initial form a student’s ability to interact with a computer was also gauged. The test’s structure and features

The question display uses graphics to present an incomplete circuit together with six fragments, one of which completes the circuit. Simultaneously, a simple text is displayed which describes the

4 CRAW ouEsTloN

liiiGia

Incrernent quest ion poinl:er

~

Fig. 3. A part of the computer program flowchart. CAE 22/?-D

I3

244

ZENON J. PUDLOWW

and

MICHAEL RADOS

circuit’s conditions or requirements. Figure 1 presents a sample screen of the computerized version of the aptitude test. Both the circuit and the text remain on the screen until an answer is selected, or the time limit is reached. The problem remains on the screen as long as a selection of the appropriate fragment is made. One hour is allocated for the full version of the test. An equal-time division function is also available. In this case, the problem remains displayed for 112 s. Twelve seconds before the time limit is reached, a computer buzz is activated to alert the test subject that a selection must be made. The screen is cleared after the time expires, and a new problem is displayed. In addition to selecting a fragment, several other options are available. The skip key (S) permits the question to be deferred for another attempt at the end of the testing. However, questions for which the time has elapsed cannot be attempted again. The help key (H) provides the opportunity to explain the meaning of the symbols and conventions used in the test. It could have been activated at any time during the sessions, and an individual screen frame was presented with simple info~ation. This frame is shown in Fig. 2. The quit key (Q) allows the test to be terminated at any time, with an immediate display of the test’s score. The computer program was written in Turbo-Pascal, and a part of the program’s flowchart is shown in Fig. 3. It was realized that the program greatly simplified the supervision, recording and evaluation of student responses to a standard that would be difficult, if not impossible, with a written test. The specific features of Version 1.0 of the test were: Presentation of electrical circuit diagrams on the screen. o Display of instructions. o Selection of answers by simple key strokes. l Option of allocating the available 60 min for the entire test or dividing the total time equally between the 32 questions (112 s per question). l Availability of a help screen with selected simple explanations of fundamental concepts and notions of circuit theory. o Availability of skip question facilities with the option of deferring the answering of up to 12 questions until the end of the test. l Record of time performance. o Quantitative analysis of individual student performance. e Availability of student records, l

The test results were recorded on computer so that the student responses could be easily stored and evaluated. Individual results were assessed on the basis of their performance on the entire test (32 questions). Grades were assigned in accordance with the percentage of correct answers. Break points for the grades were adopted based upon the initial research results obtained with the written version of the test as shown in Table 1. An assessment screen was displayed on completion of the test. The standard screen’s layout, showing student results, is presented in Fig. 4. Version 1.0 was made commercially available, and a few copies were distributed among academics representing several local and international universities. The main objective though Table % Correct o-35 35-45 45-55 55-65 65-75 75-85 85-95 95-100

I Grades

awarded Grade

FAWe POIX Border pass Pass Reasonable Good Very good

Excellent

245

ElectricalEngineeringAptitudeTest STUDENT

:

John F. Smith

NUMBER OF QUESTIONS ATTEMPTED

:

20

NUMBER OF QUESTIONS ANSWERED

:

18

NUMBER OF QUESTIONS CORRECT

:

16

FOR THE QUESTIONS ATTEMPTED % CORRECT : 80 GRADE : GOOD FOR THE COMPLETE TEST % CORRECT

: 50 GRADE : BORDER PASS

TOTAL TIME TAKEN Fig. 4.

: The

60.0 minutes

assessmentscreenfor Version1.0.

was to elicit their views and comments on the value and application of this version of the EEAT. It was realized, however, that further work was needed to standardize the test for wider application, and thus making necessary adjustments to the computerized version of the EEAT. It was anticipated that the standardization process would provide essential information on the test’s reliability and validity in relation to large groups of students. In addition, it should have established criteria permitting the allocation of grades according to student performance. The developers hoped that the thorough analysis of the test data would provide valuable insights into the thought processes occurring when solving the problems. It was clear that this research would create the basis for comprehensive quantitative and qualitative evaluations of the test results which were indispensable for the subsequent diagnosis of student aptitude. As a result of this assessment tested students would obtain a statement indicating their strengths and weaknesses. It was inevitable that work should have been done in conjunction with psychologists specializing in industrial psychology and ergonomics [9]. Version 1.0 of the program was the first outcome of a continuing research and development, which at that time was strongly supported by the Electrical Engineering Foundation within The University of Sydney. In distributing this first version, the developers invited comments, criticisms and suggestions from users of the EEAT. Feedback was needed to assist further developments and effort in this relatively new and important area.

VERSION

1.1

The next step in developing the computerized version of the Electrical Engineering Aptitude Test was to develop a new version of the test. The program was also written in Turbo-Pascal and was only suitable for an IBM PC (or a close compatible) with a Monochrome Graphics Board (Hercules Card). The paramount objective was to expand the main features of the program by introducing a short version of the test, time display and multiple help screen facility. This work done in 1988, after comprehensive trials on Version 1.0 were carried out with university and high school students. Version 1.O the EEAT included only the full version of the test. It was found whilst testing junior secondary school students (year 9 and 10) that they were unable to solve problems included in a latter part of the test but were very good in the earliest problems included in the first two sections (1.1-1.8 and 2.1-2.6) in which the main aim is to measure the observation and perception process using simple electrical circuit diagrams with particular emphasis on circuit structures or their topology. As mentioned earlier, these two sections of the test do not require any knowledge of basic concepts and principles of electrical circuit theory.

ZENON J. PUDLOWSKI

246

and

MICHAEL RADOS

As a result, a short version of the test, including the first two sections of the test, was developed. When commencing the test, the choice of the full version or the short version of the test was introduced. The paramount objective was to provide secondary school students with a tool which would introduce them to simple problems in electrical circuit theory. It was also found that the tested students were concerned with time when they were solving individual problems on the test as there was no time display available. They were continuously checking the run-time on their own watches, which had a destructive effect on their performance. Hence, Version 1.1 was equipped with a clock display. The time taken during the test was displayed in the bottom-right corner of the screen. Another important finding was the fact that insufficient help information was included in the earlier version of the test. Help information, explaining the meaning of the symbols and conventions used as well as some basic concepts and principles of electrical circuit theory relevant for the later sections of the test, was organized using three consecutive screen frames. The help key (H) activated this feature at any time during the test and the screen would be presented in a closed loop. To return to the test, the return key (CR) would activated. A sample screen frame of Version 1.1 of the EEAT is presented in Fig. 5. The key features of the computerized Version 1.1 of the EEAT were:

A reduced (short) version of this test could be selected. Electrical circuits were presented on the screen. l Answers were selected by simple key strokes. lTime limits were imposed for each question. l The time available was displayed on the screen. l Time performance records were available. l A quantitative analysis of student’s performance was available. l Student records were easily accessible. l A group statistics option was available. l

l

A couple of dozen copies of this version throughout the world.

of the aptitude

test were distributed

28

---------I

5 b

I

I

2tl

I

I

__

3~~~ B

I_________

c --

and

B ------------.

fl

--

---_-----

in Australasia

-1

---------I

I

la

RIB =

2

fi

__I

I_________

The resistance RUB between the terninals fiand B is equal to 2 ohms. Choose the appropriate fragment.

E --

---------I 1R

F --

---------I in

I iR

in v=% I _________

-I--

I_________ w

I I __

SELECTION :

: FRAGl’lENT1 : SKIP 1 : HELP 1 : QUIT 1 : CONFIRll[ 183 sac Fig. 5. A sample screen of Version

1.1 of the EEAT

Electrical Engineering Aptitude Test

TEST SYNC

1

[IL3

247

AND ~~UENIIONS

1

* = (A closed

electrical

LOOP( IIESH I path forned by a number of components)

The circuit structure betwaen tha points A, B;e”:Ge?d f:o?ytk conplatsly circuit and all the original points brought together

If the ends of a resistor are tqethsr by wires, connectsd ;F res;;tor IS short-mrculted; there is no case electrical loop

Fig. 6. A sample help

AN

ADVANCED

1 lee set2

at, : CONTINUETEST

: CONTINUEHELP

VERSION

screenof the EEAT

OF THE

EEAT-VERSION

2.0

Comprehensive research carried out at Sydney University Electrical Engineering Department in conjunction with academics of the Department of Industrial Psychology and Ergonomics at Jagiellonian University of Cracow, Poland has resulted in the development of a multifactor approach to the quantitative and qualitative analysis of the test’s results[4]. This has enabled the researchers to conduct first and second order analysis leading to the extraction of a number of factors. Reliability and predictive validity were determined on the basis of factor analysis. This has proven the test’s soundness in predicting student’s performance in eiectrical engineering in general, and in electrical circuit theory courses in particular. Weighted scores for each problem in the EEAT and the test norm groupings were found as a result of factor analysis. This has enabled the test’s developers to develop an advanced version of the computer-based EEAT. Norms and related marks for the EEAT have formed the basis for quantitative and qualitative analysis of the student’s results. Factor analysis was extremely helpful in determining the content of a new short version of the EEAT. It was decided that 18 questions were suitable for inclusion in this short test. The questions are: 1.1-1.8, 2.1-2.6, 3.1-3.2, 3.4 and 4.4. A total time of 34 min is available to attempt the 18 questions in two ways. The first option is that the total time is used with a warning given 5 min before the time limit. In the second option the time of 34 min is divided equally. A time of 112 s is allowed for each problem. A warning is given 12 s before the time elapses. A computer program was written in C programming language to facilitate the application of a Monochrome Graphics Board, an Enhanced Graphics Adaptor (EGA) and a Video Graphics Array (VGA) card with automatic detection of the type of card. Different data files for each mode were created. System

requirements

To run successfully, the Electrical Engineering Aptitude Test requires the following minimum hardware and software configuration: l l

An IBM Personal Computer or compatible running DOS Version 2.1 or later. One floppy-disk drive capable of reading a 5a in. 360 K or a 3.5 in. 720 K IBM format disk.

248 l l

ZENON

J. PUDLOWSKI and MICHAEL RADOS

At least 256 K of available memory. A HGC (Hercules Graphics Card), an EGA (Enhanced Graphics Graphics Array) card with a suitable high-resolution monitor.

Adaptor)

or a VGA (Video

Features The key features

l

l

l

l

l

l l

l l

of Version

2.0 of the program

are:

Minimal supervision is required as complete instructions are given on the screen before the test is started. A reduced version of the test may be selected, in which 18 questions may be attempted in a time of 34 min. These questions do not require a knowledge of circuit theory. Answers are selected by simple key strokes. Once chosen a selection is echoed on the screen and then must be confirmed by the use of an additional key, eliminating the possibility of accidental choices. Help information is available, which explains some of the simple concepts necessary to answer the early questions. Questions that prove difficult and require extra time may be stored (skipped) and attempted at a later stage if time is available. Student results may be optionally appended to a file for future reference. The available time for each question to be attempted is displayed on the screen, a warning being given if the time begins to run out. For the full test gradings are given for each of the five sections. Comprehensive quantitative and qualitative assessment of the students’ aptitude is performed.

The assessment part of the computer program includes a single screen results summary, showing the test statistics for an individual person. Both the short and full version of the test include this results summary screen. The grades are assigned in accordance with the percentage scores as indicated in Fig. 7.

249

Electrical Engineering Aptitude Test

Fig. 8. A qualitative assessment screen for Version 2.0 of the EEAT (screen 1).

Statements explaining the student’s aptitude based upon the five factors determined in the multifactor analysis are also displayed. A typical screen frame is shown in Fig. 8. Application of the EEAT The computer-based Electrical Engineering Aptitude Test has already found its application in academic institution as a reasonable predictor of students’ future performance in electrical engineering subjects. Hence, it may be easily implemented into an advisory and recruitment system, essentially as a supplementary tool used in the assessment of students’ suitability for electrical engineering. This version of the test can be easily administered to students in present-day universities due to the wide availability of personal computers or computer networks consisting of powerful fileservers and workstations. The computer-based EEAT, when implemented on a computer network, may also be used during tutorial sessions on electrical circuit theory. The teaching process of circuit analysis when dealing with basic dc electrical circuits may be tremendously enhanced by encouraging university and college students to solve the problems included in the EEAT in conjunction with their own tutorial problems. The EEAT may also be used as a computer-based tool for the assessment of students’ understanding of fundamental electric circuits. It can be administered to students on completion of that part of the electrical circuit theory course which deals with dc electrical circuit analysis, the advantage being that students may attempt the test during their leisure time, thereby making substantial savings of the scheduled tutorial time. Test users The computerized version of the Electrical Engineering Aptitude Test considerable attention among academic institutions in Australia. Most education institutions purchased a copy of this test. This indicates that application in the university environment. Also, several overseas universities

(Aptest) has attracted Australian university the test has found an have used the test with

250

ZENON J. PUDLOWSKI and MICHAEL RADOS

their undergraduate students. As the distribution of the EEAT has continued over the last few years, it appears that not every academic institution acquired a copy of the advance version of this test (Version 2.0). CONCLUSIONS Research on the Electrical Engineering Aptitude Test carried out to date has provided valuable information concerning the test’s structure, its validity and reliability. It has shown a relatively high correlation with the teaching results on electrical circuit theory, and also some divergences in correlation between the test and specific teaching activities in electrical engineering. Furthermore, the experimental research demonstrates that by subjecting students to this test a reasonable prediction of teaching results in junior subjects within this discipline can be obtained. The test’s structure permitted the development of a special computer program which greatly simplifies the supervision and logging of student responses to a level that is almost impossible with a written test. In creating this computer program the aim was to allow the execution of several important features in the testing of student aptitude. These features include a quantitative analysis of individual and group responses as well as the comprehensive qualitative analysis of individual results. The program, though time-consuming to develop, demonstrates that an interactive human-machine type of testing can be successfully achieved, with many resulting benefits. It must be pointed out, however, that by running the test in its existing form a student’s ability to interact with a computer is also assessed. REFERENCES Sydney (1985). 1. Pudlowski Z. J., Elecrrical Engineering Aptitude Test. Polyedcon, students. Proceedinm of the Pacific Reaion Conference on Electrical 2. Pudlowski Z. J.. Antitude tests for nrosnective Engineering Educafion, Queenscliff, Australia, pp. 1533160 (1986). ” _ I _ Int. J. 3. Pudlowski Z. J. and Rados M., The computer based assessment of student aptitude for electrical engineering. A&. Eng. Educ. 6, 513-519 (1987). 4. Pudlowski Z. J. et al., An Aptitude Test and Associated Research on Basic Electrical Circuits. EEERG, Sydney (1993). electrical engineering education. Eur. J. Eng. Educ. 5. Pudlowski Z. J., Complex approach to developing computer-based 1, 67-83 (1992). 6. Marek T. and Pudlowski Z. J., The impact of VDT drawings and images on engineering design, work and education. Proceedings of the 1st AAEE Annual Conference, Sydney, Australia, pp. 214219 (1989). authoring programs for engineering education. Australasian 7. Pudlowski Z. J., Major issues in developing computer-aided J. Eng. Educ. 1, 43351 (1991). via drawings and diagrams. Int. J. Appl. Eng. Educ. 4, 301-315 (1988). 8. Pudlowski 2. J., Visual communication W., Przetacznik J. and Pudlowski Z. J., A study of the effectiveness of the Electrical Aptitude Test. 9. Osikowska Proceedings of rhe World Conference on Engineering Education for Advancing Technology, Sydney, Australia, pp. 311-315 (1989).