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A computer-controlled pulse sequeneer for pulsed nmr experiments
JOURNAL
OF
MAGNETIC
RESONANCE
38, 207-214
(1980)
A Computer-Controlted Puke Sequencer for Pulsed NMR Experiments T. COSGROVE,”
J. S. LITTLER,
AND
K. STEWART
School of Chemistry, Cantock’s Close, Bristol, BS8 1 TS, England Received June 18, 1979 A microprocessor-controlled pulse sequencer for diverse pulsed NMR experiments is described. The design is based on a first-in-first-out recycling memory which is loaded and triggered by computer software control. Sixteen output channels are provided for various synchronized functions. INTRODUCTION
Since the advent of pulsed NMR experiments numerous designs of analog and digital pulse programmers have been published (1-3). However, in virtually all these designs severe limitations are imposed by the hardware on modifications and extensions of the original pulse sequences. Ellett etal. (4) have shown the advantages in using a digital memory and decoding logic under computer control to drive an NMR spectrometer, but this design provides only analog delays for pulse timing and pulse widths in multiple-pulse sequences, which is a severe limitation. The present design is based on the generation of logic level pulses of variable duration on various output channels under the control of 32-bit-wide words. These data words are loaded from the control computer and stored in a 64-deep first-infirst-out (FIFO) memory. A FIFO memory is used rather than a random access memory so that new data are available at the output with only a minimal delay. A secondary advantage is that no addressing logic is required. The 64-deep FIFO memory provides a stack of up to 63 data words each of which may define a different pulse. This limit would clearly be a serious handicap and so to circumvent this, the FIFO output is copied back into its input so that some or all of the pulse sequence can be repeated cyclically for as long as required. The total number of pulses in a given run can be preset and the sequence of events restarted or reset by the control computer. Output pulses defined in length by both analog and digital circuitry can be selected. Each data word includes a time interval code. On execution of the word, this code is loaded into a counter which is decremented by a clock whose frequency is also defined in the word. When the counter reaches zero, a short pulse (PGM) is generated and the counter is then loaded with the time interval code from the next data word in the FIFO memory. This sequence of events enables continuous digital synchronization of the output pulses * Author to whom correspondence should be addressed. 207
f~~l22-23~4/Xi~/l~50207-l~~$02 011111 Copyright Q 1980 by Academic Press. Inc All rrghts of reproductmn in any form reserved Printed m Great Rrltaln
208
COSGROVE,
LITTLER,
AND STEWART
with the standard frequency source (1 MHz) from which the clock frequency is derived. The timing accuracy is thus only limited by the stability of the l-MHz source. The PGM pulse thus generated is steered into the appropriate channel by means of control bits in the data word. The output channels are connected directly to either rf gates or various other devices which are to be controlled. The timing accuracy of the sequencer is independent of the control computer and so a relatively inexpensive microprocessor can easily be used to drive the device. In this instance a 16-bit PDP 1 lVO3 has been used but with a simple modification to the input circuitry an S-bit device could be employed. The width (32 bits) of the FIFO memory is chosen to provide enough flexibility for the timing and steering of each pulse for all foreseeable requirements. The depth (64 words) is chosen to provide a sufficiently long basic cycle. However, the design is such that it can easily be expanded. In particular a greater word capacity can be provided by simply cascading memory chips. MEMORY
OPERATION
The description of the memory operation can be conveniently the following sections.
broken down into
Read Mode
The data input to the sequencer is buffered and four separate 16-bit latches Ll-4 (see Fig. 1) are used. The control circuitry for loading the latches is labeled Gl. The control line CSR is asserted to put the sequencer into the read mode and this automatically directs the first 16-bit input word to Ll. Ll is loaded by the NDR pulse, which in this instance is obtained directly from the computer when a valid word appears on the output interface. The first word in Ll contains the number of pulses per burst and can be set in the range 2 to 216. A second NDR pulse loads word 2 into L2 and this contains a special delay code, whose range is 2 to 21° psec. This delay can be used for strobing an ADC and is described fully later. the third NDR pulse loads L3 with the lower 16 bits of the first data word and L4 with the higher 16 bits. After the fourth NDR pulse the data in L3 and L4 are loaded into the FIFO memory via the shift in (SI) delay. The data word then drops to the bottom of the memory stack and the output-ready flag (OR) is asserted when valid data appear on the output lines of TABLE
1
Bits output from memory 23
24
1 0 0 0
1 1 0 1
Bits input to memory Action Word Word Word Word
enabled enabled first cycle disabled second cycle disabled after second cycle
23
24
1 0 0 0
1 0 1 1
COMPUTER-CONTROLLED
PULSE
SEQUENCER
209
the FIFO memory. Subsequent pairs of NDR pulses load L3 and L4 alternately and hence progressively fill the memory with consecutive pulse words. Bit 32 of the pulse word contains the reset code. If this is asserted then the whole system is cleared and reset after the fourth NDR pulse and no words are loaded into memory. The software for implementing the “master reset” is illustrated in the Appendix. A separate manual master reset is also available. Run Mode
The run mode is activated by clearing CSR, which isolates the read gating circuitry Gl, switches the 32-bit multiplexer Ml to enable word recycling and activates the run gating logic G2. A subsequent NDR pulse loads the pulse counter Cl with the value stored in Ll, loads the first data word into the (8 x 4)-bit output latches (via CDR) and also rewrites it into the top of the FIFO memory, and finally enables the l-MHz clock. As soon as the data word has been latched and recycled a shift-out pulse (SO) is generated which strobes the next data word to the FIFO output. This word is thus ready for use within a fraction of the clock period. The low-order bits of the pulse word, 0 to 12, contain the time delay codes. Bits 0 to 9 enable a digital counter to be set in the range OOO+ 1023 and bits 10 to 12 determine its input clock frequency which is available in powers of 10 from 1 MHz to 1 Hz. The maximum delay that can be set is therefore lo3 set and the minimum 1 ksec. The appearance of the delay codes on the output latches sets the lo-bit delay counter C2 and enables the appropriate clock frequency. When the delay counter reaches zero it generates a fast -50-nsec PGM pulse which is guided to the I-----.-
FIG.
RESET EOC
1. Schematic
-
diagram
/
of the pulse
sequencer.
210
COSGROVE,
LITTLER,
AND
STEWART
appropriate output channel. This pulse’s trailing edge is used to load the next data word into the output latches and reset the decade counters Dl. In order to maintain timing accuracy this must be completed in less than half of the basic l-MHz clock period. This sequence of events is repeated for each pulse word. The signal OR, which becomes true each time a word appears at the FIFO output, is used to decrement the pulse counter Cl. The sequence is halted when this count reaches zero by gating-off the master clock frequency (via the EOC pulse). The sequence can be restarted without the need to reload the memory by simply issuing another NDR pulse. The sequence repetition time, which in general will be of the order of 3T1, the spin-lattice relaxation time, is conveniently set by software (using a real time clock). Alternatively a long delay can be set in the first word of a sequence which is subsequently used cyclically. Dynamic
Modification
Often in multiple-pulse sequences (greater than 63 pulses) several initial pulses are required to set the system into a predetermined state, followed by a series of decoupling or refocusing pulses. Bits 23 and 24 are used to set “initial” pulses which are only enabled during the first complete memory cycle and are inhibited until the sequence is restarted. For a normal pulse both bits are set (see Table 1) and the sensing circuitry Sl is inactive. Data words in which bit 24 is set and 23 is clear will be loaded into the output latches and executed during the first cycle after a restart, but will be copied back to the FIFO input with bit 24 cleared. The sensing circuit detects bit 24 clear in the second cycle and prevents these words from loading into the latch by generating an immediate SI and then an SO pulse. These words, however, are copied back with bit 24 reset. In subsequent cycles the initial words are disabled but remain in the correct place and form in the memory to be re-executed when the sequence is restarted. Pulse Decoding Logic
In NMR experiments there are requirements for both analog and digital rf pulse length control. Analog pulse controls are particularly convenient for setting 0 to 360” pulse lengths to high accuracy. However, in rotating-frame and double-resonance experiments digital control is more useful, in order to control the pulse length precisely and reproducibly. The current design provides eight separate analog pulse length controls. These are conveniently divided into four A controls and four B controls. These pulses can be directed to any one of eight output channels. Typically these output channels are used to derive rf pulses of four different phases X, Y, -X, and -Y at two different frequencies. In normal circumstances (bit 25 clear), Al-4 are connected to one frequency channel and Bl-4 to the other. However, if more than four analog pulse lengths are required at one frequency (for example, using an MREVS sequence coupled with a T1 (5) measurement), then setting bit 25 will cross the pulses from the A channel controls to the B channel outputs and vice versa. To maintain timing accuracy there can be no delay in latching new words. For the analog pulses it is therefore possible that the output codes may change before the
COMPUTER-CONTROLLED
PULSE
TABLE Bits
SEQCJENCER
21 I
2
Function select
0-9 10-12
DELAY DECADE Dl CLOCK FREQUENCY 1 MHz-1 Hz SELECT ANALOG PULSE GENERATOR l-4 SELECT A, B, C, OR A+B C CHANNEL; TRIGGER PULSE OR TIMED PULSE MODE X, Y -X, -Y OUTPUT CHANNEL A C CHANNEL OUTPUT l-8 SET INITIAL OR NORMAL PULSE CROSS OVER A AND B OUTPUTS A CHANNEL; ANALOG OR DIGITAL MODE X, Y, -X, -Y OUTPUT CHANNEL B B CHANNEL; ANALOG OR DIGITAL MODE SPARE MASTER RESET
13-14 15-16 17 18-19 20-22 23-24 25 26 27-28 29 30 31
pulse is terminated. To prevent this the output rf phase channel selection codes are latched a second time by the rising edge of the analog pulse and are not reset to the c next code until the pulse has timed out. Both the A and B channels can be driven independently by digital pulses by setting the appropriate mode controls (see Table 2). Note that two pulse words are required to set a digital pulse and this is illustrated in Fig. 2. The first word (W2) sets the interval between the end of the previous operation and the digital pulse starting (PGM sets a bistable) and a subsequent word (W12) can then terminate the digital pulse (PGM clears the bistable). The length of the pulse is determined by the delay specified in the “stop” word added to the delays of any intermediate words. If required, simultaneous pulses (e.g., W2, Fig. 2) can be initiated on channels A and B by setting the correct codes (Table 2). A digital pulse length can be set up to a maximum - lo3 set and hence there is some inherent danger of overloading pulse
ffiM
w1n
W2
AlAX
w3
WL jj
W6
Jws
BDBX
W8
w9nr
Wl
FIG. 2. Illustration of a typical pulse sequence Wl-12 the text) required to generate this sequence.
q-p0
Wll
CB
il
relates to the twelve data words (referred to in
212
COSGROVE,
LITTLER,
AND
STEWART
amplifiers, probes, and detectors. Software controls can act as a safeguard but as an additional precaution a digital alarm circuit has been employed. The leading edge of any rf pulse sets a counter into operation which is clocked by a 30-Hz clock, the trailing edge of the pulse stops and resets the counter. If the counter reaches a predetermined time, in our case 500 msec, the system automatically generates a master reset and sounds an audible alarm. The run is thus aborted. This protection is also useful in the event that a noise-spike sets one of the output bistables. In NMR experiments several other digital pulses are often required, for triggering, gating detectors, field gradient pulses, ADCs etc. (see Fig. 2); to this end a further eight channels designated Cl-8 have been incorporated. These channels can be controlled independently and can output either a short - 50-nsec pulse (e.g., W7, Fig. 2) or a timed digital pulse. Channel C8 has been incorporated specifically for burst operation (W4, W5). The overflow pulses generated by repeatedly counting down in C3 the value stored in L2 (range 1 MHz to 1 kHz) are output when the digital mode is selected. This train of equally spaced pulses can be used, for example, to drive an ADC for signal collection. Table 2 summarizes the complete pulse code logic. Figure 2 shows a typical complex sequence that can easily be programmed. Both analog rf pulse lengths (AlAX; channel A analog length 1 output on channel A, phase X) and digital rf pulses (ADAY, ADBX; D for digital) are shown. The top row shows the sequence or PGM pulses which are subsequently fed into the various channels. This sequence is the now familiar cross-polarization experiment (6). Note that in this spectrometer system, independent flags are generated when it is necessary for the computer to read spectral data; however any of the remaining C outputs could easily be used. Another useful feature of the design is the ability to set several short sequences which can run consecutively. One such sequence is an amplitude reversal sequence where a spectrum is observed with an alternating sign after successive pulses trains. In this case if both the sequences have five pulses, the pulse counter is set to 6 (this is necessary to ensure a restart at the correct place in the sequence; pulse word 6 is a dummy in the sense that the output channel specified has no function) and twelve pulse words are loaded into the FIFO memory. On the first NDR pulse sequence 1 is issued and on the second, sequence 2, the sequences subsequently alternating.
Programming
Several computer programs have been devised which enable different levels of user interaction with the sequencer. The minimum requirement is merely a sequence of 16-bit words which define a given sequence; however, a more sophisticated program leads to easier operation of the spectrometer system. For example, when an MREV 8 sequence is required several sequences must be set up and executed to preset accurate pulse lengths on all four phase channels (X, -X, Y, -Y) and also accurate 90” phase shifts between channels. The sequencer has been built on seven standard logic boards and utilizes 110 integrated circuits. A full logic circuit diagram and computer programs are available on request from the authors.
COMPUTER-CONTROLLED
PULSE SEQUENCER
2! i
CONCLUSION
A pulse sequencer is described which enables virtually any current pulsed NMR experiment to be carried out under computer control. The philosophy of the design is such that the device can be expanded to fit virtually any requirement and may have applications outside NMR experiments. APPENDIX: EXAMPLE CODING OFA MASTERRESET ROUTINEFOLLOWED THELOADING OFASINGLE ANALOG 90" PULSE (AlAX)
BY
The delay set is 512 msec and 215 pulses will be output before the sequence terminates. PGM = address of the 16-bit output register. CSR = address of the 16-bit control register. ; MASTER RESET SEQUENCE FIRST MOV#2, @ #CSR; READ MODE (CSR BIT 1 SET) MOV# 100, @ #PGM; LOAD LI WITH DUMMY VALUE ; NB ACCESSING PGM REGISTER GENERATES AN NDR PULSE MOV # 100, @ # PGM; LOAD L2 WITH DUMMY VALUE MOV # 100, @ # PGM; LOAD L3 WITH DUMMY VALUE MOV# 100100, @ #PGM; LOAD L4 WITH DUMMY VALUE : BIT 31 IS SET IN L4 SO DO A MASTER RESET ; NOW LOAD REQUIRED SEQUENCE MOV # 100000, @ # PGM; NO OF PULSES MOV # 5, @ # PGM; C8 FREQUENCY 200 KHZ MOV# 106777, @ # PGM; CODES FOR 512-msec DELAY, PULSE AlAX MOV # 2601, @ # PGM; ; SET SEQUENCER INTO RUN MODE MOV#O, @#CSR ; TRIGGER SEQUENCE I.E. GENERATE NDR MOV # 0, @ # PGM; START SEQUENCER ; SEQUENCE WILL STOP IN- 280 hr : UNLESS ANOTHER MASTER RESET IS ISSUED ACKNOWLEDGMENTS The authors are indebted to Mr. R. A. Jarvis and Mrs. M. Sutherland for their help in testing the pulse sequencer and writing the computer programs.
REFERENCES 1. J. R. DICK, J. Phys. E. 9, 1054 (1976). 2. D. G. TAYLOR, S. BOOTH AND P. S. ALLEN,]. Phys.E. 3. T. W.ORTH AND C.J.BURNETT, J. Magn.Reson.29,39
105 (1974). (1978).
7,
214
COSGROVE,
LI’ITLER,
AND
STEWART
4. J. D. ELLETT, JR., M. G. GIBBY, U. HAEBERLEN, L. M. HUBER, M. MEHRING, A. PINES, J. S. WAUGH, Adv. Magn. Reson. 5, 117 (1971). 5. M. MEHRING, “High Resolution NMR in Solids”, p. 192, NMR Basic Principles and Progress, 11, Springer-Verlag. New York/Berlin, 1976. 6. A. PINES, M. G. GIBBY, AND J. S. WAUGH, J. Chem. Phys. 56,1776 (1972).
AND Vol.
OF
MAGNETIC
RESONANCE
38, 207-214
(1980)
A Computer-Controlted Puke Sequencer for Pulsed NMR Experiments T. COSGROVE,”
J. S. LITTLER,
AND
K. STEWART
School of Chemistry, Cantock’s Close, Bristol, BS8 1 TS, England Received June 18, 1979 A microprocessor-controlled pulse sequencer for diverse pulsed NMR experiments is described. The design is based on a first-in-first-out recycling memory which is loaded and triggered by computer software control. Sixteen output channels are provided for various synchronized functions. INTRODUCTION
Since the advent of pulsed NMR experiments numerous designs of analog and digital pulse programmers have been published (1-3). However, in virtually all these designs severe limitations are imposed by the hardware on modifications and extensions of the original pulse sequences. Ellett etal. (4) have shown the advantages in using a digital memory and decoding logic under computer control to drive an NMR spectrometer, but this design provides only analog delays for pulse timing and pulse widths in multiple-pulse sequences, which is a severe limitation. The present design is based on the generation of logic level pulses of variable duration on various output channels under the control of 32-bit-wide words. These data words are loaded from the control computer and stored in a 64-deep first-infirst-out (FIFO) memory. A FIFO memory is used rather than a random access memory so that new data are available at the output with only a minimal delay. A secondary advantage is that no addressing logic is required. The 64-deep FIFO memory provides a stack of up to 63 data words each of which may define a different pulse. This limit would clearly be a serious handicap and so to circumvent this, the FIFO output is copied back into its input so that some or all of the pulse sequence can be repeated cyclically for as long as required. The total number of pulses in a given run can be preset and the sequence of events restarted or reset by the control computer. Output pulses defined in length by both analog and digital circuitry can be selected. Each data word includes a time interval code. On execution of the word, this code is loaded into a counter which is decremented by a clock whose frequency is also defined in the word. When the counter reaches zero, a short pulse (PGM) is generated and the counter is then loaded with the time interval code from the next data word in the FIFO memory. This sequence of events enables continuous digital synchronization of the output pulses * Author to whom correspondence should be addressed. 207
f~~l22-23~4/Xi~/l~50207-l~~$02 011111 Copyright Q 1980 by Academic Press. Inc All rrghts of reproductmn in any form reserved Printed m Great Rrltaln
208
COSGROVE,
LITTLER,
AND STEWART
with the standard frequency source (1 MHz) from which the clock frequency is derived. The timing accuracy is thus only limited by the stability of the l-MHz source. The PGM pulse thus generated is steered into the appropriate channel by means of control bits in the data word. The output channels are connected directly to either rf gates or various other devices which are to be controlled. The timing accuracy of the sequencer is independent of the control computer and so a relatively inexpensive microprocessor can easily be used to drive the device. In this instance a 16-bit PDP 1 lVO3 has been used but with a simple modification to the input circuitry an S-bit device could be employed. The width (32 bits) of the FIFO memory is chosen to provide enough flexibility for the timing and steering of each pulse for all foreseeable requirements. The depth (64 words) is chosen to provide a sufficiently long basic cycle. However, the design is such that it can easily be expanded. In particular a greater word capacity can be provided by simply cascading memory chips. MEMORY
OPERATION
The description of the memory operation can be conveniently the following sections.
broken down into
Read Mode
The data input to the sequencer is buffered and four separate 16-bit latches Ll-4 (see Fig. 1) are used. The control circuitry for loading the latches is labeled Gl. The control line CSR is asserted to put the sequencer into the read mode and this automatically directs the first 16-bit input word to Ll. Ll is loaded by the NDR pulse, which in this instance is obtained directly from the computer when a valid word appears on the output interface. The first word in Ll contains the number of pulses per burst and can be set in the range 2 to 216. A second NDR pulse loads word 2 into L2 and this contains a special delay code, whose range is 2 to 21° psec. This delay can be used for strobing an ADC and is described fully later. the third NDR pulse loads L3 with the lower 16 bits of the first data word and L4 with the higher 16 bits. After the fourth NDR pulse the data in L3 and L4 are loaded into the FIFO memory via the shift in (SI) delay. The data word then drops to the bottom of the memory stack and the output-ready flag (OR) is asserted when valid data appear on the output lines of TABLE
1
Bits output from memory 23
24
1 0 0 0
1 1 0 1
Bits input to memory Action Word Word Word Word
enabled enabled first cycle disabled second cycle disabled after second cycle
23
24
1 0 0 0
1 0 1 1
COMPUTER-CONTROLLED
PULSE
SEQUENCER
209
the FIFO memory. Subsequent pairs of NDR pulses load L3 and L4 alternately and hence progressively fill the memory with consecutive pulse words. Bit 32 of the pulse word contains the reset code. If this is asserted then the whole system is cleared and reset after the fourth NDR pulse and no words are loaded into memory. The software for implementing the “master reset” is illustrated in the Appendix. A separate manual master reset is also available. Run Mode
The run mode is activated by clearing CSR, which isolates the read gating circuitry Gl, switches the 32-bit multiplexer Ml to enable word recycling and activates the run gating logic G2. A subsequent NDR pulse loads the pulse counter Cl with the value stored in Ll, loads the first data word into the (8 x 4)-bit output latches (via CDR) and also rewrites it into the top of the FIFO memory, and finally enables the l-MHz clock. As soon as the data word has been latched and recycled a shift-out pulse (SO) is generated which strobes the next data word to the FIFO output. This word is thus ready for use within a fraction of the clock period. The low-order bits of the pulse word, 0 to 12, contain the time delay codes. Bits 0 to 9 enable a digital counter to be set in the range OOO+ 1023 and bits 10 to 12 determine its input clock frequency which is available in powers of 10 from 1 MHz to 1 Hz. The maximum delay that can be set is therefore lo3 set and the minimum 1 ksec. The appearance of the delay codes on the output latches sets the lo-bit delay counter C2 and enables the appropriate clock frequency. When the delay counter reaches zero it generates a fast -50-nsec PGM pulse which is guided to the I-----.-
FIG.
RESET EOC
1. Schematic
-
diagram
/
of the pulse
sequencer.
210
COSGROVE,
LITTLER,
AND
STEWART
appropriate output channel. This pulse’s trailing edge is used to load the next data word into the output latches and reset the decade counters Dl. In order to maintain timing accuracy this must be completed in less than half of the basic l-MHz clock period. This sequence of events is repeated for each pulse word. The signal OR, which becomes true each time a word appears at the FIFO output, is used to decrement the pulse counter Cl. The sequence is halted when this count reaches zero by gating-off the master clock frequency (via the EOC pulse). The sequence can be restarted without the need to reload the memory by simply issuing another NDR pulse. The sequence repetition time, which in general will be of the order of 3T1, the spin-lattice relaxation time, is conveniently set by software (using a real time clock). Alternatively a long delay can be set in the first word of a sequence which is subsequently used cyclically. Dynamic
Modification
Often in multiple-pulse sequences (greater than 63 pulses) several initial pulses are required to set the system into a predetermined state, followed by a series of decoupling or refocusing pulses. Bits 23 and 24 are used to set “initial” pulses which are only enabled during the first complete memory cycle and are inhibited until the sequence is restarted. For a normal pulse both bits are set (see Table 1) and the sensing circuitry Sl is inactive. Data words in which bit 24 is set and 23 is clear will be loaded into the output latches and executed during the first cycle after a restart, but will be copied back to the FIFO input with bit 24 cleared. The sensing circuit detects bit 24 clear in the second cycle and prevents these words from loading into the latch by generating an immediate SI and then an SO pulse. These words, however, are copied back with bit 24 reset. In subsequent cycles the initial words are disabled but remain in the correct place and form in the memory to be re-executed when the sequence is restarted. Pulse Decoding Logic
In NMR experiments there are requirements for both analog and digital rf pulse length control. Analog pulse controls are particularly convenient for setting 0 to 360” pulse lengths to high accuracy. However, in rotating-frame and double-resonance experiments digital control is more useful, in order to control the pulse length precisely and reproducibly. The current design provides eight separate analog pulse length controls. These are conveniently divided into four A controls and four B controls. These pulses can be directed to any one of eight output channels. Typically these output channels are used to derive rf pulses of four different phases X, Y, -X, and -Y at two different frequencies. In normal circumstances (bit 25 clear), Al-4 are connected to one frequency channel and Bl-4 to the other. However, if more than four analog pulse lengths are required at one frequency (for example, using an MREVS sequence coupled with a T1 (5) measurement), then setting bit 25 will cross the pulses from the A channel controls to the B channel outputs and vice versa. To maintain timing accuracy there can be no delay in latching new words. For the analog pulses it is therefore possible that the output codes may change before the
COMPUTER-CONTROLLED
PULSE
TABLE Bits
SEQCJENCER
21 I
2
Function select
0-9 10-12
DELAY DECADE Dl CLOCK FREQUENCY 1 MHz-1 Hz SELECT ANALOG PULSE GENERATOR l-4 SELECT A, B, C, OR A+B C CHANNEL; TRIGGER PULSE OR TIMED PULSE MODE X, Y -X, -Y OUTPUT CHANNEL A C CHANNEL OUTPUT l-8 SET INITIAL OR NORMAL PULSE CROSS OVER A AND B OUTPUTS A CHANNEL; ANALOG OR DIGITAL MODE X, Y, -X, -Y OUTPUT CHANNEL B B CHANNEL; ANALOG OR DIGITAL MODE SPARE MASTER RESET
13-14 15-16 17 18-19 20-22 23-24 25 26 27-28 29 30 31
pulse is terminated. To prevent this the output rf phase channel selection codes are latched a second time by the rising edge of the analog pulse and are not reset to the c next code until the pulse has timed out. Both the A and B channels can be driven independently by digital pulses by setting the appropriate mode controls (see Table 2). Note that two pulse words are required to set a digital pulse and this is illustrated in Fig. 2. The first word (W2) sets the interval between the end of the previous operation and the digital pulse starting (PGM sets a bistable) and a subsequent word (W12) can then terminate the digital pulse (PGM clears the bistable). The length of the pulse is determined by the delay specified in the “stop” word added to the delays of any intermediate words. If required, simultaneous pulses (e.g., W2, Fig. 2) can be initiated on channels A and B by setting the correct codes (Table 2). A digital pulse length can be set up to a maximum - lo3 set and hence there is some inherent danger of overloading pulse
ffiM
w1n
W2
AlAX
w3
WL jj
W6
Jws
BDBX
W8
w9nr
Wl
FIG. 2. Illustration of a typical pulse sequence Wl-12 the text) required to generate this sequence.
q-p0
Wll
CB
il
relates to the twelve data words (referred to in
212
COSGROVE,
LITTLER,
AND
STEWART
amplifiers, probes, and detectors. Software controls can act as a safeguard but as an additional precaution a digital alarm circuit has been employed. The leading edge of any rf pulse sets a counter into operation which is clocked by a 30-Hz clock, the trailing edge of the pulse stops and resets the counter. If the counter reaches a predetermined time, in our case 500 msec, the system automatically generates a master reset and sounds an audible alarm. The run is thus aborted. This protection is also useful in the event that a noise-spike sets one of the output bistables. In NMR experiments several other digital pulses are often required, for triggering, gating detectors, field gradient pulses, ADCs etc. (see Fig. 2); to this end a further eight channels designated Cl-8 have been incorporated. These channels can be controlled independently and can output either a short - 50-nsec pulse (e.g., W7, Fig. 2) or a timed digital pulse. Channel C8 has been incorporated specifically for burst operation (W4, W5). The overflow pulses generated by repeatedly counting down in C3 the value stored in L2 (range 1 MHz to 1 kHz) are output when the digital mode is selected. This train of equally spaced pulses can be used, for example, to drive an ADC for signal collection. Table 2 summarizes the complete pulse code logic. Figure 2 shows a typical complex sequence that can easily be programmed. Both analog rf pulse lengths (AlAX; channel A analog length 1 output on channel A, phase X) and digital rf pulses (ADAY, ADBX; D for digital) are shown. The top row shows the sequence or PGM pulses which are subsequently fed into the various channels. This sequence is the now familiar cross-polarization experiment (6). Note that in this spectrometer system, independent flags are generated when it is necessary for the computer to read spectral data; however any of the remaining C outputs could easily be used. Another useful feature of the design is the ability to set several short sequences which can run consecutively. One such sequence is an amplitude reversal sequence where a spectrum is observed with an alternating sign after successive pulses trains. In this case if both the sequences have five pulses, the pulse counter is set to 6 (this is necessary to ensure a restart at the correct place in the sequence; pulse word 6 is a dummy in the sense that the output channel specified has no function) and twelve pulse words are loaded into the FIFO memory. On the first NDR pulse sequence 1 is issued and on the second, sequence 2, the sequences subsequently alternating.
Programming
Several computer programs have been devised which enable different levels of user interaction with the sequencer. The minimum requirement is merely a sequence of 16-bit words which define a given sequence; however, a more sophisticated program leads to easier operation of the spectrometer system. For example, when an MREV 8 sequence is required several sequences must be set up and executed to preset accurate pulse lengths on all four phase channels (X, -X, Y, -Y) and also accurate 90” phase shifts between channels. The sequencer has been built on seven standard logic boards and utilizes 110 integrated circuits. A full logic circuit diagram and computer programs are available on request from the authors.
COMPUTER-CONTROLLED
PULSE SEQUENCER
2! i
CONCLUSION
A pulse sequencer is described which enables virtually any current pulsed NMR experiment to be carried out under computer control. The philosophy of the design is such that the device can be expanded to fit virtually any requirement and may have applications outside NMR experiments. APPENDIX: EXAMPLE CODING OFA MASTERRESET ROUTINEFOLLOWED THELOADING OFASINGLE ANALOG 90" PULSE (AlAX)
BY
The delay set is 512 msec and 215 pulses will be output before the sequence terminates. PGM = address of the 16-bit output register. CSR = address of the 16-bit control register. ; MASTER RESET SEQUENCE FIRST MOV#2, @ #CSR; READ MODE (CSR BIT 1 SET) MOV# 100, @ #PGM; LOAD LI WITH DUMMY VALUE ; NB ACCESSING PGM REGISTER GENERATES AN NDR PULSE MOV # 100, @ # PGM; LOAD L2 WITH DUMMY VALUE MOV # 100, @ # PGM; LOAD L3 WITH DUMMY VALUE MOV# 100100, @ #PGM; LOAD L4 WITH DUMMY VALUE : BIT 31 IS SET IN L4 SO DO A MASTER RESET ; NOW LOAD REQUIRED SEQUENCE MOV # 100000, @ # PGM; NO OF PULSES MOV # 5, @ # PGM; C8 FREQUENCY 200 KHZ MOV# 106777, @ # PGM; CODES FOR 512-msec DELAY, PULSE AlAX MOV # 2601, @ # PGM; ; SET SEQUENCER INTO RUN MODE MOV#O, @#CSR ; TRIGGER SEQUENCE I.E. GENERATE NDR MOV # 0, @ # PGM; START SEQUENCER ; SEQUENCE WILL STOP IN- 280 hr : UNLESS ANOTHER MASTER RESET IS ISSUED ACKNOWLEDGMENTS The authors are indebted to Mr. R. A. Jarvis and Mrs. M. Sutherland for their help in testing the pulse sequencer and writing the computer programs.
REFERENCES 1. J. R. DICK, J. Phys. E. 9, 1054 (1976). 2. D. G. TAYLOR, S. BOOTH AND P. S. ALLEN,]. Phys.E. 3. T. W.ORTH AND C.J.BURNETT, J. Magn.Reson.29,39
105 (1974). (1978).
7,
214
COSGROVE,
LI’ITLER,
AND
STEWART
4. J. D. ELLETT, JR., M. G. GIBBY, U. HAEBERLEN, L. M. HUBER, M. MEHRING, A. PINES, J. S. WAUGH, Adv. Magn. Reson. 5, 117 (1971). 5. M. MEHRING, “High Resolution NMR in Solids”, p. 192, NMR Basic Principles and Progress, 11, Springer-Verlag. New York/Berlin, 1976. 6. A. PINES, M. G. GIBBY, AND J. S. WAUGH, J. Chem. Phys. 56,1776 (1972).
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