ARTICLE IN PRESS
INTEGRATION, the VLSI journal 41 (2008) 360–370 www.elsevier.com/locate/vlsi
A fast congestion estimator for routing with bounded detours Lerong Chenga, Xiaoyu Songb, Guowu Yangb, William N.N. Hungb,, Zhiwei Tangb, Shaodi Gaoc b
a Department of EE, University of California, Los Angeles, USA Department of Electrical and Computer Engineering, Portland State University, OR, USA c IBM, EDA Lab, Hopewell Junction, NY 12533, USA
Received 19 July 2007; received in revised form 23 September 2007; accepted 24 September 2007
Abstract Congestion estimation is an important issue for design automation of the VLSI layout. Fast congestion estimation provides an efficient means to adjust the placement and wire planning. A probabilistic model of interconnections enables designers to quickly predict routing congestion. We propose a powerful and fast estimation approach that allows wires to have bounded-length detours to bypass congestions. The method is more realistic and precise than the previous work. The experimental results demonstrate the effectiveness of the method on routing benchmarks. r 2007 Elsevier B.V. All rights reserved. Keywords: VLSI routing; Probabilistic methods; Estimation
1. Introduction As deep-submicron fabrication technology advances, billion-transistor chips will be feasible in future. Estimation of the routing area becomes a crucial issue for a hierarchical design process and a necessity for top-down design styles [2]. With varieties of intellectual property (IP) from multiple sources, the estimation of the wire area becomes a more difficult issue in the development of the giga-transistor chip [1,2,4]. Fast congestion estimation provides an efficient means to adjust the placement and wire planning [1,2,4–8,15]. With sizes on the order of hundreds of cells and thousands of connections, a probabilistic model of interconnections will enable designers to quickly compute estimates of the routing congestion. There has been some work on probabilistic models. Gamal [9,10] considered the problem of estimating interconnections area for integrated circuits. He obtained upper bounds on the dimensions of the routing channels and the estimates of chip area. Kurdahi et al. [11] presented an area estimator for standard Corresponding author.
E-mail address:
[email protected] (W.N.N. Hung). 0167-9260/$ - see front matter r 2007 Elsevier B.V. All rights reserved. doi:10.1016/j.vlsi.2007.09.003
cell layouts. They assumed rows of equal size, double entry cells, constant pin pitch, two-terminal nets, and minimum rectilinear connection paths. Their model, however, requires knowledge of average interconnection length that is computed by fitting curves to known data. Lou et al. [7] presented a fast probabilistic estimation for congestion. They assumed each net uses the shortest route and each possible route has the same usage probability. Base on such assumption, they estimate the congestion for the routing area. In practice, the placement and routing problems are hardly solved optimally due to their computational complexity. The previous probabilistic approaches are not sufficiently accurate as the shortest routes are merely considered in their restricted models. A more precise prediction should incorporate congestion-related detouring in the model to reflect the actual practice. In this paper, we propose a novel model where wires are allowed to have bounded-length detours to bypass congestions. We present a probabilistic method to estimate the congestion of interconnect wires. The method is more realistic and precise than the previous work. The experimental results demonstrate the effectiveness of the method on routing benchmarks.
ARTICLE IN PRESS L. Cheng et al. / INTEGRATION, the VLSI journal 41 (2008) 360–370
The organization of this paper is as follows: Section 2 defines the estimation model. In Section 3, we establish our result on probabilistic congestion estimation. In Section 4, we report some experimental results performed for the model. Section 5 concludes the paper. 2. Problem formulation
361
n+d extended usage area
d
n
1
n+1
Bounded box for shortest route
0
Given a set of nets, the routing area can be decomposed into grids. An edge is a border between two grids. The capacity of an edge is the number of available tracks crossing the edge and the density of an edge is the number of routes crossing the edge. Given a set of nets, we estimate the density of each edge of the routing area. We restrict our discussion on two-terminal nets. The model can be extended to handle the case for multi-terminal nets by using rectilinear Steiner tree or minimum spanning tree. Without loss of generality, we assume that the terminals are located at the lower left and upper right grids. The lower left terminal is the start terminal and the upper right terminal is the end terminal of the net. The direction of the route is from the start terminal to the end terminal. A forward segment is a route segment that goes continuously up or right. A reverse segment is a route segment that goes continuously down or left. Since we do not restrict the net route with the shortest length, the routes may not be monotonic. We use the coordinate on the grid. The coordinate of the grid containing the start terminal is assigned as (0, 0) and the coordinate of the grid containing the end terminal is assigned as (m, n), mX0 and nX0, as shown in Fig. 1. If a route contains reverse segments, it will increase the total wire length, thus increasing delay. To limit the wire length, we make the following assumptions for each route. Assumptions. : (i) The route contains only one reverse segment. (ii) The reverse segment is a straight line. (iii) The length of the reverse segment is bounded by no more than d+1 grids, dX0 is an integer. After observing the result of the global router, we found that about 70% of the detour nets will have the form we discuss above. That means our assumption for the detour nets are reasonable. By allowing the route to go down or left, the legal usage area is actually extended. As shown in Fig. 2, (m, n) is the end terminal coordinate and d+1 is the bound of the
−d … −1 0 −1
1
m
2
… m+d
−d m+1 Fig. 2. The expanded routing area for non-monotonic route.
reverse segment. This models the actual layout where the shortest route is not always achievable. Consider the dual graph of the grid model [7] as the routing mesh model in Fig. 3. Each grid is represented by a node and the line segment connecting two adjacent nodes represents the line between two adjacent grids. The coordinate of each grid in the grid model is that of the corresponding point in the routing model. In the routing mesh model, a unit line is the line connecting two adjacent nodes. The length of the route is the number of unit lines covered by the route. Node (0, 0) is the start point of the route and node (m, n) is the end point of the route. Both the start and end points are extreme points of the route. Since the reverse segment of the route can go through no more than d+1 grids, the length of the reverse segment is no more than d in the routing mesh model. The capacity and density of each edge in the grid model becomes the capacity and density of the corresponding unit line in the routing mesh model, respectively. 2.1. Problem statement Given a set of two-terminal nets in the routing mesh model, estimate the density of all the edges for all routes satisfying the following constraints: (i) The route contains only one reverse segment. (ii) The reverse segment is a straight line. (iii) The length of the reverse segment is bounded by no more than d+1 grids, dX0 is an integer. 3. Probabilistic estimation
n
End terminal
Forward segment
2 1 Start terminal
0
Reverse segment 0
1
2
3
…
m
Fig. 1. A non-monotonic path from (0, 0) to (m, n).
In what follows, we first compute the density of the edges under each single net, and then sum up all the result to get the total congestion. The previous probabilistic analysis work [7] assumes that the nets are routed using the shortest path. Our model relaxes this restriction. It gives flexibility for the wires to have bounded-length detours to bypass congestion regions and blockages.
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Each node in the routing mesh represents a grid in the grid model
n
n
unit line 1 1 0 0
0 0
1
2 … grid model
1
2
…
m
m routing mesh
Fig. 3. The grid model and its dual mesh model.
In this section, we introduce our probabilistic estimation method. To estimate the total congestion, we first compute the total number of possible routes for a two-terminal net, and then compute the number of possible routes that pass each unit line. Finally, we compute the density of each unit line for a two-terminal net. In addition, estimation strategies are given to handle routing blockages.
A monotonic route from (0, 0) to (x−1, y) (0, 0)
(x-1, y)
(x, y−l)
(m, n)
Notation 1. u(m, n) is the number of routes that go monotonically from (0, 0) to (m, n).
(0, 0)
A monotonic route from(1, y−l) to (m, n)
(1, −l )
ðno0Þ _ ðmo0Þ Otherwise
Notation 2. total_number(m, n, l) is the total number of routes going from (0, 0) to (m, n) with the reverse segment length l (lX0). Theorem 2. total_number_vðm; n; lÞ 8 m < C mþn ¼ n1 : ðm þ 1ÞC m1 mþnl1 þ ðn þ 1ÞC mþnþl1
l¼0 l40
Proof. :Consider the following two cases. Case 2.1. l=0. There is no reverse segment in the route, so the route is monotonic. The total number of routes is: total_number(m, n, 0)=u(m, n)=Cmm+n. Case 2.2. l40. Case 2.2.1. The reverse segment is vertical. Case 2.2.1.1. The vertical segment does not connect the extreme points as shown in Fig. 4. Suppose the reverse segment is from (x, y) to (x, yl). The route goes monotonically from (0, 0) to (x1, y), and then passes through the reverse segment, and moves monotonically from (x+1, yl) to (m, n). So the number of routes that cross this reverse segment is: uðx 1; yÞ uðx þ 1; n y þ lÞ.
(x+1, y−l)
Fig. 4. The vertical reverse segment does not connect the extreme points.
3.1. The total number of routes
Theorem 1. [7,13,14] ( 0 uðm; nÞ ¼ C nmþn ¼ ðm þ nÞ!=m!n!
(m, n) A monotonic route from (x+1, y−l) to (m, n)
(x, y)
Fig. 5. The reverse segment connects the terminal.
As the vertical reverse will not appear in the first row and the last row (except when it connects the extreme points), the range of the point (x, y) is: 1pxpm1, 0pypn+l. The number of routes that have a vertical reverse segment (which does not connect the extreme points) is: m1 nþ1 XX
uðx 1; yÞ uðm x 1; n y þ lÞ
x¼1 y¼0
¼
m1 X nþ1 X
mx1 C x1 xþy1 C mþnþlxy1
x¼1 y¼0
¼ ðm þ n þ l 1ÞC m2 mþnþl2 . The derivation of this equation is proven in Appendix A. Case 2.2.1.2. The reverse segment connects the extreme points, as shown in Fig. 5. The reverse segment connects the start point, the route first goes through the reverse segment and reaches point (1, yl), then the route moves monotonically from (1, l) to (m, n). If the reverse segment connects the end point, the situation is symmetric to the above case. The number
ARTICLE IN PRESS L. Cheng et al. / INTEGRATION, the VLSI journal 41 (2008) 360–370
ment length is l. (iii) It passes through the vertical unit line (x, y)-(x, y–1).
of such routes is 2 uðm 1; n þ lÞ ¼ 2 C m1 mþnþl1 . Combining Cases 2.2.1.1 and 2.2.1.2, the number of routes containing vertical reverse segment is m1 ðm þ n þ l 1ÞC m2 mþnþl2 þ 2 C mþnþl1
¼ ðm þ 1ÞC m1 mþnþlþ1 . The derivation of this equation is proven in Appendix B. Case 2.2.2. The reverse segment is horizontal. Similar to Case 2.2.1, the number of routes that have the horizontal reverse is: ðn þ 1ÞC n1 mþnþl1 . Combining Case 2.2.1 and Case 2.2.2, Theorem 2 holds under Case 2.2. & 3.2. Number of routes crossing a unit line 3.2.1. Vertical unit line Let (x, y)-(x, y–1) represent the vertical unit line connecting two points (x, y) and (x, y–1) as shown in Fig. 6. In what following, we will use (x, y)-(x, y–1) to represent such unit line. If the length of the reverse segment is l, the ranges of x and y are: lpxpm+l, l+1p ypn+l (lX0), respectively, as the unit lines out of this area
Notation 4. r_v(m, n, l) is the number of routes such that each route has the following features: (i) It goes from (0, 0) to (m, n). (ii) Its reverse segment length is l. (iii) When the reverse segment is vertical, it should not connect the start point (or end point). Lemma 3.1. ( r_vðm; n; lÞ ¼
are not in the usage area. The coordinate can be negative numbers as the route can go down or left. Notation 3. number_of_route_v(x, y, m, n, l) is the number of routes such that each route has the following features: (i) It goes from (0, 0) to (m, n). (ii) Its reverse seg-
(0, 0)
(x, y−1) Fig. 6. A vertical unit.
(m, n)
1
ðm ¼ 0Þ ^ ðn ¼ lÞ
n1 mC m1 mþnþl1 þ ðn þ 1ÞC mþnþl1
Otherwise
Proof. If (m ¼ 0)4(n ¼ l), then r_v(m, n, l) ¼ 1. From Case 2.2.1.1 and Case 2.2.1.2, if the reverse segment is vertical, the number of such routes is: m1 m1 ðm þ n þ l 1ÞC m2 mþnþl2 þ C mþnþl1 ¼ mC mþnþl1 .
From Case 2.2.2, if the reverse segment is horizontal, the number of such routes is ðn þ 1ÞC n1 mþnþl1 . Combining the two cases, we obtain Lemma 3.1.
number_of _route_vðx; y; m; n; lÞ 8 0 > > > > > > > > > > > > > > > > > mx > > C y1 > xþy1 C mþnxy > < ¼ C m1 mþnþl1 > > > > > r_vðx; y 1; lÞ uðm x; n yÞ > > > > > > þuðx; y 1Þ r_vðm x; n y; lÞ > > > > > minðyþl1;nþlÞ > P > > þ uðx 1; rÞuðm x 1; n r þ lÞ > > : r¼maxð0;yÞ
(x, y)
363
&
ðxo lÞ _ ðx4m þ lÞ _ ðyo1 lÞ _ ðy4n þ lÞððxo0Þ ^ðy4nÞÞ _ ððxo0Þ ^ ðyp0ÞÞ _ ðx4mÞ ^ðy4nÞÞ _ ððx4mÞ ^ ðyp0ÞÞ l¼0 ðl40Þ ^ ðððx ¼ 0Þ ^ ðyp0ÞÞ _ ððx ¼ mÞ ^ ðy4nÞÞÞ Otherwise
Theorem 3. Proof. We consider four cases. Case 3.1. (xo–l)3(x4m+l)3(yo1–l)3(y4n+l)3 ((xo0)4(y4n))3((xo0)4(yp0))3((x4m)4(y4n))3((x4m)4(yp0)). The vertical unit line is not in the usage area. The number of routes crossing this vertical unit line is 0. Case 3.2. l ¼ 0. There is no reverse segment. The number of routes crossing this vertical line is the product of the number of monotonic routes go from (0, 0) to (x, y–1) and the number of monotonic routes that go from (x, y) to (m, n): mx uðx; y 1Þ uðm x; n yÞ ¼ C x1 xþy1 C mþnxy :
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Case 3.3. (l40)4(((x ¼ 0)4(yp0))3((x ¼ m)4(y4n))). As shown in Fig. 7, the vertical unit line is in the route only when the reverse segment starts from point (0, 0) or end at point (m, n) (the two cases are symmetric). In other words, the reverse segment connects the start point (or the end point). Thus the number of routes equals the number of monotonic routes that start from (1, l) to (m, n):
Case 3.4.3. The vertical unit line is on the reverse segment. Assume the reverse segment is from (x, r) to (x, rl). If the route contains such reverse segment, it goes monotonically from (0, 0) to (x1, r), passes the reverse segment and goes monotonically from (x+1,rl) to (m, n), as shown in Fig. 9. The number of such routes is uðx 1; rÞ uðm x 1; n r þ lÞ.
uðm 1; n þ lÞ ¼ C m1 mþnþl1 .
Obviously, the range of r is max(0, y)prpmin(y+l1, n+l). Thus, the total number of routes in Case 3.4.3 is minðyþl1; X nþ1Þ uðx 1; rÞ uðm x 1; n r þ lÞ:
Case 3.4. Otherwise. Case 3.4.1. The unit line is in the forward segment and there is a reverse segment before the vertical unit line. We calculate the number of routes crossing the vertical unit line. In this case, the route starts from (0, 0), passes the reverse segment and then reaches point (x, y–1). Notice that the reverse segment does not connect point (x, y–1). The number of such routes is r_v(x, y1, l). When it passes the unit line (x, y–1)-(x, y), it will go monotonically from (x, y) to (m, n) as shown in Fig. 8. The number of such routes is: u(mx, ny). Therefore, the total number of routes in Case 3.4.1 is: r_v(x, y1, l) u(mx, ny). Case 3.4.2. The reverse segment occurs after the vertical unit line. Similarly, the number of such routes is: u(x, y1) r_v(mx, ny, l).
r¼maxð0;yÞ
Combining Cases 3.4.1, 3.4.2 and 3.4.3, the number of routes in Case 3.4 is r_vðx; y 1; lÞ uðm x; n yÞ þ uðx; y 1Þ r_vðm x; n y; lÞ þ
Therefore, the theorem holds.
&
3.2.2. Horizontal unit line Similarly, we can compute the number of routes passing through the horizontal unit line (x, y)-(x–1, y). The ranges of x and y are: –l+1pxpm+l, –lpypn+l, (lX0, mX0, nX0), respectively.
monotonic route from (1, −l) to (m, n)
(x, y) (x, y−1)
uðx 1; rÞ uðm x 1; n r þ lÞ:
r¼maxð0;yÞ
(m, n) (0, 0) reverse segment connecting the start point
minðyþl1; X nþ1Þ
Notation 5. number_of_route_h(x, y, m, n, l) is the number of routes such that each route has the following features: (i) It goes from (0, 0) to (m, n). (ii) Its reverse segment length is l. (iii) It passes through the horizontal unit line (x, y)-(x–1, y).
(1,−l)
Fig. 7. Case 3.3: (l40)4(((x ¼ 0)4(yr0))3((x ¼ m)4(y4n))).
(m, n) monotonic route from (x, y) to (m, n)
(x, y) The route containing reverse segment from (0, 0) to (x, y–1)
(x, y–1)
(0, 0) Fig. 8. The reverse segment occur before the unit line.
(x–1, r) A monotonic route from (0, 0) to (x–1, r)
(x, r) (x, y)
(m, n) A monotonic route from (x+1, y–l) to (m, n)
(x, y–1) (0, 0)
(x, r–l)
(x+1, y–l)
Fig. 9. The vertical unit line is on the reverse segment.
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Obviously, the number of routes passing through the horizontal unit line (x, y)-(x–1, y) in the m n routing mesh is equal to the number of routes across the vertical unit line (y, x)-(y, x–1) in the n m routing mesh. As a result, we have:
365
Then the density of each unit line can be compute as den_vðx; y; m; nÞ ¼
d X
Pðr; lÞ
l¼0
number_of _route_vðx; y; m; n; lÞ , total_numberðm; n; lÞ
number_of _route_hðx; y; m; n; lÞ den_hðx; y; m; nÞ
¼ number_of _route_vðy; x; n; m; lÞ.
¼
3.3. Density-capacity ratio
d X
Pðr; lÞ
l¼0
In practice, detour does not distribute evenly. In high congestion places, detour occurs very often. If the nets are placed well enough, there will not be any detour. Therefore, we cannot assume each net will have detour. But how can we know which nets have detours. Here we introduce the density-capacity ratio. Notation 6. The density-capacity ratio for a net(i) is defined as the ratio of average density to average capacity in the bounded box of the net. When the density to capacity ratio is high, that means the net is in the high congestion place, the probability that the net has detour is high. Table 1 shows detour length probability under each density to capacity ratio. From the statistics, we find that the detour length of the net is seldom larger than 4. Based on the density to capacity ratio, we can know the probability that the net will have detour or not. For example, when the density to capacity ratio is 0.7, the probability that the detour length of the net is 0, 1, 2, 3, or X4 are 0.9539, 0.0209, 0.0065, 0.0042, 0.0161, respectively. In practice, we do not know the density to capacity ratio before the nets are routed. But fortunately, we can first use the probability estimation without detour to do the initial density estimation, and then we can compute the density to capacity ratio from the initial estimation. 3.4. Density of a unit line Notation 7. den_v(x, y, m, n) is the density of a vertical unit line (x, y)-(x, y1) in the m n routing mesh. Notation 8. den_h(x, y, m, n) is the density of an horizontal unit line (x, y)-(x1, y) in the m n routing mesh.
number_of _route_hðx; y; m; n; lÞ , total_numberðm; n; lÞ
where d is the maximum length of the detour and p_l(r, l) is the probability that the net with density to capacity ratio r will have detour length l, which can be determined by the statistic of the global routing result in Table 1 of Section 3.3. After computing the density of a unit line for each net, we compute the total density of each unit line. For each m n routing mesh, the computational complexity is O(m n max(m, n)). 3.5. Handling blockages The routing blockage is modeled by lowering the capacity of the unit lines in the routing mesh model. We show how to compute the density of each unit line with blockage. First let us observe an easy example. For the nets shown in Fig. 10, suppose the unit line a is completely blocked. For convenience, here we consider only the shortest path, but case for the routes with detour will be similar. If a is not blocked, for net(B1, B2) there are 15 possible routes, the estimated density for the unit lines :b, c, d, e, f, g, h and i are: 4/15, 2/15, 6/15, 6/15, 6/15, 3/15, 5/15 and 1/15 respectively, when a is blocked, there are only 12 possible routes for net(B1, B2), and the estimated density for the unit lines b, c, d, e, f, g, h and i are: 4/12, 2/12, 6/12, 4/12, 3/12, 3/12, 5/12 and 1/12 respectively. We can find that under net(B1, B2), the density of b, c, d, g, h, i increases and the density of e, f decreases. In the same way, we can find the under net(A1, A2), the density of b, c, e, f, h, i increases and the density of d, g decreases. Here we can find when a is blocked, the total density of b, c, h, i will increase, while the effect to d, e, f, g will be cancelled out (although it is not
Table 1 Detour length DCR
0
1
2
3
X4
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7
1 0.9995 0.9992 0.9955 0.9946 0.9765 0.9664 0.9539
0 0.0005 0.0008 0.0038 0.0036 0.0078 0.0175 0.0209
0 0 0 0.0004 0.0006 0.0025 0.0041 0.0065
0 0 0 0.0001 0.0003 0.0026 0.0038 0.0042
0 0 0 0.0001 0.0008 0.0106 0.0131 0.0161
A1
d h B1
b
a f
B2
e c
i
g A2
Fig. 10. Simple example for blockage.
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completely cancelled out in this simple case, when there are large number of nets, this effect to the unit line d, e, f, and g will approximately be cancelled). From the example, we can find that if a vertical unit line is blocked, its density will distribute to the adjacent unit lines in the same row, while the blocked vertical unit line will not affect the density of the horizontal unit lines. Moreover, we can also find that the closer to the blocked unit line, the more density did the adjacent unit lines received. In practice, the blockage will can be modeled as lowering the capacity of the unit line. Let cap_v(x, y) and cap_h(x, y) denote the capacities of the vertical unit line (x, y)(x, y–1) and the horizontal unit line (x, y)-(x–1, y), respectively. Let nor_cap denote the capacity of the unit line without blockage, called the normal capacity. Without blockage, we have cap_v(x, y) ¼ nor_cap and cap_v (x, y) ¼ nor_cap. With blockages, we have cap_v (x, y)onor_cap and cap_h(x, y)onor_cap. If the unit line is completely blocked, cap_v(x, y) ¼ 0 and cap_h(x, y) ¼ 0. Based on the statistics, we found that if the density change caused by blockage will be Density_blockðx; yÞ ¼ den_vðx; yÞ cap_vðx; yÞ=nor_cap where the Density_block(x, y) is the density of the vertical unit line (x, y) and den_v(x, y) is the density of such unit line when there is no blockage. The density of the blocked unit line is lowered. We define the remaining density as remaining_den ¼ den_v(x, y, m, n) (1–cap_v(x, y)/nor_cap). As discussed above, such density is distributed to the unblocked neighboring unit lines in the same row. And the unit lines that are closer to the blocked unit line will be granted by a higher distributed density. Under such assumption, for any blockage, we can divide the blockage in to two kinds, single blocked unit line and adjacent blocked unit line (blocked group), as illustrated in Fig. 11. Here we discuss the density distribution of these two kinds of blocked unit line separately.
buted density only affects the unit lines whose distance to the block unit line is less than a bound B (in our statistics, B ¼ 3). And the distributed density will be about: distributed_densityðsÞ w_disðsÞ remaining_den P , ¼ w_disðsÞ spB
where s denotes the distance between the unblocked neighboring unit line and the blocked unit line, as shown in Fig. 12. (2) Adjacent blocked unit line Several adjacent unit lines are blocked, as illustrated in Fig. 13. Such block unit lines form a blocked group. Here the remaining density of the blocked group is defined as the sum of remaining densities of all unit lines in the blocked group. The distance to the blocked group is defined as the distance to the fringe of the group, as shown in Fig. 13. Based on the statistics, the distributed density is about: distributed_densityðsÞ w_disðsÞ remaining_den_block_group P ¼ . w_disðsÞ spB
The horizontal blocked unit lines can be handled similarly.
3.6. Estimation procedure and complexity The estimation procedure is given as follows. We compute the density of every unit line under each net and
blocked unit line s
(1) Single blocked unit line Any neighboring unit line to the blocked unit line is unblocked. Based on our statistics, the distrithe remaining density distributes to the neighboring unit lines in the same row Block
Fig. 12. Density distribution of a blocked unit line.
Blocked group
Single blocked unit Fig. 11. Blockage in the routing area
s
unblocked neighboring unit lines Fig. 13. Adjacent blocked unit lines.
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Table 2 Bench marks
ibm02 ibm03 ibm04 ibm06 ibm07 ibm08 ibm09 ibm10 ibm02_1 ibm03_1 ibm04_1 ibm06_1 ibm07_1 ibm08_1 ibm09_1 ibm10_1 ibm02_2 ibm03_2 ibm04_2 ibm06_2 ibm07_2 ibm08_2 ibm09_2 ibm10_2
No. of nets
9874 13484 15583 19386 24195 26735 28796 33163 9874 13484 15583 19386 24195 26735 28796 33163 9874 13484 15583 19386 24195 26735 28796 33163
ave
Routin g area
80 64 80 64 96 64 128 64 192 64 192 64 256 64 256 64 80 64 80 64 96 64 128 64 192 64 192 64 256 64 256 64 80 64 80 64 96 64 128 64 192 64 192 64 256 64 256 64
Cap
Average error and run time
V
H
w/o detour V H
T (s)
w/o detour V H
T (s)
G T (s)
V
H
14 20 20 20 14 14 14 22 9 13 13 13 9 9 9 15 5 7 7 7 5 5 5 7
22 30 23 33 24 22 28 40 15 20 15 22 16 15 19 27 7 10 8 11 8 7 9 13
1.64 2.332 2.27 2.083 2.13 1.67 1.739 1.599 1.559 1.888 1.933 2.11 2.091 1.684 1.764 1.614 1.559 1.888 1.933 2.11 2.091 1.684 1.764 1.614
0.94 1.472 1.573 1.001 1.02 1.002 0.892 1.22 0.859 1.292 1.331 1.002 1.029 1.026 0.9 1.294 0.859 1.292 1.331 1.002 1.029 1.026 0.9 1.294
1 1 1 1 1 1 1 2 1 1 1 1 1 1 1 2 1 1 1 1 1 1 1 2
1.477 1.898 1.817 1.785 1.977 1.522 1.586 1.606 1.436 1.661 1.702 1.813 1.976 1.533 1.625 1.629 1.436 1.661 1.702 1.813 1.976 1.533 1.625 1.629
0.76 1.182 1.281 0.834 0.865 0.851 0.764 1.046 0.693 1.042 1.09 0.838 0.877 0.875 0.775 1.115 0.693 1.042 1.09 0.838 0.877 0.875 0.775 1.115
3 3 3 3 3 3 3 5 3 3 3 3 3 3 3 5 3 3 3 3 3 3 3 5
66 94 145 243 255 470 873 910 67 73 143 145 257 471 875 912 64 82 144 238 452 466 866 904
9.939 18.61 19.96 14.31 7.183 8.862 8.798 0.438 7.89 12.02 11.95 14.08 5.5 8.967 7.88 0.929 7.89 12.02 11.95 14.08 5.5 8.967 7.88 0.929
19.1 19.7 18.6 16.7 15.2 15.1 14.3 14.3 19.3 19.3 18.1 16.4 14.8 14.7 13.9 13.8 19.3 19.3 18.1 16.4 14.8 14.7 13.9 13.8
1.865
1.108
1.13
1.684
0.925
3.25
384
9.678
16.5
then sum the results to get the total density of every unit line. Input: Output: 1 2 3 4 5 6 7 8
Accuracy improvement %
A set of two-terminal nets M ¼ (N1, N2,y,Np) density of routing mesh edges for each Ni, i ¼ 1,y, p. {Determine the usage area of Ni; Compute the density of each unit line without detour under Ni Add the computed densities to the routing mesh. Compute the density to capacity ratio for each Ni Compute the density of each unit line with detour under Ni Add the computed densities to the routing mesh }
The run time for each net of (0, 0)-(m, n) is O(m n max(m, n)), and the complexity of computing the density to capacity ratio of each net is O(m n). So the computational complexity of the each net is O(m n max(m, n)). The total time complexity of the algorithm is linear to the number of nets.
experiments are run on a machine Pentium III 1 GHz with 256 M memory. The benchmarks are obtained from Prof. M. Sarrafzadeh’s group at UCLA [3]. We compare our estimated results to those produced by the global router1 developed by the research group of Prof. M. Sarrafzadeh at UCLA [3]. In Table 2, we summarized the results for eight benchmarks. For all eight benchmarks, we lower the routing capacitance with the same netlist, and then we route them again using the global router. Those with the name /benchmark_nameS_1 are with 2/3 routing capacitance and those with the name /benchmark_nameS_2 are with 1/3 routing capacitance. For example, the ibm02 benchmark has a horizontal capacitance of 22; for ibm02_1, the horizontal capacitance is 22*2/3 ¼ 15; for ibm02_2, the horizontal capacitance is 22*1/3 ¼ 7. For each benchmark, we tested it on our estimator, the estimator without detour and the global router. We sum up the difference between the result of the estimator and that of the router and do the average. For example, if for one unit line, the global router gives out that the density should be 4 while the estimator gives out that it is 5, then the difference is 1. We sum up all such differences for all unit lines in the routing area and then divided by
4. Experimental results 1
We present our experimental results for validation of our approach. Our estimator is implemented in C and the
There were 10 benchmarks in the original IBM benchmark set. But we only received eight archived results from UCLA, so we used these results for comparison purposes.
ARTICLE IN PRESS L. Cheng et al. / INTEGRATION, the VLSI journal 41 (2008) 360–370
368 Table 3 Benchmarks
ibm02_b ibm03_b ibm04_b
Number of nets
9874 13484 15583
Routing area
80 64 80 64 96 64
Capacity
Average error and run time
Vertical
Horizontal
Benchmarks without blockage Vertical Horizontal Run time
Benchmarks with blockage Vertical Horizontal Run time
14 20 20
22 30 23
1.477 1.898 1.817
1.521 1.805 1.822
0.76 1.182 1.281
3 3 3
0.83 1.192 1.315
4 4 4
Fig. 14. Congestion maps for Benchmark 5.
Fig. 15. Congestion maps for Benchmark 7.
the total number of unit lines. From Table 2, we can find that the average difference of the estimator with detour is less than that of the estimator without detour. That means the estimation with detour is
closer to the results of the global router, i.e. more accurate. And the run time of our estimator does not increase too much comparing to the estimator without detour.
ARTICLE IN PRESS L. Cheng et al. / INTEGRATION, the VLSI journal 41 (2008) 360–370
In Table 3, we give out the results for the benchmarks with blockage. We randomly insert 200 blockages to the top three benchmarks in Table 2 to from the new benchmarks in Table 3. We compute the average difference between the estimator and the global router and the results are shown in this table. From Table 3, we can find that the average difference is almost the same as the results without blockage. That means our method to deal with blockage is effective. Figs. 14 and 15 illustrate the density map for Benchmarks 5 and 7, respectively. The brighter color represents a higher density. The density predicted by our method is closer to the global router than that predicted without detour.
Consider the term au in the polynomial (a+1)u+v where its coefficient is C uuþv . We also consider the same term in the polynomial (a+1)u+vj(a+1)j. It is known that: ða þ 1Þuþvj ¼ ðC 0uþvj a0 þ C 1uþvj a1 þ C 2uþvj a2 þ . . . C uuþvj au þ . . .Þ ða þ 1Þj ¼ ðC 0j a0 þ C 1j a1 þ C 2j a2 þ . . . C uj au þ . . .Þ. So the coefficient of au in the polynomial Pu the i term u+vj j ui (a1) (a+1) is i¼0 C j C uþvj . Notice that P (a1)u+vj(a+1)j ¼ (a+1)u+v. u We obtain: ui¼0 C ij C ui uþvj ¼ C uþv . As a result, we have: uþv X u X
5. Conclusions
C ij C ui uþvj ¼
j¼0 i¼0
We proposed a novel model that is more realistic than the previous probabilistic models. It allows wires to have bounded-length detours to bypass congestions. We presented a probabilistic method to estimate the congestion of interconnect wires. The experimental results demonstrated the effectiveness of the method on routing benchmarks. The future work is directed to extending our approach by incorporating other design constraints, such as via, timing and power constraints. Appendix A Proof of equation: m 1 X nþl X
m2 C yxþy1 C mx1 mþnþlxy1 ¼ ðm þ n þ l 1ÞC mþnþl2 .
x¼1 y¼0
C yxþy1 C mx1 mþnþlxy1
¼
u X vþi X
Pi1
ui If joi, from C ij ¼ 0, we have: j¼0 C ij C uþvj ¼ 0. ui If j4v+i, from C ¼ 0, uþvj P i ui we have: uþv j¼vþiþ1 C j C uþvj ¼ 0. Therefore, we have: ui C ij C uþvj
i¼0 j¼i
¼
u vþi X X i¼0
¼
C ij C ui uþvj
j¼i
u X uþv X
C ij C ui uþvj
i¼0 j¼0
¼
C uuþv ¼ ðu þ v þ 1ÞC uuþv
j¼0
¼ ðm þ n þ l 1ÞC m2 mþnþl2
&
Appendix B Proof of equation: m1 m1 ðm þ n þ l 1Þ C m2 mþnþl2 þ 2 C mþnþl1 ¼ ðm þ 1ÞC mþnþl1 .
Proof. m1 LHS ¼ ðm þ n þ l 1Þ C m2 mþnþl2 þ 2 C mþnþl1 ðm þ n þ l 2Þ! ðm þ n þ l 1Þ! ¼ ðm þ n þ l 1Þ þ2 ðn þ lÞ!ðm 2Þ! ðn þ lÞ!ðm 1Þ! ðm þ n þ l 1Þ! ðm þ n þ l 1Þ! ¼ ðm 1Þ þ2 ðn þ lÞ!ðm 1Þ! ðn þ lÞ!ðm 1Þ! ðm þ n þ l 1Þ! ¼ ðm 1 þ 2Þ ðn þ lÞ!ðm 1Þ!
uþv X u X j¼0 i¼0
C ij C ui uþvj .
þ
i1 X j¼0
¼ RHS
&
References C ij C ui uþvj :
i¼0 j¼i
x¼1 y¼0
u X vþi X
uþv X
¼ ðm þ 1Þ C m1 mþnþl1
Proof. Let j ¼ x+y1, u ¼ m2, v ¼ n+l, and i ¼ x1. So, we have: m1 X nþl X
369
C ij C ui uþvj
þ
uþv X j¼vþiþ1
! C ij C ui uþvj
[1] C.-C. Chang, J. Cong, D. Pan, X. Yuan, Multilevel global placement with congestion control, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 22 (4) (2002) 395–409. [2] J. Cong, Z. Pan, Interconnect performance estimation models for synthesis and design planning, ACM/IEEE Int’l Workshop on Logic Synthesis (1998) 427–433. [3] UCLA, /www.ece.ucsb.edu/kastner/labyrinth/S. [4] X. Yang, R. Kastner, M. Sarrafzadeh, Congestion estimation during top-down placement, IEEE Transactions on Computer-Aided Design (TCAD) 21 (1) (2002) 72–80. [5] M. Wang, M. Sarrafzadeh, On the behavior of congestion minimization during placement, Proc. Int. Symp. Physical Design, (1999) 145–150. [6] H. Chen, H. Zhou, F.Y. Young, D.F. Wong, H. Yang, N.A. Sherwani, Integrated floorplanning and interconnect planning, ICCAD (1999) 354–357. [7] J. Lou, S. Thakur, S. Krishnamoorthy, H.S. Sheng, Estimating routing congestion using probabilistic analysis, IEEE Trans. Computer-Aided Design, 21 (1) (2002) 32–41. [8] S.D. Brown, J. Rose, Z.G. Vrabesic, A stochastic model to predict the routability of field programmable gate arrays, IEEE Trans. Computer-Aided Design 12 (12) (1993) 1827–1838.
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[9] A.A. El Gamal, Two-dimensional stochastic model for interconnections in master slice integrated circuits, IEEE Trans. Circuit & Systems 28 (2) (1981) 127–138. [10] A.A. El Gamal, Z.A. Syed, A stochastic model for interconnections in custom integrated circuits, IEEE Trans. Circuit & Systems 28 (9) (1981) 888–894. [11] F.J. Kurdahi, A.C. Parker, Techniques for area estimation of VLSI layouts, IEEE Trans. Computer-Aided Design 8 (1) (1986) 81–92. [13] M. Hall, Combinatorial Theory, 2nd ed, Wiley, New York, 1986. [14] M. Percy, A. Macmahon, Combinatory Analysis, Chelsea, New York, 1960. [15] X. Song, Q. Tang, D. Zhou, Y. Wang, Wire Space Estimation and Routability Analysis, IEEE Trans. Computer-Aided Design 19 (5) (2000) 1. Lerong Cheng received the B.S. degree in electronics and communication engineering from Zhongshan University, Guangzhou, China in 2001 and the M.S. degree in Electrical and Computer Engineering from Portland State University in 2003. He is currently a Ph.D. candidate in the electrical engineering department at UCLA. His research interests include computer-aided design of VLSI circuits and systems, programmable fabrics, low-power and high-performance designs and statistical timing analysis. Xiaoyu Song received his Ph.D. degree from University of Pisa, Italy, 1991. From 1992 to 1999, he was on the faculty of the Department of Computer Science at the University of Montreal, Canada. Currently, he is a professor in the Department of Electrical & Computer Engineering at Portland State University. His research interests include formal methods for hardware and software systems, design automation, highperformance digital system designs and optimization. He served as an associate editor of IEEE Transactions on Circuits and Systems and IEEE Transactions on VLSI Systems. Guowu Yang is a Professor at the School of Computer Science and Engineering at the University of Electronic Science and Technology of China. He has a B.S. at the University of Science and Technology of China, an M.S. at Wuhan University of Technology and Ph.D. at Portland State University in USA. He was an associate professor at the Mathematics department of Wuhan University of Technology from September 1989 to August 2001, and a research associate at the Computer Science department of Portland
State University from August 2005 to August 2006. He has research interests in a variety of areas, including formal method in system design and developing corresponding program package, theoretical study of synthesis algorithms in quantum computing, and non-linear control theory. His collaborated units are: CAD research lab at Intel, Electrical and Computer Engineering department and Computer Science department at Portland State University, College of Software at Tsinghua University, etc. He received the Maseeh Fellowship in 2004, Outstanding Graduate Student in 2002 and 2003, at the College of Engineering and Computer Science, Portland State University. He has published over 40 papers. William N. N. Hung received the B.S. and M.S. degrees in electrical and computer engineering from the University of Texas at Austin in 1994 and 1997, respectively. He received Ph.D. degree in electrical and computer engineering from Portland State University, Oregon, in 2002. From 1997 to 2004, he worked as a Senior Engineer at Intel Corporation in Hillsboro Oregon, primarily focused on formal property verification of CPU designs. Since September 2004, he has been working as a Senior Staff Engineer / Director at Synplicity Inc. in Sunnyvale California. His research interests include logic synthesis, physical design, formal methods, satisfiability, combinatorial optimization, reconfigurable computing, quantum computing and nanotechnology. Dr. Hung served as a Session Chair for the ACM/IEEE Design Automation Conference (DAC), and a Special Session Chair for the IEEE World Congress on Computational Intelligence (WCCI). He was a member of the Emergent Technologies Technical Committee for the IEEE Computational Intelligence Society. He also served in the Program Committee of the IEEE/ACM Design Automation and Test in Europe (DATE), the IEEE Congress on Evolutionary Computation (CEC) and the IEEE International Computer Software and Applications Conference (COMPSAC). Zhiwei Tang received the Master degree in Electrical Engineering from Mississippi State University in 2002. He has been working on a Ph.D. program at the Department of Electrical and Computing Engineering of Portland State University since 2002. He is currently working with Intel Corporation in the Design Automation area. His research interests include low-power design and physical design automation. Shaodi Gao received the B.S degree in computer science from Fudan University in Shanghai, China, in 1982. In 1991 he received Ph.D degree in computer science from the University of Saarland, Saarbruecken, Germany. He joined IBM Corporation in 1996 at the Electronic Design Automation Laboratory in East Fishkill, New York, where he currently works in development of tools and algorithms for routing and routingrelated timing and yield optimization. His research interests include physical design, statistical timing analysis of VLSI circuits, algorithms for computational geometry and graph theory.