Solid-State Electronics Vol. 41. No. 5, pp. 739-147. 1997 0 1997 Elsevier Science Ltd. All rights reserved Printed in Great Britain
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A NEW LATERAL IGBT FOR HIGH TEMPERATURE OPERATION M. VELLVEHI,
P. GODIGNON, D. FLORES, J. FERNANDEZ, J. REBOLLO and J. MILLAN
S. HIDALGO,
Centro National de Microelectkmica (CNM-CSIC), 08193 Bellaterra, Barcelona, Spain (Received 9 April 1996; in revised form
3 October
1996)
Abstract The analysis of a new LIGBT with special emphasis on high temperature behaviour is discussed. A comprehensive experimental characterisation of the static characteristics over the temperature range 300423 K is reported. Two-dimensional (2-D) numerical simulations are used to explain the observed behaviour and to get a physical insight into the effects of temperature on LIGBT performance. Simulation results show a peculiar latch-up mechanism in the proposed new modified structure different from the conventional IGBT structure. The novel LIGBT structure, proposed here, has been compared with LIGBT structures previously reported. All these structures have been fabricated. The experimental latch-up current density of the proposed LIGBT is four times higher than in the other fabricated structures at high temperature. The dynamic latch-up during the LIGBT turn-off process has also been analysed. CJ 1997 Elsevier Science Ltd
1. INTRODUCTION
Power integrated circuits combining CMOS, bipolar and analog stages together with MOS-controlled power switches have a great number of applications, offering considerable advantages over conventional discrete and hybrid designs. Numerous emerging applications require high current, voltage and temperature operation. The IGBT[ 1,2] is an optimal candidate as a power switch for these applications. The lateral architecture of the IGBT eases the integration of HVICs using the RESURF principle[3]. Several LIGBT structures have been reported recently to improve their static and dynamic characteristics. These include devices fabricated with a buried layer, devices with an auxiliary cathode[4], devices with reverse_channel[5], devices with an additional P-MOSFET[6], and devices fabricated on SO1 substrates[7]. Furthermore, a LIGBT model for operation at high temperature has also been published[8]. This paper reports the experimental demonstration of a novel LIGBT structure which has an excellent high temperature operation. This structure was previously analysed theoretically[9], and the experimental device operation mode was detailed at room temperature[lO]. For the sake of comparison of their electrical characteristics, especially at high temperature, this novel LIGBT structure has been designed and fabricated, together with a conventional LIGBT structure and with a modified structure[4], using the RESURF principle. In addition, this paper also presents a comprehensive analysis of the temperature effects on various LIGBT
devices, both experimentally and by numerical simulation. In the proposed new modified structure, holes are
diverted away from the P-body region to avoid latch-up. It is shown that this undesirable phenomenon appears at high voltage drops and that the structure can work at higher temperatures than the conventional LIGBT. Therefore, this modified LIGBT structure is a useful MOS-bipolar power structure for high temperature applications. The device operation is analysed from the results provided by MEDICI[ 1l] including self-heating effects. It is shown that self-heating effects must be taken into account for an accurate device analysis at high temperature. For this purpose, MEDIC1 includes the lattice temperature advanced application module (LT-AAM) which allows one to consider the effects of lattice heating by solving the lattice heat equation in addition to the Poisson’s and the current-continuity equations. Simulated results are compared with experimental data from the fabricated structures. 2. LIGBT
STRUCTURES
AND FABRICATIONPROCESS
A cross-sectional view of the new modified LIGBT structure is plotted in Fig. 1. The conventional structure is similar to the modified structure removing the N+-sinker and the auxiliary cathode. As it can be seen from this figure, the modified structure includes a buried layer, an auxiliary cathode and an N+-sinker between the P-body region and the auxiliary cathode. In this structure, the region between the active channel and the auxiliary cathode 739
is at low potentials
740
M. Vellvehi el al.
when the device is in the off-state, as has been shown previously[9]. This fact ensures that the existence of a highly doped N+-sinker between the active channel and the auxiliary cathode will not imply a degradation of the device high blocking voltage. The inclusion of the N+-sinker has two complementary effects that enhance the device forward characteristics. First, it creates an electric field, due to the carrier gradient, which avoids the hole flow through the P-body region. Holes are, therefore, effectively diverted towards the buried layer and the auxiliary cathode, hence decreasing the hole current flow through the parasitic body resistance responsible for the latch-up. Next, this highly doped sinker reduces the base resistance increasing the bipolar base current. Therefore, the inclusion of the N+-sinker avoids the device current limitation exhibited by structures with buried layer and auxiliary cathode[4]. The designed test monitor chip includes conventional LIGBT structures with buried layer and auxiliary cathode, and the proposed modified structure including the N+-sinker. In addition, shorted anode structures have also been included in order to decrease the device turn-off time. The fabrication process has 12 photolithographics steps which allows the integration of all the structures included in the monitor chip. The process starts with the implementation of the buried layer using a boron implant previous to the epitaxy growth. The PC and N+ sinkers are then diffused deep enough to reach the buried layer. The next step consists of the polysilicon deposition, doping and patterning. N+-buffer and P-body implants are performed and followed by a common drive-in process. Three implant doses have been used for the N+-buffer formation. The second step of the double diffusion is then carried out with the N+-source implant, together with the shallow P+-diffusion of both the anode and the auxiliary cathode. Contact opening and Al metallisation are then performed. Finally, a passivation layer was deposited and patterned. The substrate and epilayer properties have been chosen according to the RESURF technique for a device breakdown voltage of 350 V: NEUb = 9 x lOi cm-‘, Nepl= lO’5cm-3, CATHODE
GATE
AUX. CATHODE
ANODE
400
-
: ‘.,
CtONWVlON4L LIGBT -,Z,,ZJ LK;BT
. . . . . . L_
VoltageDrop (V) Fig. 2. Simulated I(v) curves of the modified structures at various ambient I( k’)curves at 300 K without considering are also represented. V, =
W,,, = IO pm. The length of the between the auxiliary cathode Ldrict= 40 pm. The active areas and the modified structures are 2.76 x lo-’ cm*, respectively.
conventional and temperatures. The self-heating effects 20 V.
drift region (distance and the anode) is of the conventional 2.59 x lO-3 cm* and
3. DEVICE OPERATION AT HIGH TEMPERATURE. SIMULATION RESULTS
The static characteristics of the conventional and the proposed modified LIGBT structures have been simulated with MEDICI, including the LT-AAM module, to take into account the self-heating effects, using a thermal resistance of 10’ K/W at the bottom contact. The models used for the electrical simulation include analytic models of mobility, carrier concentration and temperature dependence, surface mobility, electrical field mobility dependence, SRH recombination with carrier concentration lifetime dependence, AUGER recombination and band gap narrowing. However, no temperature dependence of the lifetime parameters, r, and TV, is included in those models. In this sense, and considering that the devices work at high injection regime, the carrier lifetimes become slightly dependent on temperature, being the thermal velocity, t)th,that is responsible for this dependence (uthx 1.2 x 10’ cm/s at 300 K, and uth x 1.4 x 10’ cm/s at 423 K)[12]. The electrical behaviour of both LIGBT structures is detailed in the following sections. 3.1. The conventional LIGBT structure
SUBSTRATE
Fig. I. Cross-sectional view of the proposed LIGBT structure.
modified
Figure 2 shows the simulated 1(v) characteristics of both LIGBTs at various temperatures. The 1(v) curves at 300 K, without considering the heat flow equation, are also represented in this figure, which show the importance of considering the heat flow
741
New lateral IGBT
equation for a proper device analysis. Thus, it is clear that the use of this heat flow equation is mandatory for a high temperature device analysis. In the case of the conventional LIGBT structure, the latch-up current density significantly decreases when the temperature rises. This fact is mainly due to the reduction of the carrier mobility and to a decrease of the forward base-emitter voltage, PaBE, needed to activate the N+-source/P-body junction responsible for the latch-up, as inferred from eqns (1) and (2):
(1) VBE
(T)
=
m
T+
VBE
(T300)
(2)
where b(TMo) is the low field mobility at room temperature, c( is a constant whose value lies in the range of 1S-1.8[13], VeE(T3,) is the base-emitter voltage at room temperature and m is a constant, whose value (- 1.7 mV/C) has been calculated by simulation. Therefore, the maximum hole current density flowing through the P-body region decreases when the ambient temperature varies from 300 to 400 K, once latch-up is reached. The temperature distribution inside the conventional LIGBT structure shows a peak lattice
temperature located at the edge of the buried layer in the drift region before reaching latch-up. Simulations results show a displacement of the peak lattice temperature towards the P-body region just after latch-up. A further uncontrolled current increase could cause a thermal runaway of the device. However, as it can be seen from Fig. 3, a significant decrease of the peak lattice temperature is observed after latch-up. This temperature decrease is mainly associated to the decrease of the power dissipated by the device after latch-up. This power decrease is clearly envisaged from this figure, where the power dissipated at room temperature, LIGBT structure, is represented
of the gate loss control, this temperature decrease could allow us to avoid thermal runaway problems if the device is effectively protected by limiting its output current. For higher current levels, the temperature and the total dissipated power rise again, when the parasitic thyristor is completely activated. Simulation results show that the latch-up phenomenon is started at the vicinity of the MOS channel region at the curvature of the N+-source. This is the typical LIGBT latch-up which is due to the hole flow coming from the anode up to the P-body region, the latch-up current density decreasing when the temperature is raised.
-
1000
in the conventional in solid line. In spite
CONVENTIONAL MODIFIED
LIGBT
7
8
LIGBT
800 6
600
0
300
400
500
600
Peak LatticeTemperature
700
800
(K)
Fig. 3. Simulation results of dissipated power and current density vs the peak lattice temperature at 300 K for conventional and modified LIGBT structures. V, = 20 V. conventional LIGBT; ---- modified LIGBT.
M.
742 Cathode
Gate
Vellvehi et al.
Aux. Cathode
Anode
(4
60 80 Distance (pm)
100
120
(W
Distance (pm) Fig. 4. Current
3.2. The mod$ed
flowlines:
(a) before;
and (b) after latch-up
LIGBT structure
The simulated forward characteristics of the proposed modified LIGBT structure are also shown in Fig. 2 at various temperatures. We can distinguish four regions in these curves: an initial zone with a conventional IGBT behaviour, a current knee, a current saturation region and, finally, the latch-up region. The current knee accounts for the activation of the N+-sinker/P+-buried layer junction as inferred from the simulations. This junction becomes forward biased for an applied voltage which value decreases when the temperature raises. Therefore, this effect is more remarkable at high temperatures. The electron current resulting from the activation of this junction
in the modified
LIGBT
structure.
also flows through the MOS channel, and the device remains gate controlled. This current knee can be eliminated at room temperature by reducing the N+-sinker depth as it has been corroborated by simulation for various N+-sinker junction depths. Nevertheless, since the N+-sinker is thought to stop the hole tlow through the P-body and, therefore, to avoid latch-up, shallow N+-sinker junctions could lead to a loss of the N+-sinker effectiveness. However, at high temperature values the current knee still remains in structures without N+-sinker. The saturation region which follows the current knee is due to the JFET effect associated to the depletion layers of the P+-auxiliary cathode/N-epitaxy and the N-epitaxy/P+-buried layer junctions. This limits the
New lateral IGBT
bipolar base current and, therefore, the device current becomes saturated before the occurring latch-up. The LIGBT structure without N+-sinker shows a higher current limitation than the proposed structure, since the lack of the highly doped N+-sinker increases the bipolar base resistance. Obviously, the current level at which the proposed modified LIGBT structure becomes saturated strongly depends on the epilayer thickness, and eventually the latch-up can take place before reaching the saturation if the epitaxial layer is thick enough not to increase sufficiently the bipolar base resistance. Simulation results predict a reduction of the latch-up current density at 423 K in a factor of two for the structure without N+-sinker in comparison with the proposed LIGBT (65 and 130 A/cm2, respectively). In the proposed LIGBT, the activation of the parasitic thyristor is somewhat different than in the conventional structure. The N+-sinker effectively diverts the hole flow coming from the anode to the auxiliary cathode and to the buried layer, hence avoiding the hole flow through the P-body region. Holes collected by the buried layer and the P+-sinker are responsible for the latch-up. Unlike the conventional LIGBT in which the activation of the N+-cathode/P-body junction occurs in the vicinity of the MOS channel region, this junction becomes forward biased at the plane zone of the junction where the P+-sinker comes up with the P-body region in the modified LIGBT. This fact has been corroborated by simulations, and the whole N+cathode/P-body junction becomes activated at higher current levels. At this point, holes flow from the
743
epitaxial region to the P-body, and the N+-sinker is no longer effective. Current flowlines in the proposed modified LIGBT structure before and after latch-up are plotted on Fig. 4. It can be clearly inferred from this figure, the JFET effect that limits the bipolar base current and that the N+-sinker prevents the hole flow through the P-body before latch-up. On the other hand, holes flow through the P-body once latch-up occurs and the N+-sinker loses its effectiveness. Figure 5 shows the hole concentration distribution inside the proposed LIGBT structure prior latch-up. As it can be seen from this figure, the whole drift region between the anode and the auxiliary cathode is conductivity modulated. The N+-sinker prevents the region near the P-body from being conductivity modulated, but this highly doped zone avoids the current limitation exhibited by the structure without the N+-sinker. The electrical performance of the analysed LIGBT structures has also been compared with the LDMOS (see Fig. 2). The drift region length of the simulated LDMOS is equal to the distance between the anode and the auxiliary cathode in our proposed LIGBT structure, resulting in a breakdown voltage value around 400 V. As one can observe from Fig. 2, the LDMOS has a lower current capability than the proposed LIGBT structure at room temperature and, since the LDMOS is a unipolar device, the current reduction will be more significant for higher operation temperatures. The simulated LDMOS turn-off time is lower by a factor of 4 than that obtained for our LIGBT structure. As can be seen from Fig. 3, the modified LIGBT has a similar qualitative behaviour to that of the
Fig. 5. I lole distribution in the modified LIGBT structure. VM ‘= 10 V. V, = 20 V.
M. Vellvehi et al.
630
630
Fig. 6. Temperature distribution inside the moldified LIGBT structure at 300 K. V, = 20 V
conventional structure. The lattice temperature distributions of the two structures are very close in both cathodes’ vicinities for a fixed power. In particular, the peak values of lattice temperature, which are located at the drift region surface over the edge of the buried layer, are the same for the two structures. The only difference between both structures’ behaviours is that the modified LIGBT latch-up occurs at a higher lattice temperature value than in the conventional structure, since latch-up takes place at relatively high voltage drops. The lattice temperature at latch-up is around 650 K in the P-body region which is much higher than that of conventional LIGBT (385 K). Furthermore, the temperature increase in this region is 40 K for the conventional LIGBT and 25 K for the modified LIGBT, when the ambient temperature varies from 300 to 400 K. From Fig. 3, the dissipated power at latch-up in the modified structure is much higher than in the conventional structure, resulting in a higher lattice temperature. The temperature distribution inside the modified LIGBT before latch-up at 300 K is shown in Fig. 6.
The peak lattice temperature is located in the vicinity of the auxiliary cathode at the edge of the buried layer. In this region, there is a bottleneck of the current that flows between the buried layer and the auxiliary cathode. Simulations results show that the peak lattice temperature moves towards the anode junction just after the latch-up is started. As observed in the conventional device, the peak temperature decreases after latch-up until the parasitic thyristor is completely activated. 4. EXPERIMENTAL RESULTS
The LIGBT static characteristics at 300 K were measured on wafer. The forward characteristics measured on devices with the lowest N+-buffer implant dose are shown in Fig. 7. We can observe an offset voltage of approximately 0.7 V, and the latch-up phenomenon occurs at a current density of 175 A/cm’ for the conventional LIGBT structure. The latch-up can be eliminated using higher N+-buffer implant doses. Nevertheless, the increase of the buffer doping level causes a reduction of the
New lateral IGBT
745
MODIFIED LIGBT "9=20"
0
Fig. 7. Experimental f(v) curves of conventional and modified LIGBTs for various gate bias. T = 300 K. conventional LIGBT; --modified LIGBT.
output current capability due to the emitter efficiency lowering. In the case of the proposed modified structure, the saturation region is not observed in the output characteristics which is probably due to the fact that the bipolar base resistance is not high enough for limiting the device current. Furthermore, in this structure no latch-up phenomenon has been observed at room temperature for forward voltage drops below 15 V. The modified LIGBT output current may be easily increased by raising the N+-sinker implant dose[9]. In both structures, the experimental breakdown voltage was 360 V and the turn-off time of packaged devices under resistive load was around 350 ns. It has been shown that the inclusion of the shorted anode allows a reduction of the turn-off time by a factor of 2 (170 ns) under the same switching conditions. 200
r
I 160
P
r’
CONVENTIONAL VP* 20”
LIGBT
Fig. 9. Experimental I(v) curves of the modified LIGBT structure at various ambient temperatures. VP = 20 V.
Figures 8 and 9 show the experimental forward characteristics at various temperatures from 300 to 423 K of the conventional and the proposed modified LIGBT structures, respectively. Two behaviours have been observed in the conventional LIGBT. For one side, the device shows a diode-like behaviour at low current levels, and the current increases with the temperature. The offset voltage decreases when the temperature rises and there is a cross-point at 1.2 V and 10 A/cm2 at which the thermal coefficient vanishes. On the other hand, the current decreases when the temperature is increased at high current levels. Nevertheless, the most remarkable high temperature effect is the noticeable decrease of the latch-up current density, as has been pointed out in the simulation section. As it can be seen from Fig. 9, the modified LIGBT structure only shows a slight decrease of the latch-up current density when the temperature is increased. This behaviour is due to the fact that the latch-up phenomenon occurs in a different way than in the conventional structure. The activation of the parasitic thyristor in the modified structure is a consequence of the hole flow through the buried layer and the P+-sinker, which eventually forward biases the upper base-emitter junction, whereas in the conventional structure latch-up is due to the hole flow through the P-body region. It is worth pointing out that the Table
I.
Experimental latch-up current densities at different temperatures. V, = 20 V. VU (max) = 21 V
Ambient temperature (W 0
0
3
Vol:age Drop’(V)
12
15
Fig. 8. Experimental 1(v) curves of the conventional LIGBT structure at various ambient temperatures. V, = 20 V.
300 325 350 375 400 423
Latch-up Latch-up current current (Ajcml) (A/cm’) conventional modified LIGBT without N+-sinker LIGBT 176.4 142.8 112.1 72.6 54.4 43.3
No latch-up No latch-up 70.0 58.5 47.4 43.6
Latch-up current (A/cml) proposed LIGBT No latch-up 185.2 174.3 170.7 167.1 156.2
M. Vellvehi et al.
746 Table 2. Latch-up temperature modified LIGBT vs N+-bulk N+-buffer 6 x IO” 9 x IO” 7 x 10’4
dose (cm-‘)
of the proposed dose, V, = 20 V ik.up
(K)
325 400 423
impurity concentration levels of the regions where holes are flowing in the two structures are quite different. In the modified structure, holes flow through highly doped regions (P+-buried layer and P+-sinker), while in the conventional LIGBT holes flow through a lower doped zone (P-body). At low impurity concentrations, the mobility decreases considerably as the temperature is increased, whereas for high impurity doping levels, the mobility variation with temperature becomes less and less sensible[l4]. This accounts for the slight reduction of the latch-up current density in the proposed modified LIGBT structure. In structures without N+-sinker, the latch-up mechanism is similar to that of the conventional structure, since holes are not diverted away from P-body region. Consequently, the latch-up current density shows a significant decrease when the temperature is raised. Furthermore, at high temperatures we have also observed a current knee which accounts for the activation of the N--epitaxy/P+buried layer junction. The measured latch-up current densities at different temperatures for the three LIGBT structures are summarised in Table 1. It can be noticed that the conventional LIGBT and the modified structure without N+-sinker have the same latch-up current density (43 A/cm’) at 423 K, and that this value is much higher (156 A/cm’) in the proposed modified LIGBT structure. It has also been corroborated experimentally that the ambient temperature at which the proposed modified LIGBT structure shows latch-up, Zaleh.upr strongly depends on the N+-buffer dose. As expected, the device current capability decreases when the N+-buffer dose is raised, and the device becomes less sensible to latch-up. Table 2 summarises the values for the considered experimental Tkrtch_up N+-buffer doses, from which it can be deduced that the Ta,eh_up value increases with the above-mentioned dose. The experimental switching performance of the modified LIGBT structure has been measured under resistive load with a single gate pulse. Under these conditions we have not observed a dynamic latch-up. The measured latch-up current density does not depend on the gate resistance and corresponds to the static latch-up. This latch-up current density lowers when increasing the gate pulse duration, which is in accordance with the self-heating influence observed in numerical simulations. Furthermore, as expected, the measured latch-up current decreases when the temperature is increased. Measurements under inductive load (250 PH and 1.5 f2) have allowed one
observe dynamic latch-up on our fabricated LIGBT structures. The latch-up current clearly depends on the gate pulse waveform (amplitude and fall time). The measured dynamic latch-up is slightly lower than the static current latch-up, i.e. ILdynx 0.9 x ZLarat with R, = 10 R and a gate fall time of 13 ns. to
5. CONCLUSIONS
A new modified LIGBT structure for high temperature operation is presented in this paper. The structure includes an N+-sinker to divert hole flow away from the P-body region towards the auxiliary cathode and the buried layer, hence avoiding the latch-up. The temperature effects of this structure have been investigated by numerical simulation, and compared with the conventional LIGBT. According to the simulation results, the latch-up mechanisms are different in both LIGBT structures. In the conventional LIGBT, latch-up is due to the hole flow through the P-body region and takes place at the vicinity of the MOS channel. On the contrary, the latch-up in the modified structure occurs in the plane zone of the N+-cathode/P-body junction, where the P+-sinker comes up with the P-body region. The activation of the parasitic thyristor is due to the hole flow through the buried layer and the P+-sinker since the N+-sinker effectively diverts holes away from the P-body. Three 360V LIGBT structures have been fabricated using the RESURF principle in order to compare their electrical characteristics, especially at high temperature. The conventional LIGBT and the modified structure without N+-sinker show a significant latch-up current density decrease when the temperature is raised. On the other hand, the proposed LIGBT structure only shows a slight decrease of the latch-up current density when the temperature is increased. The latch-up current density of the proposed LIGBT is around 160 A/cm* at 423 K, whereas it is in the range of 40 A/cm* in the conventional LIGBT and in the modified structure without N+-sinker. Dynamic latch-up has also been measured under severe conditions, yielding in a 10% reduction of the maximum controllable current under inductive load. Further improvements will contemplate the increase of the device current capability and to expand the voltage range. This work was supported by the Comisi6n Interministerial de Ciencia y Tecnologia (CICYT) under contract TIC92-0179. and bv the Comissi6 Interdepartamental de Recerca i I&ova& Tecnolbgica (CIRIT) under contracts GRQ94-8006 and SGR95-00536. Acknowledgements
REFERENCES
1. Baliga, B. J., Adler, M. S., Gray, P. V., Love, R. P. and Zommer, N., international Electronic Devices Meeting, 1982,
IEDM-82, 264.
New lateral IGBT 2. Russell, J. P., Goodman, A. M., Goodman, L. A. and Nielson. J. M.. IEEE Electron Devices Letters. 1983. EDLA, 63. 3. Darwish, M. and Board, K., Electronics Letters, 1984. 20, 519. 4. Sankaranarayanan,
E. M., Amaratunga, G. A. J., Huang, Q., Milne, W. J. and Kwan, K. W., Proceedings
of the Symposium of High Voltage and Smart Power K’s, Los Angeles, 1989, p. 124.
5. Chow, T. Paul, Pattanayak, D. N., Baliga, B. J. and Adler, M. S., Proceedings of the 6th International Symposium on Power Semiconductor Devices and It’s, 1994, p. 57. 6. Yee, H. P., Lautitzen, P. 0. and Darling, R., Proceedings of the 6th International Symposium on Power Semiconductor Devices and K’s, 1994, p. 63. 7. Sumida, H., Hirabayashi, A. and Kumagai, N., IEEE Transactions on Electron Devices, 1995, ED-42, 1301.
147
8. Fatemizadeh, B., Silber, D., Fiillmann, M. and Serafin. J., Proceedings of the 6th International Symposium on Power Semiconductor Devices and K’s, 1994, p. 137. 9. Godignon, P., Femandez, J., Hidalgo, S., Rebollo, J. and Millan, J., Microelectronics Journal, 1993, 24, 87. 10. Vellvehi, M., Godignon, P., Flores, D., Femandez, J., Hidalgo, S., Rebollo, J. and Millan, J., Proceedings of the 25th European Solid State Device Research Conference, 1995, p. 639. Il. TMA MEDICI. Two-Dimensional Device Simulation Program. Technology Modelling Associates, Palo Alto,
CA, 1983. 12. Grove, A. S., Physics and Technology of Semiconductor Devices. Wiley, New York, 1967. 13. Arora, N. A. and Gildeblant, G. S., IEEE Transaclions on Eleclron Devices, 1987, ED-34, 89. 14. Phillips, A. B., Transistor Engineering. McGraw-Hill, New York, 1962.