- Email: [email protected]
Si-n+-based RRAMs
Solid-State Electronics 118 (2016) 56–60
Contents lists available at ScienceDirect
Solid-State Electronics journal homepage: www.elsevier.com/locate/sse
A new parameter to characterize the charge transport regime in Ni/HfO2/Si-n+-based RRAMs M.A. Villena a, J.B. Roldán a,⇑, M.B. González c, P. González-Rodelas b, F. Jiménez-Molinos a, F. Campabadal c, D. Barrera b a b c
Departamento de Electrónica y Tecnología de Computadores, Universidad de Granada, Facultad de Ciencias, Avd. Fuentenueva s/n, 18071 Granada, Spain Departamento de Matemática Aplicada, Universidad de Granada, Facultad de Ciencias, Avd. Fuentenueva s/n, 18071 Granada, Spain Institut de Microelectrònica de Barcelona, IMB-CNM (CSIC), Campus UAB, 08193 Bellaterra, Spain
a r t i c l e
i n f o
Article history: Received 30 July 2015 Received in revised form 26 November 2015 Accepted 11 January 2016
Keywords: Resistive switching memory RRAM variability Simulation tools Conductive filaments Parameter extraction
a b s t r a c t In this work, a new parameter is defined to describe the charge transport regime and to understand the physics behind the operation of Ni/HfO2/Si-n+-based RRAMs. An extraction process of the parameter from experimental reset I–V curves is proposed. The new parameter allows to know the relative importance of the two main transport mechanisms involved in the charge conduction in the low resistance state of the device: a tunneling current through a potential barrier and an ohmic component. A complete simulation study on this issue is provided. Furthermore, the reset voltage can be estimated using this new parameter. Ó 2016 Elsevier Ltd. All rights reserved.
1. Introduction Different emerging technologies are currently under study to overcome the limitations of non-volatile FLASH memories [1,2]. Among them, Resistive Random Access Memories (RRAMs) are being considered the devices with the highest potential because of their unique features such as high endurance and speed, low program/erase currents, CMOS technology compatibility and capability for being fabricated in 3D stacks [3]. The good results obtained for a wide variety of individual devices, using different oxides and metals for the electrodes [1–5], have also been proved in the arena of complete memory chips [6]. This latter fact makes this technology even more promising. In the last few years, great research efforts have been devoted to fabrication and characterization of these devices. However, before RRAMs get ready for industrial applications other issues have to be addressed. In this respect, accurate device simulators will be needed to understand the physics behind their operation, such as those already published [7–14]. In addition, compact models [15–18] to be implemented in circuit simulation EDA tools, will be essential elements in the coming RRAM-based circuit simulation and design landscape. In compact modeling, parameter ⇑ Corresponding author. E-mail address: [email protected] (J.B. Roldán). http://dx.doi.org/10.1016/j.sse.2016.01.007 0038-1101/Ó 2016 Elsevier Ltd. All rights reserved.
extraction techniques have to be carefully designed since the set of parameters representing a particular device within a certain model framework is essential. In this context, a new parameter is presented here in the framework of the model introduced in [10,15]. The interpretation of its physical meaning is studied by combining the analysis of experimental and simulated data, and the parameter extraction technique is discussed.
2. Device description and measurement The Ni/HfO2/Si devices were fabricated on (1 0 0) n-type CZ silicon wafers with resistivity (0.007–0.013) X cm. Atomic layer deposition at 200 °C using tetrakis (Dimethylamido)-hafnium (TDMAH) and H2O as precursors was employed to deposit 20 nm-thick HfO2 layers. A high temperature anneal at 800 °C for 30 min in a N2 ambient was performed after growth of the dielectric film. The top Ni electrode with a 200 nm thickness was deposited by magnetron sputtering [19]. The current–voltage (I–V) characteristics were measured at 300 K by means of a HP-4155B semiconductor parameter analyzer controlled by GPIB with a PC, using MATLAB. The Si substrate was grounded and a negative voltage was applied to the Ni electrode, although absolute values of the applied voltages are shown henceforth.
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3. Threshold voltage for reset The only extracted parameters to characterize the transport features and charge distribution in RRAMs are VRESET and VSET and the corresponding currents IRESET and ISET [20,21]. From these parameters a great deal of information related to the physics behind the device operation can be obtained. In Ni/HfO2/Si-based devices, two different charge transport mechanisms, linked to tunneling and ohmic conduction, have been found [10]. The new parameter we present here is useful for analyzing the relative weight of these two current components. In Fig. 1a a simulated I–V curve is shown; for this we have used a previously developed simulator [10], where the current, heat and diffusion equations are self-consistently solved in RRAMs. We simulated a Ni/HfO2/Si-n+ structure with one Conductive Filament (CF) with features similar to the ones employed in Ref. [10] to fit the experimental I–V curves, including the Quantum Point Contact (QPC) model to account for tunneling. In Fig. 1a, a dot shows the point at which a change in the I–V plot curvature is observed. The presence of this curvature change is the evidence of a change in the relative weight of the two charge transport mechanisms found in the Low Resistance State (LRS) of the studied devices. This curvature change led us to propose a technique to define and extract a new parameter to account for this effect. Mathematically speaking this effect can be characterized by means of the current derivative maximum versus applied voltage in a reset process (Fig. 1b). We name this parameter as threshold voltage for reset, VTH_RESET (see Fig. 1a and b). As reported in Ref. [10], the charge transport characteristics in the LRS of the devices under study are described by two components: a tunneling process and an ohmic component. In the case of the tunneling component, it can reasonably be reproduced by means of the QPC model, considering the potential barrier formed between the CF and the silicon substrate, somewhere close to the Si/HfO2 interface, while the ohmic part is due to the CFs metallic nature. These two components allow for the description of the current flow in the LRS. It was shown in Ref. [10] that usually at low voltages the I–V curve slope, linked to the evolution of the total resistance, is controlled mainly by the tunneling transport component, while the ohmic component increases its relative weight when the voltage is increased. This is because at low voltages the resistance associated with the tunnel transitions (RQPC) gradually decreases as the electric field increases while the ohmic resistance (RCF) remains constant (see Fig. 2). Therefore, the total resistance, the sum of both components, decreases in the low voltage regime
Fig. 2. CF resistance (RCF) and tunnel resistance (RQPC) versus applied voltage. The unbalanced relation between the variation of RCF and RQPC before and after VTH_RESET changes the curvature of the reset I–V curve (see Fig. 1).
which results in a concave current–voltage curve (see Fig. 1a). When VTH_RESET is reached this trend changes. RQPC decreases slowly and RCF increases (Fig. 2). This change in the RCF behavior is due to its dependence on the temperature; it is also important to point out that RCF depends on the CF shape. The curvature of I–V changes from convex to concave (see Fig. 1a) due to heating effects. Only when the temperature increases RCF grows with voltage, anticipating the reset process. In Fig. 3, experimental I–V reset curves and the corresponding numerical derivatives are shown, with the current derivative maxima indicated by solid squares. The numerical calculation of the I–V curve derivative is rather complex because of the measurement noise, as reported in parameter extraction techniques applied to other type of devices [22,23]. In this work, the current derivative calculation has been carried out by means of a previously developed technique which minimizes the numerical noise [23]. 4. Results and discussion We have extracted VTH_RESET for a whole series of resistive switching (RS) events (more than 2000 RS events), focusing on the calculation of current derivatives for the reset I–V curves, as shown in Fig. 3. The results are plotted in Fig. 4a along with the
Fig. 1. (a) Simulated I–V reset curve for Ni/HfO2/Si-n+ devices (solid line). Dashed lines show the curvature of I–V curve before (convex, shown in red dashed lines) and after (concave, shown in blue dashed lines) of threshold voltage for reset, VTH_RESET (shown with an orange symbol). (b) Numerical derivative of the reset I–V curve of (a). VTH_RESET is defined as the voltage for which the maximum of this derivative is reached. (For interpretation of the references to colour in this figure legend, the reader is referred to the web version of this article.)
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Fig. 3. Experimental I–V reset curves for Ni/HfO2/Si-n+ devices (solid lines) for different resistive switching cycles. The numerical derivatives of these curves have also been plotted (dashed lines). See that the current derivative curves show different maxima, the corresponding voltages for those maxima are named VTH_RESET.
reset voltages, VRESET, obtained for the same experimental curves. These latter parameters were obtained following the techniques described in Ref. [21] for a 30% current reduction at the reset point with respect to the maximum current value of the I–V curve. Although other authors define VRESET as the voltage associated with the maximum current found in the I–V curve [24,25], we use the
previous definition because it works better for a wider set of cases as explained in Ref. [21]. Nevertheless, both methods provide similar results for the studied RRAMs in this work. Note in Fig. 4a that the distribution of VTH_RESET values has similar characteristics as the VRESET distribution, with VTH_RESET lower than VRESET by 0.5–1 V, on average. Both distributions are highly correlated, as shown in Fig. 4b. This is an important result since it implies that VRESET values can be estimated in advance for each reset cycle, without having to reach the destructive process that leads to a reset event [7]. As a consequence, and taking into account that VTH_RESET values are lower than VRESET, a limit to the voltages employed in external circuit reading pulses could be imposed when the devices operate as non-volatile memories. In order to study this correlation and to analyze the dependencies of the current derivative maxima, we have simulated different sets of curves. The key features of the models describing the physics behind the device operation are given in Ref. [10]. The results are shown in Fig. 5, where I–V curves are plotted in solid lines and the corresponding derivatives in dashed lines. From the maxima of the derivative, VTH_RESET are obtained. The role played by the tunneling, RQPC, and ohmic, RCF, components was clarified by changing the CF conductivity temperature coefficient, aT (see Fig. 5a). The thermal dependence of the electrical conductivity is given by:
rCF ðzÞ ¼
ð1Þ
where rCF0 stands for the conductivity at room temperature (T0) and z is the position along the CF length. We swept the aT parameter just to modify the weight of the ohmic component although the aT parameter should be fixed for each simulated structure since it is related to the CF chemical composition. In addition, in the QPC model the current is given by:
I¼
Fig. 4. (a) Distribution of experimental VRESET and VTH_RESET in a series of 2000 RS cycles for the devices described in Section 2. (b) Threshold voltage for reset processes versus reset voltage for the series of RS cycles considered in Fig. 2a. A correlation coefficient of R = 0.956 was obtained for this distribution.
rCF0
1 þ aT ½T CF ðzÞ T 0
2eN 1 1 þ exp fa½U beV CTR g eV CTR þ Ln h a 1 þ exp fa½U þ ð1 bÞeV CTR g
ð2Þ
where I is the CF current, e is the electron charge and N is the number of active channels in the CF [26,27]. In this model U is assumed to be the potential barrier height measured with respect to the Fermi level, a is a parameter linked to the potential barrier thickness at the Fermi level, VCTR is the voltage which is assumed to drop at both ends of the CF constriction where the tunneling takes place (in a fraction of b and (1 b) at each extreme, as suggested in [27]). Therefore, by modifying the a parameter value the potential barrier within the QPC model is changed and, as a consequence, the tunneling current [26,27], (see Fig. 5c). As shown in Fig. 5a, the lower the aT parameter, the higher the relative importance of the tunneling component since the CF ohmic resistance drops off. In the same way (Fig. 5c), when increasing the a parameter the tunneling resistance component increases. It can be seen that as the ohmic component diminishes, VTH_RESET increases because the tunneling component dominates for a wider range of applied voltages, and therefore the I–V curve region with convex curvature is larger. In Fig. 5, the curves corresponding to the three tested highest aT values (0.1 K1, 0.075 K1 and 0.05 K1) are included for the sake of completeness, although these aT values are much higher than those found in the literature [28]. Since the CFs show a metallic-like electrical resistance behavior, very high aT values imply a high ohmic resistance component and therefore lower device currents and lower Joule heating [7,13]. The reduction of Joule heating increases reset voltages since the temperature needed to trigger the CF metallic species dissolution is achieved at higher applied voltages.
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Fig. 5. (a) Simulated I–V curves for the devices under study for different resistivity temperature coefficients, aT (K1). The corresponding numerical derivatives are shown in (b). (c) Simulated I–V curves for the devices under study for different widths of the potential barrier (represented by different a (eV1) values [26,27]) linked to the tunneling current. In (d) the numerical derivatives for these I–V curves are shown. The maxima of the derivative current curves (corresponding to the VTH_RESET (V) values) are shown with black dots. The data employed for the simulation, according to Ref. [10], are connected with a single CF (rCFmax = 30 nm, CCF0 = 1%, rCFmax stands for the maximum radius of the truncated cone CF and CCF0 for the minimum radius, expressed as the percentage of rCFmax).
We have summarized the results of Fig. 5 in Fig. 6, where VTH_RESET values obtained for structures with thinner CFs, have also been included.
Note that the wider the CFs the lower the associated ohmic resistances and therefore higher VTH_RESET values are obtained. Also, for the lower aT values higher VTH_RESET values are obtained because of the lower weight of the ohmic component. It should be mentioned that in some of the measured RS cycles no derivative maxima were found and therefore VTH_RESET could not be determined. For example, in some cycles there is no tunneling barrier, so this case would correspond to a purely ohmic device and there would be no current derivative maximum (see the curve for a = 0 eV1 in Fig. 5c for a purely ohmic device). In this respect, it is important to highlight that for certain RRAMs the ohmic component is the only charge transport mechanism that is found, see for instance Refs. [29,30]. In some other cases with low tunneling resistance components, with unclear derivative maxima, measurement numerical noise could hinder the VTH_RESET determination. In these cases we could assume that the maxima are located at very low voltages; therefore, the CF would operate under ohmic regime in all the voltage range employed. Furthermore, also in these cases, the current derivative plot is almost flat at low voltages, indicating a constant resistance, and only when the CF heating is clear, the derivative starts to decrease, anticipating the onset of the reset event.
Fig. 6. Threshold voltage for reset versus the conductivity temperature coefficient and versus a parameter (controlling the width of the potential barrier for the tunnel current calculated with the QPC model). The simulated data are linked to single CFs. Several CF radii were employed (rCFmax = 30, 20, 10 nm, CCF0 = 1% with the notation employed in [10]).
5. Conclusions A new parameter, VTH_RESET, has been introduced in the study of RRAM devices in the context of device compact modeling. The
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numerical methods to extract it have been applied in the case of devices based on the Ni/HfO2/Si-n+ structure. It has been shown that this parameter holds information connected to the relative importance of the two transport mechanisms involved in the LRS conduction of the devices. An exhaustive study based on the use of simulations and experimental data is provided to shed light on this issue. The variations of the main resistance components involved in the charge conduction linked to the RRAM operation makes the curvature of reset I–V curves switch, and consequently, the definition of the new parameter is based on this curvature change, in an easy and compact manner. Acknowledgments UGR authors thank the support of the Spanish Ministry of Economy and Competitiveness under project TEC2014-52152-C3-2-R (also supported by the FEDER program). IMB-CNM authors thank the support of the Spanish Ministry of Economy and Competitiveness under projects TEC2014-52152-C3-1-R and TEC2014-54906JIN (supported by the FEDER program). References [1] Xie Y. Emerging memory technologies. Springer; 2014. [2] Waser R, Aono M. Nanoionics-based resistive switching memories. Nat Mater 2007;6:833–40. [3] Waser R, editor. Nanoelectronics and information technology. Berlin: WileyVCH; 2012. [4] Lanza M. A review on resistive switching in high-k dielectrics: a nanoscale point of view using conductive atomic force microscope. Materials 2014;7 (3):2155–82. [5] Pan F, Gao S, Chen C, Song C, Zeng F. Recent progress in resistive random access memories: materials, switching mechanisms and performance. Mater Sci Eng 2014;83:1–59. [6] Zahurak J, et al. Process integration of a 27 nm, 16Gb Cu ReRAM, IEDM Tech. Dig., pp. 6.2.1; 2014. p. 140–3. [7] Villena MA, Jiménez-Molinos F, Roldán JB, Suñé J, Long S, Lian X, et al. An indepth simulation study of thermal reset transitions in resistive switching memories. J Appl Phys 2013;114. 144505-144505-8. [8] Menzel S, Böttger U, Waser R. Simulation of multilevel switching in electrochemical metallization memory cells. J Appl Phys 2012;111. 014501/ 1-5. [9] Degraeve R, Fantini A, Raghavan N, Goux L, Clima S, Chen YY, et al. Hourglass concept for RRAM: a dynamic and statistical device model, IEEE 21st international symposium on the physical and failure analysis of integrated circuits (IPFA); 2014. p. 245–9. [10] Villena MA, González MB, Jiménez-Molinos F, Campabadal F, Roldán JB, Suñé J, et al. Simulation of thermal reset transitions in RRAMs including quantum effects. J Appl Phys 2014;115:214504.
[11] Bersuker G, Gilmer DC, Veksler D, Kirsch P, Vandelli L, Padovani A, et al. Metal oxide resistive memory switching mechanism based on conductive filament properties. J Appl Phys 2011;110:124518. [12] Vandelli L. Comprehensive physical modeling of forming and switching operations in HfO2 RRAM devices. IEDM Tech Dig 2011:17.5.1-4. [13] Russo U, Cagli C, Lacaita A-L. Self-accelerated thermal dissolution model for reset programming in unipolar resistive-switching memory (RRAM) devices. Trans Electronic Dev 2009;56(2). [14] Villena MA, González MB, Roldán JB, Campabadal F, Jiménez-Molinos F, Gómez-Campos FM, et al. An in-depth study of thermal effects in reset transitions in HfO2 based RRAMs. Solid State Electron 2015;111:47–51. [15] Jiménez-Molinos F, Villena MA, Roldán JB, Roldán AM. A spice compact model for unipolar RRAM reset process analysis. IEEE Trans Electron Dev 2015;62 (3):955–62. [16] Huang Peng, Liu Xiao Yan, Chen Bing, Li Hai Tong, Wang Yi Jiao, Deng Ye Xin, et al. A physics-based compact model of metal-oxide-based RRAM DC and AC operations, electron devices. IEEE Trans 2013;60(12):4090–7. [17] Rák A, Cserey G. Macromodeling of the memristor in spice. IEEE Trans ComputAided Des Integrated Circuits Syst 2010;29:632–6. [18] Guan X, Yu S, Wong H-SP. A SPICE compact model of metal oxide resistive switching memory with variations. IEEE Electron Dev Lett 2012;33:1405–7. [19] González MB, Rafí JM, Beldarrain O, Zabala M, Campadabal F. Analysis of the switching variability in Ni/HfO2-based RRAM devices. IEEE Trans Dev Mater Reliab 2014;14(2):769–71. [20] Ielmini D. Modeling the universal set/reset characteristics of bipolar RRAM by field- and temperature-driven filament growth. Electron Dev, IEEE Trans 2011;58(12):4309–17. [21] Villena MA, Jiménez-Molinos F, Roldán JB, Suñé J, Long S, Miranda E, et al. A comprehensive analysis on progressive reset transitions in RRAMs. J Phys D: Appl Phys 2014;47:205102. [22] García-Sanchez FJ, Ortiz-Conde A, Muci J, Sucre-González A, Liou JJ. A unified look at the use of successive differentiation and integration in MOSFET model parameter extraction. Microelectron Reliab 2015;5(2):293–307. [23] González P, Ibáñez MJ, Roldán AM, Roldán JB. An in-depth study on WENObased techniques to improve parameter extraction procedures in MOSFET transistors. Math Comput Simul 2015;118:248–57. [24] Long S, Cagli C, Ielmini D, Liu M, Suñé J. Reset statistics of NiO-based resistive switching memories. Electron Dev Lett, IEEE 2011;32(11):1570–2. [25] Long S, Cagli C, Ielmini D, Liu M, Suñé J. Analysis and modeling of resistive switching statistics. J Appl Phys 2012;111(7):074508. [26] Miranda E, Suñé J. Analytic modeling of leakage current through multiple breakdown paths in SiO2 films. In: IEEE Int. reliability physics symp. proc.; 30 April, May 2001. p. 367. [27] Procel LM, Trojman L, Moreno J, Crupi F, Maccaronio V, Degraeve R, et al. Experimental evidence of the quantum point contact theory in the conduction mechanism of bipolar HfO2-based resistive random access memories. J Appl Phys 2013;114:074509. [28] Bocquet M, Deleruyelle D, Muller C, Portal J-M. Self-consistent physical modeling of set/reset operations in unipolar resistive-switching memories. Appl Phys Lett 2011;98:263507. [29] Long S, Perniola L, Cagli C, Buckley J, Lian X, Miranda E, et al. Voltage and power-controlled regimes in the progressive unipolar RESET transition of HfO2-based RRAM. Sci Rep 2013;3. [30] Long S, Lian X, Ye T, Cagli C, Perniola L, Miranda E, et al. Cycle-to-cycle intrinsic RESET statistics in-based unipolar RRAM devices. Electron Dev Lett, IEEE 2013;34(5):623–5.
Contents lists available at ScienceDirect
Solid-State Electronics journal homepage: www.elsevier.com/locate/sse
A new parameter to characterize the charge transport regime in Ni/HfO2/Si-n+-based RRAMs M.A. Villena a, J.B. Roldán a,⇑, M.B. González c, P. González-Rodelas b, F. Jiménez-Molinos a, F. Campabadal c, D. Barrera b a b c
Departamento de Electrónica y Tecnología de Computadores, Universidad de Granada, Facultad de Ciencias, Avd. Fuentenueva s/n, 18071 Granada, Spain Departamento de Matemática Aplicada, Universidad de Granada, Facultad de Ciencias, Avd. Fuentenueva s/n, 18071 Granada, Spain Institut de Microelectrònica de Barcelona, IMB-CNM (CSIC), Campus UAB, 08193 Bellaterra, Spain
a r t i c l e
i n f o
Article history: Received 30 July 2015 Received in revised form 26 November 2015 Accepted 11 January 2016
Keywords: Resistive switching memory RRAM variability Simulation tools Conductive filaments Parameter extraction
a b s t r a c t In this work, a new parameter is defined to describe the charge transport regime and to understand the physics behind the operation of Ni/HfO2/Si-n+-based RRAMs. An extraction process of the parameter from experimental reset I–V curves is proposed. The new parameter allows to know the relative importance of the two main transport mechanisms involved in the charge conduction in the low resistance state of the device: a tunneling current through a potential barrier and an ohmic component. A complete simulation study on this issue is provided. Furthermore, the reset voltage can be estimated using this new parameter. Ó 2016 Elsevier Ltd. All rights reserved.
1. Introduction Different emerging technologies are currently under study to overcome the limitations of non-volatile FLASH memories [1,2]. Among them, Resistive Random Access Memories (RRAMs) are being considered the devices with the highest potential because of their unique features such as high endurance and speed, low program/erase currents, CMOS technology compatibility and capability for being fabricated in 3D stacks [3]. The good results obtained for a wide variety of individual devices, using different oxides and metals for the electrodes [1–5], have also been proved in the arena of complete memory chips [6]. This latter fact makes this technology even more promising. In the last few years, great research efforts have been devoted to fabrication and characterization of these devices. However, before RRAMs get ready for industrial applications other issues have to be addressed. In this respect, accurate device simulators will be needed to understand the physics behind their operation, such as those already published [7–14]. In addition, compact models [15–18] to be implemented in circuit simulation EDA tools, will be essential elements in the coming RRAM-based circuit simulation and design landscape. In compact modeling, parameter ⇑ Corresponding author. E-mail address: [email protected] (J.B. Roldán). http://dx.doi.org/10.1016/j.sse.2016.01.007 0038-1101/Ó 2016 Elsevier Ltd. All rights reserved.
extraction techniques have to be carefully designed since the set of parameters representing a particular device within a certain model framework is essential. In this context, a new parameter is presented here in the framework of the model introduced in [10,15]. The interpretation of its physical meaning is studied by combining the analysis of experimental and simulated data, and the parameter extraction technique is discussed.
2. Device description and measurement The Ni/HfO2/Si devices were fabricated on (1 0 0) n-type CZ silicon wafers with resistivity (0.007–0.013) X cm. Atomic layer deposition at 200 °C using tetrakis (Dimethylamido)-hafnium (TDMAH) and H2O as precursors was employed to deposit 20 nm-thick HfO2 layers. A high temperature anneal at 800 °C for 30 min in a N2 ambient was performed after growth of the dielectric film. The top Ni electrode with a 200 nm thickness was deposited by magnetron sputtering [19]. The current–voltage (I–V) characteristics were measured at 300 K by means of a HP-4155B semiconductor parameter analyzer controlled by GPIB with a PC, using MATLAB. The Si substrate was grounded and a negative voltage was applied to the Ni electrode, although absolute values of the applied voltages are shown henceforth.
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3. Threshold voltage for reset The only extracted parameters to characterize the transport features and charge distribution in RRAMs are VRESET and VSET and the corresponding currents IRESET and ISET [20,21]. From these parameters a great deal of information related to the physics behind the device operation can be obtained. In Ni/HfO2/Si-based devices, two different charge transport mechanisms, linked to tunneling and ohmic conduction, have been found [10]. The new parameter we present here is useful for analyzing the relative weight of these two current components. In Fig. 1a a simulated I–V curve is shown; for this we have used a previously developed simulator [10], where the current, heat and diffusion equations are self-consistently solved in RRAMs. We simulated a Ni/HfO2/Si-n+ structure with one Conductive Filament (CF) with features similar to the ones employed in Ref. [10] to fit the experimental I–V curves, including the Quantum Point Contact (QPC) model to account for tunneling. In Fig. 1a, a dot shows the point at which a change in the I–V plot curvature is observed. The presence of this curvature change is the evidence of a change in the relative weight of the two charge transport mechanisms found in the Low Resistance State (LRS) of the studied devices. This curvature change led us to propose a technique to define and extract a new parameter to account for this effect. Mathematically speaking this effect can be characterized by means of the current derivative maximum versus applied voltage in a reset process (Fig. 1b). We name this parameter as threshold voltage for reset, VTH_RESET (see Fig. 1a and b). As reported in Ref. [10], the charge transport characteristics in the LRS of the devices under study are described by two components: a tunneling process and an ohmic component. In the case of the tunneling component, it can reasonably be reproduced by means of the QPC model, considering the potential barrier formed between the CF and the silicon substrate, somewhere close to the Si/HfO2 interface, while the ohmic part is due to the CFs metallic nature. These two components allow for the description of the current flow in the LRS. It was shown in Ref. [10] that usually at low voltages the I–V curve slope, linked to the evolution of the total resistance, is controlled mainly by the tunneling transport component, while the ohmic component increases its relative weight when the voltage is increased. This is because at low voltages the resistance associated with the tunnel transitions (RQPC) gradually decreases as the electric field increases while the ohmic resistance (RCF) remains constant (see Fig. 2). Therefore, the total resistance, the sum of both components, decreases in the low voltage regime
Fig. 2. CF resistance (RCF) and tunnel resistance (RQPC) versus applied voltage. The unbalanced relation between the variation of RCF and RQPC before and after VTH_RESET changes the curvature of the reset I–V curve (see Fig. 1).
which results in a concave current–voltage curve (see Fig. 1a). When VTH_RESET is reached this trend changes. RQPC decreases slowly and RCF increases (Fig. 2). This change in the RCF behavior is due to its dependence on the temperature; it is also important to point out that RCF depends on the CF shape. The curvature of I–V changes from convex to concave (see Fig. 1a) due to heating effects. Only when the temperature increases RCF grows with voltage, anticipating the reset process. In Fig. 3, experimental I–V reset curves and the corresponding numerical derivatives are shown, with the current derivative maxima indicated by solid squares. The numerical calculation of the I–V curve derivative is rather complex because of the measurement noise, as reported in parameter extraction techniques applied to other type of devices [22,23]. In this work, the current derivative calculation has been carried out by means of a previously developed technique which minimizes the numerical noise [23]. 4. Results and discussion We have extracted VTH_RESET for a whole series of resistive switching (RS) events (more than 2000 RS events), focusing on the calculation of current derivatives for the reset I–V curves, as shown in Fig. 3. The results are plotted in Fig. 4a along with the
Fig. 1. (a) Simulated I–V reset curve for Ni/HfO2/Si-n+ devices (solid line). Dashed lines show the curvature of I–V curve before (convex, shown in red dashed lines) and after (concave, shown in blue dashed lines) of threshold voltage for reset, VTH_RESET (shown with an orange symbol). (b) Numerical derivative of the reset I–V curve of (a). VTH_RESET is defined as the voltage for which the maximum of this derivative is reached. (For interpretation of the references to colour in this figure legend, the reader is referred to the web version of this article.)
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Fig. 3. Experimental I–V reset curves for Ni/HfO2/Si-n+ devices (solid lines) for different resistive switching cycles. The numerical derivatives of these curves have also been plotted (dashed lines). See that the current derivative curves show different maxima, the corresponding voltages for those maxima are named VTH_RESET.
reset voltages, VRESET, obtained for the same experimental curves. These latter parameters were obtained following the techniques described in Ref. [21] for a 30% current reduction at the reset point with respect to the maximum current value of the I–V curve. Although other authors define VRESET as the voltage associated with the maximum current found in the I–V curve [24,25], we use the
previous definition because it works better for a wider set of cases as explained in Ref. [21]. Nevertheless, both methods provide similar results for the studied RRAMs in this work. Note in Fig. 4a that the distribution of VTH_RESET values has similar characteristics as the VRESET distribution, with VTH_RESET lower than VRESET by 0.5–1 V, on average. Both distributions are highly correlated, as shown in Fig. 4b. This is an important result since it implies that VRESET values can be estimated in advance for each reset cycle, without having to reach the destructive process that leads to a reset event [7]. As a consequence, and taking into account that VTH_RESET values are lower than VRESET, a limit to the voltages employed in external circuit reading pulses could be imposed when the devices operate as non-volatile memories. In order to study this correlation and to analyze the dependencies of the current derivative maxima, we have simulated different sets of curves. The key features of the models describing the physics behind the device operation are given in Ref. [10]. The results are shown in Fig. 5, where I–V curves are plotted in solid lines and the corresponding derivatives in dashed lines. From the maxima of the derivative, VTH_RESET are obtained. The role played by the tunneling, RQPC, and ohmic, RCF, components was clarified by changing the CF conductivity temperature coefficient, aT (see Fig. 5a). The thermal dependence of the electrical conductivity is given by:
rCF ðzÞ ¼
ð1Þ
where rCF0 stands for the conductivity at room temperature (T0) and z is the position along the CF length. We swept the aT parameter just to modify the weight of the ohmic component although the aT parameter should be fixed for each simulated structure since it is related to the CF chemical composition. In addition, in the QPC model the current is given by:
I¼
Fig. 4. (a) Distribution of experimental VRESET and VTH_RESET in a series of 2000 RS cycles for the devices described in Section 2. (b) Threshold voltage for reset processes versus reset voltage for the series of RS cycles considered in Fig. 2a. A correlation coefficient of R = 0.956 was obtained for this distribution.
rCF0
1 þ aT ½T CF ðzÞ T 0
2eN 1 1 þ exp fa½U beV CTR g eV CTR þ Ln h a 1 þ exp fa½U þ ð1 bÞeV CTR g
ð2Þ
where I is the CF current, e is the electron charge and N is the number of active channels in the CF [26,27]. In this model U is assumed to be the potential barrier height measured with respect to the Fermi level, a is a parameter linked to the potential barrier thickness at the Fermi level, VCTR is the voltage which is assumed to drop at both ends of the CF constriction where the tunneling takes place (in a fraction of b and (1 b) at each extreme, as suggested in [27]). Therefore, by modifying the a parameter value the potential barrier within the QPC model is changed and, as a consequence, the tunneling current [26,27], (see Fig. 5c). As shown in Fig. 5a, the lower the aT parameter, the higher the relative importance of the tunneling component since the CF ohmic resistance drops off. In the same way (Fig. 5c), when increasing the a parameter the tunneling resistance component increases. It can be seen that as the ohmic component diminishes, VTH_RESET increases because the tunneling component dominates for a wider range of applied voltages, and therefore the I–V curve region with convex curvature is larger. In Fig. 5, the curves corresponding to the three tested highest aT values (0.1 K1, 0.075 K1 and 0.05 K1) are included for the sake of completeness, although these aT values are much higher than those found in the literature [28]. Since the CFs show a metallic-like electrical resistance behavior, very high aT values imply a high ohmic resistance component and therefore lower device currents and lower Joule heating [7,13]. The reduction of Joule heating increases reset voltages since the temperature needed to trigger the CF metallic species dissolution is achieved at higher applied voltages.
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Fig. 5. (a) Simulated I–V curves for the devices under study for different resistivity temperature coefficients, aT (K1). The corresponding numerical derivatives are shown in (b). (c) Simulated I–V curves for the devices under study for different widths of the potential barrier (represented by different a (eV1) values [26,27]) linked to the tunneling current. In (d) the numerical derivatives for these I–V curves are shown. The maxima of the derivative current curves (corresponding to the VTH_RESET (V) values) are shown with black dots. The data employed for the simulation, according to Ref. [10], are connected with a single CF (rCFmax = 30 nm, CCF0 = 1%, rCFmax stands for the maximum radius of the truncated cone CF and CCF0 for the minimum radius, expressed as the percentage of rCFmax).
We have summarized the results of Fig. 5 in Fig. 6, where VTH_RESET values obtained for structures with thinner CFs, have also been included.
Note that the wider the CFs the lower the associated ohmic resistances and therefore higher VTH_RESET values are obtained. Also, for the lower aT values higher VTH_RESET values are obtained because of the lower weight of the ohmic component. It should be mentioned that in some of the measured RS cycles no derivative maxima were found and therefore VTH_RESET could not be determined. For example, in some cycles there is no tunneling barrier, so this case would correspond to a purely ohmic device and there would be no current derivative maximum (see the curve for a = 0 eV1 in Fig. 5c for a purely ohmic device). In this respect, it is important to highlight that for certain RRAMs the ohmic component is the only charge transport mechanism that is found, see for instance Refs. [29,30]. In some other cases with low tunneling resistance components, with unclear derivative maxima, measurement numerical noise could hinder the VTH_RESET determination. In these cases we could assume that the maxima are located at very low voltages; therefore, the CF would operate under ohmic regime in all the voltage range employed. Furthermore, also in these cases, the current derivative plot is almost flat at low voltages, indicating a constant resistance, and only when the CF heating is clear, the derivative starts to decrease, anticipating the onset of the reset event.
Fig. 6. Threshold voltage for reset versus the conductivity temperature coefficient and versus a parameter (controlling the width of the potential barrier for the tunnel current calculated with the QPC model). The simulated data are linked to single CFs. Several CF radii were employed (rCFmax = 30, 20, 10 nm, CCF0 = 1% with the notation employed in [10]).
5. Conclusions A new parameter, VTH_RESET, has been introduced in the study of RRAM devices in the context of device compact modeling. The
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numerical methods to extract it have been applied in the case of devices based on the Ni/HfO2/Si-n+ structure. It has been shown that this parameter holds information connected to the relative importance of the two transport mechanisms involved in the LRS conduction of the devices. An exhaustive study based on the use of simulations and experimental data is provided to shed light on this issue. The variations of the main resistance components involved in the charge conduction linked to the RRAM operation makes the curvature of reset I–V curves switch, and consequently, the definition of the new parameter is based on this curvature change, in an easy and compact manner. Acknowledgments UGR authors thank the support of the Spanish Ministry of Economy and Competitiveness under project TEC2014-52152-C3-2-R (also supported by the FEDER program). IMB-CNM authors thank the support of the Spanish Ministry of Economy and Competitiveness under projects TEC2014-52152-C3-1-R and TEC2014-54906JIN (supported by the FEDER program). References [1] Xie Y. Emerging memory technologies. Springer; 2014. [2] Waser R, Aono M. Nanoionics-based resistive switching memories. Nat Mater 2007;6:833–40. [3] Waser R, editor. Nanoelectronics and information technology. Berlin: WileyVCH; 2012. [4] Lanza M. A review on resistive switching in high-k dielectrics: a nanoscale point of view using conductive atomic force microscope. Materials 2014;7 (3):2155–82. [5] Pan F, Gao S, Chen C, Song C, Zeng F. Recent progress in resistive random access memories: materials, switching mechanisms and performance. Mater Sci Eng 2014;83:1–59. [6] Zahurak J, et al. Process integration of a 27 nm, 16Gb Cu ReRAM, IEDM Tech. Dig., pp. 6.2.1; 2014. p. 140–3. [7] Villena MA, Jiménez-Molinos F, Roldán JB, Suñé J, Long S, Lian X, et al. An indepth simulation study of thermal reset transitions in resistive switching memories. J Appl Phys 2013;114. 144505-144505-8. [8] Menzel S, Böttger U, Waser R. Simulation of multilevel switching in electrochemical metallization memory cells. J Appl Phys 2012;111. 014501/ 1-5. [9] Degraeve R, Fantini A, Raghavan N, Goux L, Clima S, Chen YY, et al. Hourglass concept for RRAM: a dynamic and statistical device model, IEEE 21st international symposium on the physical and failure analysis of integrated circuits (IPFA); 2014. p. 245–9. [10] Villena MA, González MB, Jiménez-Molinos F, Campabadal F, Roldán JB, Suñé J, et al. Simulation of thermal reset transitions in RRAMs including quantum effects. J Appl Phys 2014;115:214504.
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