A novel device fabricated with Cu2NiSnS4chalcogenide: Morphological and temperature-dependent electrical characterizations

Current Applied Physics 20 (2020) 58–64

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A novel device fabricated with Cu2NiSnS4chalcogenide: Morphological and temperature-dependent electrical characterizations

T

Abdulkerim Karabulutb,∗, Adem Sarilmaza, Faruk Ozela,c, İkram Orakd,∗∗, Mehmet Akif Şahinkayae a

Department of Metallurgical and Materials Engineering, Faculty of Engineering, Karamanoglu Mehmetbey University, 70200, Karaman, Turkey Sinop University, Faculty of Engineering, Department of Electrical and Electronics Engineering, Sinop, Turkey c Scientific and Technological Research and Application Center, Karamanoglu Mehmetbey University, 70200, Karaman, Turkey d Vocational School of Health Services, Bingol University, Bingol, Turkey e Department of Physics, Faculty of Sciences and Art, Bingol University, Bingol, Turkey b

A R T I C LE I N FO

A B S T R A C T

Keywords: Electrical characterization Cu2NiSnS4 nanorods Hot-injection technique Interfacial layer Diode application Chalcogenides

Cu2NiSnS4 nanorods were synthesized by the usage of hot-injection technique and used as interlayer between the p-Si and Al metal in order to examine their behavior against the temperature and frequency changes. The current-voltage measurements were performed in 80–300 K temperature range with 20 K steps. The X-Ray Diffraction (XRD) was used to prove the crystal structure of the synthesized Cu2NiSnS4 nanorods. Some crucial device parameters such as barrier height, series resistance and ideality factor values were calculated, and the obtained values were compared with other studies in the literature. It has been seen that the calculated parameters of the prepared device are strongly dependent on temperature changes. Besides, the capacitor behavior of fabricated device was investigated depending on the frequency and voltage changes. The experimental results indicated that the prepared device with Cu2NiSnS4 nanorods interlayer could be utilized in the electronic technology, especially applications in wide temperature range.

1. Introduction The most desirable situation in metal-semiconductor based devices is the optimization of experimental parameters, and this topic has been a source of motivation for many researchers. One of the most important processes in this case is to place an interfacial layer between the metal and the semiconductor layer. By using this layer, the electrical and optical parameters can be changed [1–3]. The devices produced in this way are used in many electronic and optoelectronic applications: diode, photodiode, transistor, solar cell, ext [4–6]. Chalcogenides are materials that include at least one chalcogen elements (eg, Te, Se or S) as a fundamental component. These materials are covalently bonded materials which may form as amorphous or crystalline. And also, they are basically semiconductor materials, which have bandgap characteristically between 1 and 3 eV, depending on the properties and composition of the materials [7]. Chalcogenides are highly functional materials that attract attention due to their strong reactions to thermal, electrical and optical stimuli. Recently, Cu2XSnS4 (X = Ni, Zn, Co, Mn, Fe) semiconductors, known as quaternary

∗

chalcogenides, have become a good source of motivation for researchers. Since, they could be used as a thin film in electronic device manufacturing applications due to their excellent thermal, chemical, electrical and optical properties [8–13]. Among them, Cu2NiSnS4 nanocrystal, which is the important copper based quaternary chalcogenides, was synthesized in order to use in the device fabrication. This material is of great importance due to its features such as non-toxicity, environmentally friendly and low cost. The bandgap value of the Cu2NiSnS4 nanocrystals are in the range of 1.1–1.5 eV [14]. This range is quite suitable for photovoltaic and optoelectronic applications, because the absorbance is high in this range [15,16]. There are different methods used to obtain the chalcogenides films or particles: Spray pyrolysis, hydrothermal, solvothermal, sol-gel, electrospinning and hot injection, ext [17–21]. Among all the synthesis methods, the hot injection technique is of great importance as it makes possible to the synthesis of the desired nanoparticles in a short time. Another important feature of this technique is the ability of controlling the elemental compositions, shapes and crystal sizes of the examined nanoparticles [22].

Corresponding author. Corresponding author. E-mail addresses: [email protected] (A. Karabulut), [email protected] (İ. Orak).

∗∗

https://doi.org/10.1016/j.cap.2019.10.011 Received 25 April 2019; Received in revised form 4 September 2019; Accepted 9 October 2019 Available online 09 October 2019 1567-1739/ © 2019 Korean Physical Society. Published by Elsevier B.V. All rights reserved.

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hexagonal crystal structure of CNTS nanorods. The diffraction peaks of CNTS were shifted slightly toward lower 2ϴ side as compared with CZTS, indicating the increased lattice constants of CNTS due to ionic size differences between Ni2+ (0.55 Å) and Zn2+ (0.60 A) ions in the same coordination number [14,28,29]. The TEM micrographs were examined to investigate the morphology, structure and size in Fig. 1a. As can be clearly seen from TEM images, all of the CNTS were formed as similar nanorod structures with average edge length ranging from 20 to 60 nm. The electron diffraction pattern displays discontinuous diffraction rings confirming the polycrystalline nature of the rods. Further structural information is revealed by HR-TEM observation. Lattice fringes of nanorods can be easily seen. The estimated fringe distances of 0.314 nm represent the (100) crystallographic plane. Fig. 2 exhibits the SEM image of the covered CNTS thin film. The SEM image shows that the synthesized material is uniformly and successfully coated onto the semiconductor surface.

There are many studies aimed to modify barrier height with the interface layer used in metal-semiconductor contact applications. Among these studies, determining the reactions of the electrical behavior for the produced devices against temperature change has been both a great source of motivation and an important research topic. Karabulut et al. [23] fabricated the organic layer/p-Si heterojunction in order to investigate the temperature-dependent electrical properties, and they reported that the generated heterojunctions depended on temperature strongly. Panda et al. [24] prepared the crystalline thin film materials and coated onto the surface of silicon. They examined behavior of the electrical parameters of fabricated device against the temperature changes. There are many studies on the use of this material group (chalcogenides) in photovoltaic applications, but there is no previous study of the effects of this material on the temperature-dependent characteristics of the produced device. Our research group reported the temperature-dependent electrical properties for the first time. In addition, frequency-dependent capacitance and conductance properties were also investigated. Another aim is to compare the produced device with other conventional devices.

3.2. Temperature-dependent current-voltage characteristics of fabricated device Fig. 3 shows the I–V characteristics of fabricated Al/Cu2NiSnS4/pSi/Al device for selected temperature values ranging from 80 to 300 K with steps of 20 K. In this figure, it is observed that the produced device has a rectification behavior regardless of the temperature change at all measured temperature values. In this context, it could be said that the fabricated device is convenient to use in electronic applications in the wide temperature ranges [30]. The crucial diode parameters such as Φb and n values for Al/p-Si device with Cu2NiSnS4 nanocrystal interfacial layer were calculated by the usage of voltage-dependent current data. The experimental measurements made conform to the standard thermionic emission theory, and according to this theory the current value can be formulated as follows [31,32];

2. Experimental details 2.1. Synthesis of Cu2NiSnS4(CNTS) nanorods CNTS nanorods were synthesized by a facile hot-injection method [25–27]. Typically, stoichiometric proportions of copper(II) acetate, Ni (II) acetate and tin(II) acetate were dissolved in 10 mL oleylamine in a three-necked flask. Then, reaction temperature was set as 260 °C under Ar flow. When color change was observed (180 °C), the mixture of DDT and t-DDT were injected to reaction medium and the solution was subsequently heated up to 260 °C for 30 min. After the reaction, the reaction medium was cooled down to 80 °C and CNTS nanorods were collected by centrifugation and washed with absolute ethanol.

I = I0 ⎡exp ⎛− ⎢ ⎝ ⎣

2.2. Preparation of Al/Cu2NiSnS4/p-Si/Al device

q (V − IRs ) ⎞ − 1⎤ ⎥ kT ⎠ ⎦

(1)

in the formula above, the saturation current is represented with I0 and calculated with the linear part intercept value of lnI-V curve at voltage equal to zero, and this value expressed as [31];

The Al/Cu2NiSnS4/p-Si/Al device was prepared by the usage of ptype single crystals Si wafer which has features given by manufacturer like 525 ± 25 m thickness, 1-10 Ω-cm resistivity and (111) surface orientation. Firstly, the studied wafer was cleaned chemically using standard solvent cleaning procedure. After this step, the aluminum metal (high purity) was evaporated to the back side of wafer to obtain ohmic contact. And then, the prepared CNTS solution were covered onto the front side of wafer by the use of spin coating method under rotation at 1000 rpm for 40 s at room temperature. After this, the aluminum metal was evaporated onto the CNTS film to prepare rectifying contacts. The shapes of this contacts were circular and the radius of contacts is 0.5 mm. After fabrication process, the current-voltage measurements of prepared device were performed in the 80–320 K temperature ranges with Keithley 2400, and the frequency-dependent capacitance/conductance-voltage measurements were performed by the usage of HP 4192A LF impedance analyzer.

qΦ I0 = AA∗ T 2exp ⎛− b ⎞ ⎝ kT ⎠

(2)

T, q, Φb, k, A* and A expressions in equation above stand for the temperature, electronic charge, barrier height for zero bias, Boltzmann constant, Richardson constant (32 A/cm−2 K−2 for p-type Si) and the diode area, respectively. In addition to these, the Φb and n values could be obtain are obtained by rearranging Eqs. (1) and (2), and given by Ref. [33];

Φb =

kT ⎛ AA∗ T 2 ⎞ ln q ⎝ I0 ⎠ ⎜

⎟

(3)

and

n= 3. Results and discussion

q ⎛ dV ⎞ kT ⎝ d (lnI ) ⎠ ⎜

⎟

(4)

The obtained Φb and n values for the produced Al/Cu2NiSnS4/p-Si/ Al device at different temperature values are given in Table 1. As seen in Table 1, the values of n increased as the temperature decreased and the n values for prepared device were found as about 1.19 and 3.02 for the temperature values 300 and 80 K values, respectively. Kocyigit et al. [8] fabricated the Au/Cu2WSe4/p-Si device to investigate its electrical characteristics, and found the ideality factor to be 4.84 for room temperature. It is considerably higher than the value found in our study, in addition, the value of ideality factor found in our study is much closer to the ideal diode behavior compared to this. In addition to this calculation, the Φb values decreased with decreasing temperature and they

3.1. Characterization of synthesized Cu2NiSnS4nanorods The crystal structures of sample were characterized by XRD on a Bruker D8 Advance diffractometer using Cu Kα radiation (λ = 1.5406 Å). Fig. 1a shows the XRD patterns of the CNTS nanorods. The positions of all peaks are in good agreement with the reference pattern of hexagonal structure (P63mc space group; JCPDS 01-0792204) for CNTS nanorods, suggesting that all these samples are of considerable purity. Since Ni2+ and Zn2+ ionic radius are very close to each other, the use of nickel instead of zinc made it possible to produce 59

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Fig. 1. a) XRD pattern, b) TEM and c) HR-TEM images of Cu2NiSnS4 nanorods. The TEM inset shows the SAED image.

Fig. 2. SEM images of Cu2NiSnS4nanorods film.

were found as about 0.79 and 0.27 eV for the temperature values of 300 and 80 K, respectively. The changings of ideality factor and barrier height values depend on the temperature changes were demonstrated in Fig. 4. As can be seen from Fig. 4 and Table 1, the determined values of n are greater than unity for all selected temperature values. These behaviors of n values for this device indicates that there is no pure TE current. However, the high values of n values may be caused by many different reasons, and mentioned reasons can be counted as series resistance, non-homogeneous barrier height, and presence of interface states or image force effects at the Cu2NiSnS4/p-Si interface [34–36]. In addition to these results, the increase in temperature causes an increase in the saturation current values. These behaviors of n and Φb values are already expected for electronic devices based on contacted metals and semiconductors, and it is frankly mean that the produced device could be used for applications in electronics technology depends on the temperature [37]. Numerous studies with similar results exist in the literature; for example, Aydogan et al. [38] examined the structure formed with a layer of polymer interface between the metal and the semiconductor layers, and reported that the height of the barrier increased with increasing temperature and the ideality factor decreased.

Fig. 3. Temperature-dependent I-Vplots of Al/Cu2NiSnS4/p-Si/Al device.

It is also known that the charge carriers do not have sufficient energy to surpass the high barrier height at low temperatures. Therefore, the barrier height and ideality factor which are important parameters for diode-based devices exhibit such behaviors [39]. That is, the decrease in the ideality factor and increase in barrier height with increasing temperature are caused by the inhomogeneous barrier height [40]. The nkT versus kT plot of Al/Cu2NiSnS4/p-Si/Al device is demonstrated in Fig. 5. This graph is plotted to better understand the current mechanism of the generated device. As is well known, for an ideal diode, the ideality factor value is not affected by the temperature

60

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Table 1 Some electrical calculations for Al/Cu2NiSnS4/p-Si/Al device. T

n-TE

Φb (TE )

I0

Φb (Norde)

Rs(kΩ) (Norde)

80 100 120 140 160 180 200 220 240 260 280 300

3.021 2.632 2.270 2.053 1.943 1.697 1.486 1.397 1.302 1.273 1.227 1.192

0.2743 0.3409 0.4169 0.4665 0.5128 0.5512 0.5937 0.6274 0.6660 0.7011 0.7391 0.7888

8.75 × 10−15 1.72 × 10−14 1.16 × 10−14 8.22 × 10−14 4.65 × 10−13 3.11 × 10−12 1.13 × 10−11 5.32 × 10−11 1.54 × 10−10 4.51 × 10−10 1.01 × 10−09 1.31 × 10−09

0.348 0.429 0.483 0.529 0.649 0.671 0.745 0.771 0.778 0.815 0.823 0.828

4786 3786 2541 1033 367.2 784.3 647.6 897.1 527.7 309.6 171.9 106.8

Fig. 6. The experimental Richardson curves of Al/Cu2NiSnS4/p-Si/Al device.

change, so it should be linear as shown in Fig. 5. Besides, there is a parallel situation between the ideal and experimental curves above the temperature of 180 K, and the curves fit the field emission current theory in this region. In this study, the observed differences in the nkT vs. kT plots for the experimental and ideal situation are due to different effective current transport mechanisms in addition to the TE current and existence of inhomogeneous barrier height [41]. The (kT)−1 and (nkT)−1 versus ln(I0/T2) graph of Al/Cu2NiSnS4/pSi/Al device was exhibited in Fig. 6. The slope of the straight portion of the experimental (kT)−1 and (nkT)−1 versus ln(I0/T2) curve gives the barrier height, and the point that intersects the y-axis is used to find the value of the Richardson constant. It is seen that curves are not linear across all values. The reasons for the non-linearity of the ln(I0/T2) versus 1/kT curve result from the temperature-dependent barrier height and ideality factor and the recombination effect of the semiconductor [42,43]. In addition to these, the calculated Richardson constant and activation energy values are shown in the figure. The calculated A* value is relatively small compared to its real value, and this is due to the barrier height patches with different dimensions, i.e., the disruption of the barrier height, and the intermediate layer used in the device [44]. Horvath [45] reported that the investigation of current-voltage temperature dependency can be affected by the lateral inhomogeneity of barrier, and that the phenomenological value, which could be might differed from the measured results, is based on a real effective mass value. Aydogan et al. [46] produced the Au/p-Si diode with polyaniline interlayer and found the Richardson constant to be 7.534 × 10−6 A/ K2cm2. In other study, Soylu [47]coated the ZnO nanoparticles onto the SiC and investigated the electrical properties. The author reported that the experimental Richardson constant and barrier height found to be 13.14 A/K2cm2 and 0.15 eV, respectively. In the obtained experimental results, it was stated that the series resistance could adversely affect the produced devices and could be removed from the ideal situation. By using current-voltage measurements, the series resistance and barrier height of generated device could be calculated with the help of the Norde approximation [48]. According to this approach;

Fig. 4. The temperature-dependent barrier height and ideality factor values curves of Al/Cu2NiSnS4/p-Si/Al device.

F (V ) =

Fig. 5. Demonstration of nkT versus kT plot of Al/Cu2NiSnS4/p-Si/Al device for experimental and ideal case.

V I − kT ⎛ ∗ 2 ⎞ γ ⎝ AA T ⎠

(5)

in the equation above, γ represents the dimensionless integer and its 61

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Fig. 7. F(v)–V plots of Al/Cu2NiSnS4/p-Si/Aldeviceat various temperature.

value is bigger than the ideality factor. The expressions giving Φb and Rs with the rearrangement of Eq. (5) can be written as follows,

V kT ⎞ Φb = F (V0) + ⎜⎛ 0 + ⎟ γ q ⎠ ⎝

(6)

and,

Rs =

Fig. 8. Capacitance-Voltage characteristics of Al/Cu2NiSnS4/p-Si/Al device in the range from 1 to 1000 kHz.

kT γ − n q I

(7)

in equation (6), F(V0) term stands for the minimum value of F(V) plot, that is, the lowest value detected along the curve. The voltage value corresponding to this value is V0. The F(V)–V graph of Al/Cu2NiSnS4/p-Si/Al device for different temperature was presented in Fig. 7. The calculated Rs and Φb values by the aid of Norde's approach are presented in Table 1. As can be seen from the table, the obtained values by different methods are approximately compatible with each other. It is clearly seen that Rs is temperature dependent, and its value reduced by the increase in temperature. In addition to this situation, the values of Φb also increased with the temperature rise. This experimentally determined decrease in series resistance value with increasing temperature is related to the increase of carriers with increasing temperature [49].

3.3. Capacitance-Voltage characteristics of fabricated device The characteristic C–V and G-V graphs of produced device with Cu2NiSnS4nanocrystal interlayer were exhibited in Figs. 8 and 9, respectively. The measurements were made from 1 kHz to 1000 kHz, and the performed measurements for low frequencies were shown with attached thumbnails in Figs. 8 and 9. As seen in figures, the capacitance values increase by the increase of voltage for all frequencies, and they reach a constant value for each frequency at high voltage values. Besides, the conductance values also increase as the voltage increases and they reach approximately the same value at high voltages. In addition to these, while the conductance values increase by the increase of frequency, the capacitance values decrease. The reason of these behaviors of C/G-V characteristics are due to the series resistance and interface states in device [50–52]. The experimental impedance modulus-voltage characteristics of Al/Cu2NiSnS4/pSi/Al device demonstrated in Fig. 10 as function of frequency. The measurements were performed in the range of −2 and 2 V for all frequency values. As seen in figure, the impedance modulus values affected the frequency and voltage, and they decrease by the increase of voltage. Besides, it can be seen from Fig. 10 that the values of impedance modulus decrease with increasing frequency.

Fig. 9. Conductance-Voltage characteristics of Al/Cu2NiSnS4/p-Si/Al device in the range from 1 to 1000 kHz.

4. Conclusion In present work, we fabricated the Al/Cu2NiSnS4/p-Si/Aldevice and investigated the morphological and electrical behavior of this device. The fabricated device was characterized SEM, TEM, XRD, I–V and C/GV measurements. The XRD patterns revealed that the positions of all peaks are in good agreement with the reference pattern. The SEM image exhibited that the synthesized materials were successfully covered onto the semiconductor surface. However, it is understood from the TEM images that the material has a nanorod-like structure. The experimental results show that n values decrease with increasing temperature and Φb values increase. These changes in values of Φb and n indicate that the 62

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[11]

[12] [13]

[14]

[15]

[16]

[17]

[18]

[19]

[20]

Fig. 10. Experimental impedance modulus-voltage characteristics of the Al/ Cu2NiSnS4/p-Si/Aldevice for different frequencies.

[21]

behavior of device show a non-ideal and that series resistance is effective on the device characteristics. Therefore, the values of Rs and Φb were analyzed using the Norde's approach. On the other hand, capacitor behavior of fabricated device were investigated by the use of capacitance and conductance measurements against voltage changes, and these measurements indicated that the device characteristics were depend on frequency and voltage changes strongly. In this context, the fabricated device could be utilized in the developing electronic technology, especially applications in wide range of temperature.

[25]

Acknowledgments

[26]

[22]

[23]

[24]

This work is supported by Karamanoglu Mehmetbey University BILTEM (Scientific and Technological Research and Application Center) and TUBITAK (The Scientific and Technological Research Council of Turkey) under project number 217M212, and the Scientific Research Projects Unit of Sinop University, Project No. MMF-1901-18-33. The authors would like to thank Sinop University.

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