A novel thermal management scheme for 3D-IC chips with multi-cores and high power density

Applied Thermal Engineering 168 (2020) 114832

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A novel thermal management scheme for 3D-IC chips with multi-cores and high power density

T

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Bin Dinga,b,1, Zhi-Hao Zhanga,1, Liang Gonga,b, , Ming-Hai Xua, Zhao-Qin Huangc a

Department of Energy & Power Engineering, China University of Petroleum (East China), Qingdao, Shandong 266580, China Institute of New Energy, China University of Petroleum (East China), Qingdao, Shandong 266580, China c School of Petroleum Engineering, China University of Petroleum (East China), Qingdao, Shandong 266580, China b

H I GH L IG H T S

model of 3D-IC interlayer microchannel structure was established. • AMicrochannel was discussed on the maximum temperature of processor. • A novel thermalstructure management scheme for 3D-IC chips with multi-cores was obtained. •

A R T I C LE I N FO

A B S T R A C T

Keywords: Thermal management 3D-IC Multi-cores Micro-channel Structure optimization

To solve the increasingly serious thermal management problem of chips with multi-cores and high power density in the three-dimensional integrated circuit (3D-IC), a model of 3D-IC interlayer microchannel structure is developed to analyze the temperature distribution on the bottom of the processor and flow field distribution inside the microchannel. Moreover, based on the real structure of Intel's sixth generation microprocessor, four cores with an arrangement of 2×2 are involved in the processor of the present model. As the results, the effects of micro-pin fin width and arrangement, clustered micro-pin fins on the core regions and baffles on the surrounding region are discussed on the maximum temperature in the core regions and the total pressure drop of the microchannel heat sink. The numerical results prove that two peaks present on the surface temperature along the flow direction, which attributes to the higher heat flux of the core regions. However, clustering micro-pin fins on the core regions deteriorate the heat transfer performance of chips, owing to the increase of flow resistance. By contrast, arranging in-line & staggered micro-pin fins on the core regions and adding single-layer baffles on the surrounding region are effective ways to balance the pumping power and heat transfer performance of the microchannel. After structural optimization the maximum temperature in the core areas decreases 8 K, correspondingly, the pumping power increases 148%.

1. Introduction Since Gordon Moore presented the famous Moore's law in 1965, the computer chips have made remarkable progress. However, the Moore's law underwent increasing challenges with the chip size approaching the physical limit. Therefore, many technologies were put forward to break up the limitation of Moore's law, and the three-dimensional integrated circuit (3D-IC) technology is one of the representatives [1]. The memory, sensor and functional chips can be stacked vertically in the same package by 3D-IC technology. Compared with traditional electronic packaging, 3D packaging owns the advantages of shorter

interconnection length, better heterogeneous integration and more compact integrated circuits [2]. However, compared with 2D integrated circuits, the heat dissipation of the bottom chips in 3D-IC is a very tricky problem, which is called “trapped heat effect” [3]. It should be noted that the temperature rise of the chips is inevitable once the heat dissipation problem is not handled properly, leading to the reduction of chip performance and service life, the increase of mechanical thermal stress and even cause chip invalidity. Statistics show that more than 55% of chip invalidity is attributed to the excessive temperature [4]. Moreover, for every 10 °C increase in the chip temperature, the probability of chip invalidity increases by an order of magnitude. At present,

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Corresponding author at: Department of Energy & Power Engineering, China University of Petroleum (East China), Qingdao, Shandong 266580, China. E-mail address: [email protected] (L. Gong). 1 Author contributions: Bin Ding and Zhi-Hao Zhang contributed equally. https://doi.org/10.1016/j.applthermaleng.2019.114832 Received 12 July 2019; Received in revised form 20 December 2019; Accepted 20 December 2019 Available online 23 December 2019 1359-4311/ © 2019 Published by Elsevier Ltd.

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Nomenclature Acr Amc Aor cp Dh d Eu f Hmc havg Lenter Nu Nuavg Pentr Pmc Pout ΔP P0 PEF q qw1 qw2

qw3 qw,avg Re T Tin Tmax Tf Ts Tw,avg Tf,avg ucs,avg uin Ux Uy Uz Wmc

area of the core regions in the bottom [m2] area of the entrance [m2] area of the other regions in the bottom [m2] specific heat [J/(kg·K)] hydraulic diameter [m] micro-pin fin width [μm] Euler Number friction factor height of the microchannel [mm] average heat transfer coefficient [W/(m2·K)] entrance length [m] Nusselt number average Nusselt Number entrance pressure [Pa] the perimeter of the entrance [m] outlet pressure [Pa] total pressure drop [Pa] total pumping power [W] performance evaluation factor heat flux [W/m2] heat flux on the bottom of core regions [W/m2] heat flux on the bottom of surrounding regions [W/m2]

heat flux of the memory [W/m2] average heat flux of the bottom surface [W/m2] Reynolds number temperature [K] the fluid temperature at the inlet [K] maximum temperature of the chip surface [K] the temperature of the fluid near the wall [K] the temperature of the wall near the fluid [K] the average temperature of the chip surface [K] the average temperature of the fluid [K] the average velocity in the minimum cross-section [m/s] average inlet velocity [m/s] velocity component along the x-axis direction [m/s] velocity component along the y-axis direction [m/s] velocity component along the z-axis direction [m/s] width of the microchannel [mm]

Greek symbols λf λs μ ρ

thermal conductivity of fluid [W/(m·K)] thermal conductivity of solid phase [W/(m·K)] dynamic viscosity [Pa·s] fluid density [kg/m3]

transfer performance can be improved 2 times. It should be noted that the heat flux of the core regions can be more than 5 times that of the surrounding region [19,20]. However, a uniform heat flux distribution on the surface of 3D-IC chips is set in the previous researches, which is quite different from the actual situation [21]. By contrast, the difference of heat flux between the core and surrounding region was considered in some researches [22,23]. Unfortunately, a further attempt to enhance the heat transfer performance of the core region in 3D-IC chips by optimizing the microchannel structure has not been reported. In addition to the means mentioned above, arranging micro-pin fins in the microchannel is another effective method to improve the heat transfer performance of chips [24]. For instance, Alfieri et al. [25] proved that the Nu can be tripled by the vortex shedding which was induced by the addition of micro-pin fins. Moreover, Wan et al. [26] explored the effect of fin shape on the Nu, and the result indicated that the Nu of square pin fin array was higher than the circular pin fins, owing to the increase of fluid mixing. However, the appearance of the local hotspot was inevitable in chips, even on the surface with a uniform heat flux. To improve this problem, the clustered micro-pin fin was introduced to the hotspot area by many scholars [27,28]. For example, Ansari et al. [28] proved that the microchannel-pin fin hybrid heat sink was able to maintain a 30.6% lower temperature rise at the hotspot compared to the traditional one, and the increase of pumping power was only 11.7%. It should be noted that the Through Silicon Via (TSV) is one of the most advanced technologies for layer connection and signal transmission in 3D-IC. Specifically, in a TSV unit, the copper wire is located inside a micro-pin fin which made of silicon, just as shown in the SEM illustration of Fig. 1. Therefore, the micro-pin fin was

the resource management and algorithm optimization of the chips is an effective way to alleviate the overheat problem [5,6]. By contrast, to eradicate this problem the heat transfer performance of the chip in the 3D-IC must be strengthened. In 1981, Tuckerman and Pease [7] first proposed the concept of “microchannel heat sink”. The main idea is to add a micro-scale flow channel at the bottom of the microelectronic devices, and the heat is carried away by the fluid flowing through the microchannel. Since then, many scholars are engaged in the research about the combination of microchannel structure and 3D-IC. Generally, changing the working fluid and optimizing the channel structure are effective ways to enhance the heat transfer performance of microchannel heat sink [8–12]. For instance, Hassan et al. [13] explored the effect of air and microfluidics cooling on heat transfer performance of 3D stacked memory systems, and the results proved that the heat transfer performance of the chip was significantly improved by the microfluidic. Moreover, research of Serafy et al. [3] indicated that the heat transfer performance was improved by 2.3 times with the addition of microfluidic cooling and layout optimization. Brunschwiler et al. [14] suggested that among all the heat dissipation concepts, the interlayer cooling was the most popular way to match the number of chips in the stack to achieve extreme 3D integration. Therefore, to improve the heat transfer performance of chips, scholars have conducted research to optimize the microchannel structure between layers [15]. For example, Chen et al. [16] and Zhu et al. [17] optimized the liquid cooling network to reduce thermal gradient, and more than 80% of pumping power was saved. Moreover, the microchannel structure was added on the dual-side of the chip by Brunschwiler et al. [18], and the results indicated that the heat

Fig. 1. Schematic diagram of the 3D-IC package. (The illustration is an SEM image of the embedded TSVs). 2

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adopted to enhance the heat transfer performance by many scholars [29,30]. They found that a smaller TSV depth and larger TSV diameter were beneficial to improve the heat transfer performance. Moreover, the 3D-IC chips own more core regions in a narrower area which compares with the traditional chips, that is, it undergoes more serious hotspot problems. Up to now, the effect of micro-pin fin on the heat transfer performance of 3D-IC chips with multiple core regions has not been reported. The organization of this paper is as follows. In Section 2, based on the issues mentioned above, an interlayer microchannel model which has multicore with high power density is established. Then the physical properties of materials, governing equations, boundary conditions, model hypothesis and verification introduced in sequence. In Section 3, the effects of width and arrangement of the cuboid micro-pin fin on the heat transfer performance in the model are discussed in Sections 3.1 and 3.2, respectively. Then, the effects of arranging clustered micro-pin fin on the core regions and baffles on the surrounding regions on the maximum surface temperature of the core regions and pumping power are investigated in Section 3.3. After that, the effect of baffle arrangement on performance evaluation factor and pumping power is discussed in Section 3.4. Finally, the conclusion is summarized in Section 4. In addition, the main contributions of the present work is as follows. An in-line & staggered arrangement of micro-pin fin is benefit to achieve the multi-goals of heat transfer performance enhancement and pressure drop reduction. Moreover, adding the baffles on the surrounding region instead of clustering the micro-pin fins on the core regions is an effect way to reduce the maximum temperature of the chip surface. These results are expected to provide guidance for the design of 3D-IC interlayer microchannel.

Table 1 Parameters of the physical model (Unit: mm). Parameter

Value

Parameter

Value

Height of microchannel H1 Height of chips H2 Length of microchannel L1 Length of processor L2 Length of core L3 Distance of core regions L4 Length of baffle L5 Spacing of Micro-pin fins S1

0.2 0.1 8.0 7.0 2.0 1.0 0.23 0.2

Spacing of Micro-pin fins S2 Spacing of Micro-pin fins S3 Spacing of Micro-pin fins S4 Width of microchannel W1 Width of side wall W2 Width of core W3 Width of baffle W4 Width of baffle W5

0.375 0.15 0.15 10.0 0.2 3.0 0.8 1.0

and processor layer. The cooling deionized (DI) water flows between the memory and processor layers, and the 3D-IC interlayer microchannel model is shown in Fig. 2(a). Moreover, the clustered micro-pin fin and baffles would respectively arranged in the blue dotted line and blue solid line areas in Fig. 2(b), the specific schematic diagram is shown in Fig. 2(c) and (d) respectively. Eventually, based on the Intel's sixth generation microprocessor architecture SKYLAKE, four cores were uniformly set in the processor layer with an arrangement of 2 × 2. The performance and reliability of the chip were limited by overheat and temperature unevenness, owing to the high heat flux of processor (core region) [31]. Thereby, improving the heat transfer performance of the processor in the 3D-IC by optimizing the interlayer microchannel structure is the main purpose of the present work. For simplicity, the wiring layer and TSV are not included in the model. Moreover, half of the 3D-IC package is modelled due to its symmetry, as shown in Fig. 2(a). Specifically, the solid material and coolant fluid used in this model are silicon and deionized (DI) water, respectively. The structure parameters of the computational domain are shown in Table 1. The specific heat, density and thermal conductivity of silicon are 700 J/(kg·K), 2329 kg/m3 and 130 W/(m·K), respectively. In addition, the physical properties of water in this work are considered to vary with temperature.

2. Numerical simulation 2.1. Physical model In the present work, a three-dimensional computational model of 3D-IC interlayer microchannel structure was developed. The schematic diagram of the 3D-IC package is shown in Fig. 1. The package structure of the 3D-IC consists of the printed circuit board (PCB), package substrate, interposer, processor and memory. Meanwhile, a wiring layer with a thickness of 5–10 μm is set in the lower portion of the memory

2.2. Governing equations The flow condition in the computational domain is based on the assumed as laminar, incompressible and steady [32,33]. Moreover, a conjugate heat transfer model is adopted to investigate the flow and

Fig. 2. (a) Overview of the microchannel, (b) Profile of the microchannel, (c) Schematic diagram of clustered micro-pin fins on core regions, (d) Schematic diagram of the baffles on the surrounding region. 3

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heat transfer characteristics of fluid under a steady state. The governing equations can be expressed as: Conservation equation of mass:

∇ ·(ρU ) = 0

2.4. Analysis The velocity, temperature and pressure were calculated in the numerical simulations. At the inlet of the microchannel heat sink, the Re can be figured out by:

(1)

Conservation equation of momentum:

(U ·∇) ρU = −∇P + μ∇2 U

Re =

(2)

ρcp U ·∇T = λ f

(3)

Dh =

where ρ, μ and cp are the density, dynamic viscosity, specific heat at a constant pressure of the fluid, λf is the thermal conductivity of the fluid, U is the velocity and P represents the pressure. Moreover, the momentum flux is affected by the flow acceleration and the increase of wall shear stress. Therefore, to accurately calculate the pressure drop of the microchannel heat sink, the inlet effect of the laminar flow must be taken into account, and the governing equation can be expressed as:

Lentr ∇ ·[−P l + μ (∇U + (∇U )T )] = −Pentr n

4Amc 2(Wmc Hmc ) = Pmc (Wmc + Hmc )

(10)

Wmc = W1 - 2W2

(11)

Hmc = H1

(12)

where Amc and Pmc are the area and perimeter of the entrance, respectively, Wmc and Hmc are the width and height of the microchannel, respectively. The average Nusselt number (Nu) is used to reflect the heat transfer performance of the microchannel heat sink, and can be expressed as:

(4)

where Lentr and Pentr is the entrance length and pressure, respectively. In Eq. (4) the Lentr should be significantly greater than 0.06Re·Dh [34], where Re is the Reynolds number and Dh is the inlet length scale (hydraulic diameter). In the present model, to ensure an adequate entrance length the Lentr is set as 0.1 m.

Nuavg =

2.3. Boundary conditions

havg D h λf

(13)

qw,avg

havg =

(Tw,avg − Tf,avg )

(14)

where Tw,avg and Tf,avg are the average temperature of the chip surface and fluid, respectively, havg is the average heat transfer coefficient of the fluid, qw,avg is the average heat flux density of the wall which can be defined as:

(1) Inlet boundary (y = 0) The inlet Reynolds number is set to 200–1000 and fluid temperature is 293 K.

Uy = u in , Ux = Uz = 0, T = Tin

(9)

where ρ is the fluid density, Dh is the hydraulic diameter of the heat sink, μ is the dynamic viscosity. Moreover, the Dh is defined as:

Conservation equation of energy:

∇2 T

ρuD h μf

(5)

qw,avg =

(2) Outlet boundary (y = L1)

qw1 Acr + qw2 Aor (Acr + A or )

(15)

The outlet pressure Pout of the microchannel heat sink is set as the standard atmospheric pressure.

where the Acr and Aor are the area of the core regions and surrounding region respectively. The Euler number (Eu) is usually used to reflect the relative magnitude of momentum loss rate in the flow process, and can be expressed as:

(3) Solid-fluid interface

Eu =

The temperature at the fluid-solid coupling interface is considered as continuous and the velocity does not slip.

U = 0,

Tf = Ts,

−λ s ∇Ts

n

= −λ f ∇Tf

n

ΔP 2 ρucs,avg

(16)

where the ΔP is the total pressure drop of the microchannel heat sink, ucs,avg is the average velocity in the minimum cross-section of micro-pin fin. Moreover, the total pumping power (P0) and friction factor (f) are the main parameters to reflect the hydraulic performance of the microchannel heat sink, and it can be expressed as:

(6)

(4) Non-uniform heat flux at the boundary (z = 0, z = H1 + 2H2) The heat flux on the bottom of core regions (qw1), surrounding region (qw2)and memory region (qw3) are set as 5 × 106, 1 × 106 and 1 × 105 W/m2 respectively, as referred from Ref. [21,35]

P0 = uAmc ΔP

(17)

1 D h ΔP 2 L1 ρu2

(18)

(5) Symmetrical boundary (x = W1)

Furthermore, refer to the related research of microchannel heat sink design [36], the performance evaluation factor (PEF) is used to comprehensive reflect the hydraulic and heat transfer performance of the microchannel heat sink, and it can be expressed as:

f=

This boundary condition is similar to a thermal insulation condition, and it means that there is no heat flux across the boundary.

∂Ts =0 ∂z

PEF =

(7)

The other walls of the model are adiabatic: n

=0

(19)

where Nub and Nut are the Nusselt numbers of interlayer microchannel heat sink with single/double layer baffles and without baffles, respectively; fb and ft are the friction factors of the interlayer microchannel heat sink with single/double layer baffles and without baffles, respectively.

(6) Other outer wall boundaries

λ s ∇Ts

Nub Nut (fb ft )1 3

(8) 4

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T = 276.2 K at the position of x = 0 mm, and it increases to a peak value (T = 324.2 K) at x = 2.5 mm. Then the T drops to 318.2 K at x = 3.5 mm, after that, it reaches another peak value (T = 332.3 K) at x = 5.5 mm. Eventually, the T gradually decreases to 315.2 K at the position of x = 7 mm. It should be noted that the surface temperature decreases with an increase in the d, whereas, the changing rule of the T along the flow direction is independent on it. For instance, the peak value of T at the core region 1 and 2 respectively decreases 10.7 and 10.2 K with the d increases from 75 to 150 μm. To explore the reason of temperature decrease, the flow field diagram of the microchannel when d = 75 μm is shown in Fig. 5(a), and partially enlarged view of the flow field in the core region 1 when d = 100–150 μm is shown in Fig. 5(b)-(d). It indicates that the flow velocity between the micro-pin fins increases with an increase in the d. Meanwhile, the average flow velocity of the stagnation regions (the tail region of the micro-pin fins) increases from 0.5 to 1.2 m/s. That means the heat is taken away more quickly, which is beneficial to heat transfer. Moreover, average flow velocity between the micro-pin fins is much higher than the stagnation regions (without micro-pin fins), leading to the presentation of striated temperature pictures on the core regions. However, the enhancement of heat transfer performance always comes at a price. Fig. 6 shows the effect of d on the pressure drop (ΔP). It illustrates that the ΔP increases rapidly with enlarging the d. For instance, the ΔP = 44 kPa at d = 75 μm, and it respectively increases 2.5, 5.7 and 19.7 times with the d increases from 100 to 150 μm. Although silicon microchannel can withstand this level of pressure drop [39,40], it also leads to a remarkable increase in flow resistance. In conclusion, increasing the d is a not effective way to enhance the heat transfer performance, owing to the unbearable increase of pump power. Therefore, it is necessary to explore some enhancement methods of heat transfer performance with an acceptable pressure drop.

2.5. Model validation In this paper, the COMSOL Multiphysics is adopted to build the 3DIC interlayer microchannel heat sink model, which allows running a coupled thermo-fluidic FEM simulation. To improve convergence speed and computing accuracy, the free tetrahedral mesh was adopted. Moreover, based on the related research on micro-pin fins in the microchannel [37], the dimensionless number Nu and Eu under various meshes (3.4, 6.3, 9.7 and 13.1 million) were used to verify grid independence. Specifically, the computing accuracy of Nu and Eu increases 0.5% and 0.7% respectively with the mesh number increases from 9.7 to 13.1 million. Therefore, to meet the demand of convergence speed and computing accuracy, the model with a mesh number of 9.7 million was adopted in the present work. Prior to the calculation, an experimental case of a single-phase micro-channel heat sink provided by Mudawar et al. [38] was selected to validate the model on the heat transfer process. The comparison between simulation and experimental results is shown in Fig. 3, which illustrates the evolution of chip bottom surface temperature (T) and ΔP under various Re respectively. It can be seen that the simulation results agree well with the experimental data, and the maximum error of T and ΔP are 3.5% and 4.9% respectively.

3. Results and discussion 3.1. Effect of micro-pin fin width on the heat transfer performance To investigate the effect of micro-pin fin width (d) on the heat transfer performance, the micro-pin fin which is typically in-line arranged with a length of 0.23 mm and a width of 75, 100, 125 and 150 μm were introduced in the model, and the Re of inlet is 600. The temperature diagram of the bottom surface (d = 75 μm) is shown in Fig. 4(a). It shows that the temperature of the core regions is much higher than the surrounding region, and the temperature of the core 1 region is lower than the core 2 region. Moreover, the temperature at the bottom where no micro-pin fins are attached is significantly higher, which lead to the appearance of a streak temperature image, as shown in Fig. 4(a). The relatively large aspect ratio (3.07:1) and spacing of the cuboid micro-pin fin cause this phenomenon (this phenomenon will disappear in the core area when the micro-pin fins are clustered, as shown in Fig. 10(b)). Moreover the thinner thickness of chip enlarge the effect of the temperature distribution uneven. To furtherly explore the effect of d on heat transfer performance, the surface temperature distribution on the centerline position of the model (T) is obtained and shown in Fig. 4(b). It proves that two peaks present on the surface temperature along the flow direction, which attributes to the higher heat flux of the core regions. For the case of d = 75 μm, the

3.2. Effect of micro-pin fin arrangement on the heat transfer performance In this section, the micro-pin fin with a length of 0.23 mm and a width of 75 μm is adopted to explore the influence of arrangement (inline, staggered and in-line & staggered) on the heat transfer performance. The in-line & staggered arrangement means that the micro-pin fins on the core regions are staggered arranged, and the fins are in-line on the other region. Fig. 7 displays the surface temperature of the chip at the centerline position (T) with various arrangements. Similarly, there are two peaks in the surface temperature, due to the higher heat flux density in the core regions. By contrast, the maximum temperature of the core region 1 and 2 under the staggered arrangement drops 5.4 and 4.7 K respectively. Moreover, the maximum temperature under the in-line & staggered arrangement is nearly the same with the staggered arrangement. That is, the staggered and in-line & staggered

Fig. 3. Comparisons between numerical simulation and experimental result. 5

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Fig. 4. (a) Temperature distribution of chip, (b) Surface temperature of the chip at the centerline position with various d.

Fig. 5. (a) Streamline diagram of the microchannel with d = 75 μm, (b–d) local streamline diagram of the core region 1 with d = 100 μm, 125 μm and 150 μm, respectively.

Fig. 7. Surface temperature distribution of the chip at the centerline position under various arrangements.

Fig. 6. Effect of d on the total pressure drop of the microchannel heat sink.

6

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arrangements have the same heat transfer performance. The flow field diagram of the microchannel with various arrangements are obtained and shown in Fig. 8. It indicates that in core region 1 the average flow velocity between the micro-pin fins under the staggered arrangement is 3.25 m/s, which is 7% lower than the case of in-line arrangement. By contrast, the average flow velocity in the stagnation regions of the staggered arrangement is 1.1 m/s, which is 2.2 times the in-line arrangement. Therefore, the staggered arrangement is beneficial to enhance the uniformity of the flow field and then improve the heat transfer performance. Fig. 9 shows the pressure drop (ΔP) of the three arrangements. It indicates that the ΔP of the staggered arrangement is 2.35 times that of in-line arrangement. By contrast, the ΔP under the in-line & staggered arrangement is 85 kPa, which is 20% lower than the staggered arrangement. It should be noted that the inline & staggered arrangement (d = 75 μm) owns a better heat transfer performance and a lower pressure drop which compares with the in-line arrangement (d = 100 μm). Therefore, the in-line & staggered arrangement is an effective way to achieve the multi-goals of heat dissipation enhancement and pump power reduction.

Fig. 9. Total pressure drop of the microchannel with the different arrangement.

5.1 m/s, as illustrated in Fig. 10(d). Thereby, clustered micro-pin fins will obstruct the fluid flow, and then worsens the heat transfer performance of core regions. Therefore, improving the flow rate of the core regions maybe an effective method to achieve the multi-goals of low pressure drop and preferable heat transfer performance. Base on this, the design of arranging the baffles on both sides of the core regions is proposed. Meanwhile, the baffles are also introduced to a case without clustered micro-pin fins (in-line & staggered arrangement). The flow field diagrams of the cases with baffles are shown in Fig. 11(a) and (b), which indicates that the fluid is forced to flow to the core regions by the baffles. For the model without local cluster, the average flow velocity between the flow channels in the core region can be increased from 3.4 to 4.7 m/s by setting baffles. For the model with local clustered, arranging baffles can also increase the average flow velocity between the flow channels of the core region from 3.0 to 4.2 m/s. So the heat transfer performance of the core region can naturally be enhanced. Moreover, as shown in Fig. 11(c) and (d), the average flow velocity between the flow channels in the first half of the core region is 4.9 m/s,

3.3. Effects of clustered micro-pin fins and baffles on the heat transfer performance To further enhance the heat transfer performance of the model with in-line & staggered arrangement, the micro-pin fins on the core regions are clustered and the baffles are introduced in the surrounding region. The diameter of the clustered micro-pin fin is equal to d, and the porosity of core regions decrease 6% which is defined as the ratio between the fluid volume and the entire volume of core regions. Fig. 10(a) and (b) shows the surface temperature distributions of the cases without and with clustered micro-pin fins, correspondingly, the flow field diagram of the core region 1 is shown in Fig. 10(c) and (d). One can see that the clustered micro-pin fins deteriorate the heat transfer performance of core regions, owing to the increase of flow resistance. To be specific, the average flow velocity in the local clustered region decreases to 3.0 m/s. By contrast, the high-speed flow regions are formed on the surrounding region and the average flow velocity can reach

Fig. 8. Streamline diagram of the microchannel with the different arrangement (a) in-line, (b) staggered, (c) in-line & staggered, (d–e) local streamline diagram of the core region 1 with the in-line and staggered arrangement, respectively. 7

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Fig. 10. (a) Temperature distribution of microchannel without local clustered, (b) Temperature distribution of microchannel with local clustered, (c) Streamline diagram of microchannel without local clustered, (d) Streamline diagram of the microchannel with local clustered.

transfer performance of the microchannel heat sink. Fig. 12 proves that the baffles have more significant impacts on the core region 2, which inspires us to remove the baffles near the core region 1. Fig. 13 shows the temperature distribution and streamline diagram of the microchannel with various baffle arrangements (double-layer baffle and single-layer baffle, Re = 600). It shows that the case with single-layer baffle has a higher temperature in the core regions and lower flow velocity in the core region 1. Moreover, the maximum temperature in the core regions (Tmax) and the total pressure drop of microchannel heat sink (ΔP) under various Re were obtained and shown in Fig. 14(a). It proves that the Tmax of the case with double-layer baffle decreases from 353.5 to 315.8 K with the Re increases from 200 to 1000, correspondingly, the ΔP increases from 19 to 384 kPa. By contrast, the Tmax increases about 2 K on average and the ΔP drops about 18% on average when the baffles near the core region 1 are removed. Furthermore, the average Nusselt number of the entire region (Nuavg) and the pumping power (P0) were calculated by Eq. (13) and (17) respectively and shown in Fig. 14(b) to reflect the heat dissipation and hydraulic performance. It proves that the Nuavg and P0 increase with an increase in Re. It should be noted that the Nuavg of the case with double-layer baffle is 3.2% higher than that of the case with single-layer baffle. By contrast, the removal of baffles near the core region 1 reduces the P0 by 24%. That means the case with double-layer baffle and single-layer baffle have the advantages of good heat transfer performance and low pumping power, respectively. Thereby, the performance evaluation factor (PEF) is

which is significantly higher than the 3.7 m/s in the second half. This is because part of the fluid flows away from both sides of the core regions. The local maximum flow velocity around the baffles even reaches to 10.0 m/s. To evaluate the heat transfer performance and pressure drop of the four cases, the surface temperature distribution at the centerline position and ΔP are shown in Fig. 12(a) and (b). It proves that the maximum temperature of core 1 and 2 regions increases 1.3 and 3.2 K, respectively, once the micro-pin fins at the core regions are clustered. Correspondingly, the ΔP increases from 85 to 98 kPa. By contrast, the maximum temperature of core 1 and 2 regions decreases 3.4 and 3.8 K, respectively, when the baffles are introduced to the surrounding region. As a price, the ΔP presents a significant increase. It should be noted that the ΔP drops from 204 to 150 kPa when the clustered micro-pin fins are replaced. In conclusion, arranging the baffles on the surrounding region instead of clustering the micro-pin fins of the core regions is an effective way to enhance the heat transfer performance of the 3D-IC. However, considering the pump power, it is necessary to take some measures to reduce the ΔP as much as possible while ensuring the heat transfer performance. 3.4. Arranging optimization of the baffles in the microchannel heat sink In this section, the optimization of baffles arrangement on the surrounding region is carried out to balance the hydraulic and heat

Fig. 11. (a) Streamline diagram of the microchannel with baffles, (b) Streamline diagram of microchannel without baffles, (c) Partially enlarged the view of the clustered region, (d) Arrow flow field diagram of the partially enlarged region. 8

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Fig. 12. Surface temperature at the centerline position (a) and total pressure drop of the models (b).

Fig. 13. (a) Temperature distribution of microchannel with double-layer baffle, (b) Temperature distribution of microchannel with single-layer baffle, (c) Streamline diagram of the microchannel with double-layer baffle, (d) Streamline diagram of the microchannel with the single-layer baffle.

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Fig. 14. (a) Effect of baffle arrangement on the Tmax and ΔP, (b) Effect of baffle arrangement on the Nuavg and P0, (c) Effect of baffle arrangement on the relative PEF.

line & staggered arrangement is 20% lower than that of staggered arrangement. (3) The clustered micro-pin fins on the core regions deteriorate the heat transfer performance of chips, owing to the increase of flow resistance. By contrast, the Tmax further reduces 3.8 K when the baffles are used in the surrounding region. (4) The in-line & staggered micro-pin fins on the core regions and single-layer baffles on the surrounding region are the optimal structure to balance the pumping power and heat transfer performance of the microchannel in this model. After structural optimization the Tmax decreases from 332.3 K to 324.3 K, correspondingly, the P0 increases 148%.

adopted to reflect the comprehensive performance of the cases, and the case without baffle is adopted as a basis of comparison. That is, the relative performance evaluation factor is the ratio between the case with double/single-layer baffle and the comparison one. Based on the eq. (19), the relative PEF of the two cases were figured out and displayed in Fig. 14(c). It illustrates that the relative PEF increases gradually with an increase in the Re. However, the PEF of the case with double-layer baffle is less than 1.0, that is, the comprehensive performance is worse than the comparison one. By contrast, the PEF of the case with single-layer baffle is ranging from 1.02 to 1.04. In conclusion, the case with single-layer baffle is an optimal one to balance the pumping power and heat transfer performance of the microchannel heat sink. Moreover, for the model with Re = 600 and d = 75 μm, the Tmax decreases from 332.3 K (in-line, without baffles) to 324.3 K (inline & staggered, with single-layer baffle) by optimizing the structure of microchannel heat sink, and the increase of P0 is 148%.

CRediT authorship contribution statement Bin Ding: Writing - original draft, Writing - review & editing, Funding acquisition. Zhi-Hao Zhang: Writing - original draft, Methodology, Validation. Liang Gong: Funding acquisition, Conceptualization, Project administration. Ming-Hai Xu: Investigation, Supervision. Zhao-Qin Huang: Formal analysis.

4. Conclusions In the present work, a 3D-IC model with multicores and high power density is established, which designed to study thermal management of the core regions of chips. The effects of micro-pin fin width and arrangement, clustered micro-pin fins on the core regions and baffles on the surrounding region are discussed on the maximum temperature in the core regions (Tmax) and the total pressure drop of microchannel heat sink (ΔP). According to the results and discussions based on the model established in this paper, the following conclusions are derived:

Declaration of Competing Interest We declare that we have no financial and personal relationships with other people or organizations that can inappropriately influence our work, there is no professional or other personal interest of any nature or kind in any product, service and/or company that could be construed as influencing the position presented in, or the review of, the manuscript entitled.

(1) Two peaks present on the surface temperature along the flow direction, which attributes to the higher heat flux of the core regions. Moreover, the T decreases with an increase in the d, whereas, the increase of ΔP is unbearable. (2) For the model with d = 75 μm and Re = 600, the Tmax decreases 4.7 K when the staggered or in-line & staggered arrangements are introduced to the micro-channel heat sink. Moreover, the ΔP of in-

Acknowledgements The authors gratefully acknowledge the financial support from the National Natural Science Foundation of China (No. 51676208 and No. 51906257), the Major Program of the Nature Science Foundation of 10

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Shandong Province (No. ZR2019ZD11), the Fundamental Research Funds for the Central Universities (No. 18CX07012A and No. 19CX05002A) and the Chinese Postdoctoral Science Foundation (No. 2018M642724).

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Appendix A. Supplementary material

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Supplementary data to this article can be found online at https:// doi.org/10.1016/j.applthermaleng.2019.114832. [22]

References [23]

[1] E. Beyne, The rise of the 3rd dimension for system intergration, in: Interconnect Technology Conference, 2006 International, IEEE, 2006, pp. 1–5. [2] S. Cheramy, J. Charbonnier, D. Henry, A. Astier, P. Chausse, M. Neyret, C. BrunetManquat, S. Verrun, N. Sillon, L. Bonnot, 3D integration process flow for set-top box application: description of technology and electrical results, in: Microelectronics and Packaging Conference, 2009. EMPC 2009. European, IEEE, 2009, pp. 1–6. [3] C. Serafy, A. Bar-Cohen, A. Srivastava, D. Yeung, Unlocking the true potential of 3-D CPUs with microfluidic cooling, IEEE Trans. Very Large Scale Integr. VLSI Syst. 24 (2016) 1515–1523. [4] M. Pedram, S. Nazarian, Thermal modeling, analysis, and management in VLSI circuits: Principles and methods, Proc. IEEE 94 (2006) 1487–1501. [5] B. Li, X. Wang, A.K. Singh, T. Mak, On runtime communication-and thermal-aware application mapping in 3D NoC, Proceedings of the Eleventh IEEE/ACM International Symposium on Networks-on-Chip, 2017, p. 16. [6] M. Cox, A.K. Singh, A. Kumar, H. Corporaal, Thermal-aware mapping of streaming applications on 3D multi-processor systems, in: The 11th IEEE Symposium on Embedded Systems for Real-time Multimedia, IEEE, 2013, pp. 11–20. [7] D.B. Tuckerman, R.F.W. Pease, High-performance heat sinking for VLSI, IEEE Electron Device Lett. 2 (1981) 126–129. [8] L. Gong, Y.P. Xu, B. Ding, Z.-H. Zhang, Z.Q. Huang, Thermal management and structural parameters optimization of MCM-BGA 3D package model, Int. J. Therm. Sci. 147 (2020) 106120. [9] X. Peng, C. Ma, A. Garg, N. Bao, X. Liao, Thermal performance investigation of an air-cooled lithium-ion battery pack considering the inconsistency of battery cells, Appl. Therm. Eng. 153 (2019) 596–603. [10] W. Li, M. Xiao, X. Peng, A. Garg, L. Gao, A surrogate thermal modeling and parametric optimization of battery pack with air cooling for EVs, Appl. Therm. Eng. 147 (2019) 90–100. [11] X.Y. Duan, F.B. Li, B. Ding, L. Gong, M.H. Xu, Heat transfer characteristics and field synergy analysis of gas-liquid two-phase flow in micro-channels, J. Therm. Anal. Calorim. (2019) 1–12. [12] Q. Xu, J. Feng, L. Liu, J. Zhou, G. Ye, C. Chang, Analysis of mechanical-fluidthermal performance of heat pipeline system with structural deformation effects, Int. J. Heat Mass Transf. 128 (2019) 12–23. [13] S.M. Hassan, S. Yalamanchili, Understanding the impact of air and microfluidics cooling on performance of 3d stacked memory systems, Proceedings of the Second International Symposium on Memory Systems, 2016, pp. 387–394. [14] T. Brunschwiler, A. Sridhar, C.L. Ong, G. Schlottig, Benchmarking study on the thermal management landscape for three-dimensional integrated circuits: from back-side to volumetric heat removal, J. Electron. Packag. 138 (2016) 010911. [15] L. Zheng, Y. Zhang, G. Huang, M.S. Bakir, Novel electrical and fluidic microbumps for silicon interposer and 3D-ICs, IEEE Trans. Compon. Packag. Manuf. Technol. 4 (2014) 777–785. [16] G. Chen, J. Kuang, Z. Zeng, H. Zhang, E.F. Young, B. Yu, Minimizing thermal gradient and pumping power in 3d ic liquid cooling network design, Proceedings of the 54th Annual Design Automation Conference 2017, 2017, p. 70. [17] H. Zhu, H. Feng, Z. Hao, D.Z. Pan, D. Zhou, Z. Xuan, Interlayer Cooling Network Design for High-Performance 3D-ICs Using Channel Patterning and Pruning, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, PP (2017) 1–1. [18] T. Brunschwiler, W. Steller, H. Oppermann, J. Kleff, S. Robertson, R. Mroßko, J. Keller, G. Schlottig, Dual-side heat removal by silicon cold plate and interposer with

[24]

[25]

[26]

[27]

[28] [29]

[30] [31]

[32]

[33]

[34] [35]

[36]

[37]

[38]

[39]

[40]

11

embedded fluid channels, in: 2018 17th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm), IEEE, 2018, pp. 331–339. I.A. Ghani, N.A.C. Sidik, N. Kamaruzaman, Hydrothermal performance of microchannel heat sink: The effect of channel design, Int. J. Heat Mass Transf. 107 (2017) 21–44. A. Shakouri, Y. Zhang, On-chip solid-state cooling for integrated circuits using thinfilm microrefrigerators, IEEE Trans. Compon. Packag. Technol. 28 (2005) 65–69. S. Li, J.H. Ahn, R.D. Strong, J.B. Brockman, D.M. Tullsen, N.P. Jouppi, McPAT: an integrated power, area, and timing modeling framework for multicore and manycore architectures, Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture, 2009, pp. 469–480. P. Zając, C. Maj, A. Napieralski, Peak temperature reduction by optimizing power density distribution in 3D ICs with microchannel cooling, Microelectron. Reliab. 79 (2017) 488–498. M.M. Sabry, A.K. Coskun, D. Atienza, T.Š. Rosing, T. Brunschwiler, Energy-efficient multiobjective thermal control for liquid-cooled 3-D stacked architectures, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30 (2011) 1883–1896. A. Mohammadi, A. Koşar, Review on heat and fluid flow in micro pin fin heat sinks under single-phase and two-phase flow conditions, Nanoscale Microscale Thermophys. Eng. 22 (2018) 153–197. F. Alfieri, M.K. Tiwari, A. Renfer, T. Brunschwiler, B. Michel, D. Poulikakos, Computational modeling of vortex shedding in water cooling of 3D integrated electronics, Int. J. Heat Fluid Flow 44 (2013) 745–755. Z. Wan, Y. Joshi, Pressure drop and heat transfer characteristics of pin fin enhanced microgaps in single phase microfluidic cooling, Int. J. Heat Mass Transf. 115 (2017) 115–126. T.E. Sarvey, Y. Hu, C.E. Green, P.A. Kottke, D.C. Woodrum, Y.K. Joshi, A.G. Fedorov, S.K. Sitaraman, M.S. Bakir, Integrated Circuit Cooling Using Heterogeneous Micropin-Fin Arrays for Nonuniform Power Maps, IEEE Trans. Compon. Packag. Manuf. Technol. 7 (2017) 1465–1475. D. Ansari, K.-Y. Kim, Hotspot thermal management using a microchannel-pinfin hybrid heat sink, Int. J. Therm. Sci. 134 (2018) 27–39. T.E. Sarvey, Y. Zhang, Y. Zhang, H. Oh, M.S. Bakir, Thermal and electrical effects of staggered micropin-fin dimensions for cooling of 3D microsystems, in: Fourteenth Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm), IEEE, 2014, pp. 205–212. M. Park, S. Kim, S.E. Kim, Evaluation of Si liquid cooling structure with microchannel and TSV for 3D application, Microsyst. Technol. 23 (2017) 2609–2614. K.A. Whisnant, K.C. Gross, Static and dynamic temperature-aware scheduling for multiprocessor SoCs, IEEE Trans. Very Large Scale Integr. VLSI Syst. 16 (2008) 1127–1140. M. Vilarrubi, S. Riera, M. Ibañez, M. Omri, G. Laguna, L. Frechette, J. Barrau, Experimental and numerical study of micro-pin-fin heat sinks with variable density for increased temperature uniformity, Int. J. Therm. Sci. 132 (2018) 424–434. S. Feng, Y. Yan, H. Li, Z. Yang, L. Li, L. Zhang, Theoretical and numerical investigation of embedded microfluidic thermal management using gradient distribution micro pin fin arrays, Appl. Therm. Eng. 153 (2019) 748–760. F.M. White, Fluid Mechanics, McGraw Hill, 2011. Y. Zhang, Y. Zhang, M.S. Bakir, Thermal design and constraints for heterogeneous integrated chip stacks and isolation technology using air gap and thermal bridge, IEEE Trans. Compon. Packag. Manuf. Technol. 4 (2014) 1914–1924. L. Gong, Y. Li, Z. Bai, M. Xu, Thermal performance of micro-channel heat sink with metallic porous/solid compound fin design, Appl. Therm. Eng. 137 (2018) 288–295. H.R. Seyf, M. Feizbakhshi, Computational analysis of nanofluid effects on convective heat transfer enhancement of micro-pin-fin heat sinks, Int. J. Therm. Sci. 58 (2012) 168–179. W. Qu, I. Mudawar, Experimental and numerical study of pressure drop and heat transfer in a single-phase micro-channel heat sink, Int. J. Heat Mass Transf. 45 (2002) 2549–2565. T. Gothsch, C. Schilcher, C. Richter, S. Beinert, A. Dietzel, S. Büttgenbach, A. Kwade, High-pressure microfluidic systems (HPMS): flow and cavitation measurements in supported silicon microsystems, Microfluid. Nanofluid. 18 (2015) 121–130. C. Mishra, Y. Peles, Flow visualization of cavitating flows through a rectangular slot micro-orifice ingrained in a microchannel, Phys. Fluids 17 (2005) 113602.