A planning and scheduling model for onsertion in printed circuit board assembly

European Journal of Operational Research 183 (2007) 909–925 www.elsevier.com/locate/ejor

O.R. Applications

A planning and scheduling model for onsertion in printed circuit board assembly J. Ashayeri a, W. Selen a

b,*

Department of Econometrics and Operations Research, Tilburg University, P.O. Box 90153, 5000 LE Tilburg, The Netherlands b Institute for Logistics and Supply Chain Management, Victorˆia University, Melbourne VIC 8001, Australia Received 17 January 2005; accepted 1 November 2006 Available online 18 December 2006

Abstract A planning and scheduling model is developed for the onsertion-phase in printed circuit board (PCB) assembly. PCBs are manufactured by machines that mount components, such as chips, on a PCB. On an onsertor machine, a certain number of component types can be stored. These components are subsequently used for the production of a certain PCB batch type. This research develops a production planning and scheduling formulation to determine the component–machine allocations, as well as a PCB sequence. Two strategies are proposed; one focusing on minimal number of changeovers (C-strategy), and the other on minimal process time (P-strategy). Both strategies were validated in a pilot study with real company data, with encouraging results for potential implementation.  2006 Elsevier B.V. All rights reserved. Keywords: Production; Scheduling; Sequencing; Printed circuit boards

1. Introduction The production process of printed circuit boards (PCBs) can be split into three phases: preparation, onsertion, and insertion. After these steps, the PCBs may be assembled into a product. Preparation consists of pretreating empty boards and some of the components mounted on the PCB, including labeling of boards and some programming. Onsertion takes place in the SMT (Surface Mounting Technology)-area. First, paste is placed on onsertion positions. Then the SMDs (Surface Mounted Devices) are put on the PCB sequentially by onsertion machines on a SMT line, referred to as the onsertion line. On a typical SMT line, onsertion machines vary by type (one may be a high-speed component shooter, and another a fine-pitch/large component placer). When all components have been placed, the PCB is transported to an ultraviolet or infrared oven. This oven heats the PCBs so that the components are soldered to the PCB (the paste contains tin).

*

Corresponding author. E-mail addresses: [email protected] (J. Ashayeri), [email protected] (W. Selen).

0377-2217/$ - see front matter  2006 Elsevier B.V. All rights reserved. doi:10.1016/j.ejor.2006.11.002

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The final production phase may include insertion, which involves placement by ‘‘trough hole’’-technology. This study will focus on the onsertion phase of PCB-assembly. In PCB assembly, products are generally processed in batches. Growing product diversity makes more changeovers necessary, during which time no production can take place. This can lead to unacceptable efficiency losses. As such, development of sophisticated planning and scheduling routines is required for ongoing efficiency improvement. In this paper, a planning and scheduling model is formulated and tested for the onsertion line within an electronics manufacturer in The Netherlands. The remainder of the paper is organized as follows. Section 2 explains the onsertion production process in greater detail. Section 3 reviews the relevant literature to PCB manufacturing. Section 4 describes the problem in more detail in terms of the main sub-problems of sequencing and allocating jobs, as well as describing the overall logic of the two proposed computational strategies, referred to as the C- and P-strategy, respectively. Section 5 details the mathematical formulation of the sequencing and allocation sub-problems for the onsertion-process. Section 6 describes the validation of both strategies, using small real life data, which is followed by conclusions in Section 7. 2. The onsertion production process The onsertion machine mechanically picks up components from so-called ‘‘feeders’’ which have been placed on the machine. These feeders are put into ‘‘feeder slots’’, which are on a ‘‘feeder bank’’ (a linear or carousel shaped device). A feeder bank has a fixed number of slots. Some feeders need more than one slot. Each machine type has its own set of feeders. In principle, these feeders cannot be exchanged among other types of machines. However, some machines allow for the sharing of certain feeders. An onsertor has one or more placing heads. A placing head (or ‘‘pick-and-place device’’) contains one or more ‘‘nozzles’’. The nozzle is the actual device that picks and places the components. For different components, different nozzles may have to be employed by the head. The moving parts of the onsertion machine may be the feeder bank, the placing head, and the ‘‘assembly locator’’ (the device that holds the PCB). An example of an onsertor is shown in Fig. 1, which shows a moving feeder bank and assembly locator, with a fixed placing head. The process of placing a component on a board involves [1] (1) (2) (3) (4) (5)

Positioning (of feeder and/or head) for pick-up of component from feeder; Pickup of component; Transport of component from feeder to board; Positioning of component for placement; and Placement of component on board.

Three sorts of feeders are available: stick feeders, tape feeders, and trays. In stick feeders, only sticks (or ‘‘tubes’’) can be used. Those sticks contain components of a certain type. In tape feeders, only reels can be

Placing Head

Feeder bank

PCBs

Assembly Locator

Fig. 1. An onsertor.

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placed. A reel is in fact a tape with components of a certain type on it. In a tray, a set of components is placed next to each other. These components are picked up from the trays by a mechanical device. Generally small pitch (high precision) components are put on trays. The packaging form of a component determines the sort of feeder to be used. The dimensions of the sticks and reels determine the type of feeder and the corresponding machine that supports these dimensions. Relevant issues with respect to the onsertion process are production time and quality. Total production time is determined by changeover time and process time, which in turn consists of assembly time, machine idle time, and between-machine transport time. Note that changeover time is an inter-batch factor, whereas assembly time, idle time and transport time are intra-batch factors. Because of the automation involved, transport time is constant and not considered in any further analysis. Aside from the time aspect of the number of feeder changes, there is also a quality concern. Each time a changeover occurs, there is the possibility of a mistake. When the wrong component is placed, or a feeder is placed in the wrong position, the wrong components will be placed on the PCB, or they will be placed in the wrong positions. This means that these components will have to be removed again. In addition, these (possibly expensive) components may be lost. As such, an increasing number of feeder changes may result in increased quality costs and a decline in reliability. While it is important to rapidly process orders, maintaining a fixed setup for all PCB loads in order to avoid changeovers, is very expensive, since more hardware (onsertor machines and feeders) are required. Also, fixed setups generally do not perform very well in relation to per PCB process time, since a fixed setup cannot be optimal for all PCB types at the same time. In the electronics manufacturer under study, the onsertion process is supported by a variety of software systems. There is no unique process for determining machine setups. The process of determining a ‘‘good’’ product sequence is currently not formalized. The production floor manager has conflicting goals of minimizing throughput time (i.e. production time), while also trying to minimize the number of feeder changeovers. The problem then consists of determining setups for each PCB-type, and a sequence of PCB batches. The setups consist of an assignment of components to feeders, and feeders to machines on an onsertion line. In this context, a model is developed to support the decision making for locating a ‘‘good’’ sequence, while maintaining an acceptable balance between practical usefulness and complexity, and required computation time. The input and outputs of the model to be developed in relation to the onsertion production problem, are as follows: Model input • • • • • • •

Which PCB-types have to be processed; Per PCB-type, which component types (and how many) have to be mounted by SMT; How many machines are available in the machine line; How many feeder slots does every machine have; Per machine, what feeder types (and how many of each) are available; Per feeder type, how many feeder slots are needed on its machine; and Which component type/feeder type-allocations are possible. Model output

• Product sequence: in what order should the PCBs be produced; and • Component allocation (for each PCB type separately): which component types should be assigned to which feeder types, on which feeder banks (machines). The relevant literature is discussed next in relation to the problem formulation at hand. 3. Review of the literature Over the last two decades, many researchers have studied the assembly of PCBs in an effort to develop models to support process planning, production planning, and scheduling decisions [2,3,7,8,12,13,17, 18,22,24,25,29,30,36]. A recent paper by Ji and Wan [19] reviews over 50 published papers and presents the

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literature on the methods and techniques used for planning of PCB assembly at three levels, the selection of lines, the machine allocation, and the scheduling of components. A typical objective in these decision models for machine allocation and sequencing includes minimizing changeovers time and/or throughput time (cycle time). McGinnis et al. [26] state that process planning for printed circuit board assembly can largely be characterized as a manual function. Many companies have developed their own methods for providing input to vendor-supplied software, which in turn generates NC-code. Some companies may even have developed limited function process planning tools. However, as McGinnis et. al. state: ‘‘there are no generic process planning systems currently available’’. They further give an overview of the hierarchical relationship between the necessary decisions in the planning process, in terms of three levels: Level 1: (Grouping) Selection of machine groups and part families and assignment of families to groups. Level 2: (Allocation) Allocation of components to machines when a group has more than one machine. Level 3: (Arrangement and Sequencing) Arrangement of component feeders and sequencing of placement operations for each machine and PCB. Ball and Magazine [4] also give a hierarchical relationship with respect to the problems encountered when preparing the component placement process: (i) allocation of component types to machines; (ii) allocation of component types to feeder locations at each machine; and (iii) pick and placement sequence. Note that these steps are a further specification of levels 2 and 3 of McGinnis et al. [26]. McGinnis et al. introduce the term ‘‘setup management’’ to identify the decisions required in the first two levels of the above-described process. They use the term ‘‘unique setup strategy’’ when only a single PCB type is considered for the setup. The term ‘‘multi-setup strategy’’ is used for the planning of setups for a group of PCB types. They further describe two possible concepts for the multi-setup strategy: decompose and sequence, and partition and repeat. The former strategy breaks the family of PCB types up in smaller sets (maybe of size one), such that each subset can be processed completely with one setup. These subsets are sequenced to minimize the incremental setups between subsets. The latter strategy partitions the components required by the family in subsets, such that each subset can be mounted on the group of machines. Each subset is then run in turn, while the partially completed PCBs are accumulated. Limited research has been conducted on the problem of assigning components to a set of different machines on a line, combined with the problem of varying feed types/feeder sizes, and varying types of PCB. Coble and Bohn [10] indicate that there are two approaches to reduce setup times: (1) reduce the time to set up a feeder, and (2) reduce the number of feeders to be set up. In the latter case, Leon and Peters [22,23] define several setup strategies, depending on the nature of process and number of machines. Balakrishnan and Vanderbeck [3] consider a partial setup strategy of mounting frequently used components permanently on each machine, and present a model to assign product families to parallel assembly lines, incorporating both workload balancing and setup time minimization objectives. Other researchers [5,11,27,28,34,35] showed that in the case of standard feeder size, a simple set-up policy called ‘‘Keep Tool Needed Soonest’’ (KTNS), which is used in flexible manufacturing, can help minimize the number of feeder (tools) changes. The KTNS policy is interesting in the sense that this procedure minimizes the number of tool (feeder) changes for a given sequence of jobs. However, the procedure also has the limiting assumption that each tool (feeder) requires only one slot (or fixed standard size). In these papers, the relation is ‘‘tool-machine’’, instead of ‘‘component–feeder–machine’’, and the availability of feeders is not taken into account when assigning an operation (component) to a machine. With varying methodological details, many papers report on procedures where, (1) the set of jobs are split in groups; (2) the best group is selected to schedule next; and (3) the jobs in this group are sequenced, and steps 2–3 are repeated until all groups are scheduled. This strategy is useful when the number of jobs to be sequenced is very large. However, for this research, the concept of splitting the set of jobs into several groups does not seem very relevant, since the number of jobs to be scheduled (day load) is reasonably small (<20).

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Our review of the literature further reveals that there are only a few papers that deal with problems involving multi-type feeders, with different slot size requirements [1,32]. Furthermore, in their research, total process time reduction, rather than reducing the number of setups, is propagated. Crama et al. [11] consider the problem of maximizing throughput on a line of identical machines, whereby the problem is split into several sub-problems. The total solution procedure, however, is based on the specific type of machine that is considered, which employs three heads. This means that the machines pick and place three components in one cycle. Also it is assumed that only one PCB type is produced. Ben-Arieh and Dror [6] also consider the problem of maximizing throughput on a line of component placement machines. They present a procedure which tries to balance the workload of placing a set of components on a set of PCB types. However, the assumption is made that every component can be mounted on any of the machines. The procedure allocates a component type iteratively to the machine with the least number of component placement operations already assigned to it. Feeders are not mentioned in this article. Furthermore, it is not made very clear what to do when the workload is greater than the combined component staging capacity of the machines. Clifford et al. [9] present a heuristic allocation method for balancing the work between two (different) component placement machines. Potential restrictions on the availability of feeders are not discussed, however. Next, the problem formulation is discussed for the more generalized situation described earlier in the onsertion process, which can eventually assist the production planner to generate better PCB loading sequences and component allocations. 4. Problem description Consider a machine line consisting of several types of onsertion machines. For each type of feeder bank a set of feeders is available. Each feeder in a set can be placed anywhere on the feeder bank(s) corresponding to that set. Some restrictions have to be taken into account. The number of slots needed per feeder differs: a feeder may need 1, 2 or 3 slots. The number of feeder slots on a feeder bank is limited, as is the number of available feeders per feeder type. A day load of PCBs has to be processed. This day load consists of a set of batches of a single PCB type. From now on, the term job will be used to denote a batch of a single PCB type. All component types needed per job, as well as the feeders in which each component can be put, are known. The problem can then be stated as: 1. in which order should the jobs be scheduled, and, 2. per job, which components have to be placed in which feeders and machines. A restriction is that each component type can only be placed in certain feeder types (with corresponding machine types). The objective is to minimize the total number of feeder changeovers, or to minimize the (per job) process time. Note that when the components and feeders have been allocated to the machines, the exact arrangement of the feeders on the machines, as well as the sequence of the placement operations per machine, still have to be determined. The packaging type of each component determines in which feeder type the component can be put. However, when trying to solve the problem, it is only interesting to know which component type/feeder type-allocations are allowed. (The packaging types are only relevant in order to determine the allowed component type/ feeder type-relations). These permitted component type/feeder type-relations are considered as input for the model. The main problems (minimizing process time and minimizing the number of feeder changes) consist of two sub-problems: a sequencing problem (the order of the jobs), and an allocation problem (per job, which components should be allocated to which feeders and machines). The sequence of the jobs is only relevant for the number of changeovers, since it has no impact on the per job process time. The allocation of components to feeders and feeder banks is relevant for the process time per job, as well as the number of feeder changes. Since the allocation and sequencing problem are interdependent when considering the number of changeovers, it would be beneficial if they could be solved to optimality simultaneously. This, however, is not possible

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for the problem at hand, as relevant integer programming-models would result in many thousands of binary variables with dimensions ‘‘component type’’, ‘‘feeder type’’, ‘‘feeder bank’’ and ‘‘instant’’. The complexity of the main problem therefore suggests decomposing it into more manageable sub-problems. This will be done by distinguishing a sequencing step (determining a good sequence for the jobs) and an allocation step (per job, determining a good allocation of components to feeders and machines), as was mentioned earlier, using a similar conceptual approach as reported on by other researchers [15,20,33–35]. 4.1. The sequencing step Since the sequence of the jobs is irrelevant for the process time of the jobs, the idea behind sequencing is solely to reduce the number of changeovers. For each pair of jobs the ‘‘change over costs’’ should be known. These changeover costs could be the actual number of feeder changes between those jobs, or a function approaching them. Mathematically this problem relates to the well-known Traveling Salesman Problem (TSP). 4.2. The allocation step We will refer to the allocation step of the main problem as the Allocation Problem (AP). By splitting the main problem into a sequencing- and an allocation step, the allocations can be done job by job, causing a dramatic reduction in the number of decision variables. This approach means that n Allocation Problems have to be solved, n being the number of jobs in the day load of PCBs. The number of decision variables per job is equal to the number of component types, times the number of corresponding feeder types, times the number of feeder banks for that particular feeder type. For practical problems this might result in several hundreds of binary variables (per job). The allocation problem can then be thought of as minimizing the cost of allocation, subject to the allocation being feasible. The ‘‘cost of allocation’’ may be interpreted as the sum of the quantified penalties for individual component/feeder/feeder bank-allocations. For example, the cost of component type/feeder type/feeder bank-allocation (c, f, b) could be defined as the (estimated) process time needed to place all components of type c, when the components of type c are placed on feeder bank b in a feeder of type f. 4.3. Two alternative strategies: P and C Thus far, the generic structures of both the main problem and the sub-problems have been discussed. More specific concepts in relation to solution procedures for solving the main problems of minimizing the number of feeder changes, or minimizing process time, are discussed next. In particular, two strategies are developed. The C-strategy, which aims at minimizing changeovers, and consists of three stages: Stage 1: Solve a Traveling Salesman Problem (TSP) to find a sequence of jobs, Stage 2: Solve an Integer Programming (IP) model to allocate the components to feeders and feeder banks, Stage 3: Use the Keep Tool Needed Soonest (KTNS)-policy to fill gaps on feeder banks. The P-strategy, which aims to minimize process time, and also consists of three stages: Stage 1: Solve an IP-model to allocate the components to feeder and feeder banks, Stage 2: Use Balancing Procedures to re-allocate components, Stage 3: Solve a TSP to find a sequence of jobs. The three stages for each of the strategies are elaborated on below. 4.3.1. The ‘C’-strategy – focus on the number of changeovers Stage 1: Sequence Jobs – It is clear, given the solutions of the Allocation Problems per job, that the choices for a good sequence (i.e. a sequence with as few feeder changes as possible) are limited. It would therefore be

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desirable if the number of feeder changes could be taken into account while solving the Allocation Problems per job. Suppose for the AP of a certain job (say job l), that the allocation for job k, which will be processed before job l, is known. It is then possible to take the allocation for job k into account while determining the allocation for job l. This idea gives rise to a procedure which will be referred to as the C-strategy: First, find a good sequence of jobs. Then, determine per job an allocation (based on the allocation for the previous job), which minimizes the number of feeder changes between this job and the previous one. This second stage of the strategy is discussed next. Stage 2: Allocate components – When determining allocations (component type/feeder type/feeder bankrelations) for a certain job, the component type/feeder type/feeder bank-allocations already established for the previous job should get ‘‘priority’’. This will ensure that the solution for the AP of a certain job resembles the solution for the AP of the previous job as much as possible. The first AP would then be based on the existing machine setup (i.e. the setup for the last job of the previous day, if available). However, the sequence of the jobs should be known in advance, because the solutions for the Allocation Problems are sequence-dependent. This means that each solution is determined by the solution for the AP of the previous job. As mentioned before, sequencing is in essence a Traveling Salesman Problem (TSP). In order to find a good schedule, ‘changeover costs’ should be known for each pair of jobs. Preferably, the exact number of changeovers should be known between each pair of jobs. However, this number of changeovers cannot be known before the Allocation Problems are solved; and hence the C-strategy can only solve these Allocation Problems when the sequence of jobs is known. Enumeration of all different schedules is not possible (a day load of 10 jobs can be arranged in 10! or 3,628,800 different orders). Therefore, a sequence should be determined based on a ‘‘changeover cost’’ which is an approximation for the number of feeder changes necessary between two jobs. In this context, the changeover cost should be some kind of measure of commonality for each pair of jobs. A logical choice would be the number of component types that two jobs (PCB types) have in common. Stage 3: Fill gaps on feeder banks – Once the exact job sequence and component–feeder–feeder bank assignments are known, a follow-up procedure may be employed to reduce the number of changeovers. Consider the following situation. For a certain feeder bank a certain component type–feeder type allocation (say (c1,f1)) has been assigned to both the (say) first and the (say) third job in the sequence. It then is advantageous to keep that component/feeder allocation on the machine when job 2 is processed, thus saving handlings to remove and replace the feeder between the second and the third job. This idea may be imagined as ‘‘filling gaps’’. However, some restrictions have to be taken into account with respect to the above. It may be possible that the feeder of that specific component–feeder allocation has been assigned to another component type needed for the second job. Also it may be possible that for the second job all feeder slots on the specific feeder bank have been assigned to other feeders (components) that are required for the second job. In these cases the mentioned feeder cannot be kept on the machine between the first and the third job. This problem is similar to the Tool Replacement Problem in Flexible Manufacturing Systems, as mentioned by Cunningham and Browne [14], Knuutila et al. [21], Spieksma [34], and Tang and Denardo [35]. The objective is to determine the set of tools to be placed on the machine at each instant such that the total number of tool switches is minimal. Tang and Denardo and Spieksma suggest for this problem the so-called Keep Tool Needed Soonest-policy or KTNS. This procedure functions essentially as follows: (1) At any instant, no tool is inserted unless it is required by the next job. (2) If a tool must be inserted, the tools that are kept (not removed) are those needed the soonest. The difference between the Tool Replacement Problem and the relevant problem under discussion is the following. The former assumes the relation ‘‘tool–machine’’, while the latter assumes the relationship ‘‘component–feeder–feeder bank’’; i.e. there is one additional dimension (the availability of the correct feeder). Also the KTNS policy assumes that each tool needs the same amount of space on the machine (‘‘slots’’). The original KTNS policy is therefore modified, and consists of the following two steps for a given (and previously determined) PCB-sequence, and component–feeder–feeder bank allocation:

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For each feeder bank (1) Keep placing (in job order) all previously determined component type–feeder type relations on the corresponding feeder bank, until a restriction is violated (i.e. no feeder or feeder slot is available anymore). (2) If for a new batch (job) a new component type–feeder type relation is required, place this component type (plus feeder), and remove other feeders (plus component types) which are needed latest, until the restrictions are not violated anymore.

4.3.2. The ‘P’-strategy – focus on per job process time Stage 1: Allocate components – When focusing on process time, the sequencing is less relevant, since the sequence of jobs is only important for the number of feeder changeovers. The first aim should therefore be to solve each Allocation Problem with the objective of minimizing the process time of the job, using the allocation methodology outlined earlier. Stage 2: Balancing procedures to re-allocate components – Note that the P-strategy minimizes total ‘component’-assembly time, and therefore ‘‘attempts’’ to assign components to the fastest machine. However, this might result in an unbalanced machine line, i.e. idle time is not taken into account. Process time (of a job), however, consists of both assembly time and idle time. A procedure for ‘‘reshuffling’’ the allocations among identical feeder banks, is described below, and is a function of whether or not identical machines need to be balanced. Balancing of identical machines – This applies to a set of identical feeder banks (it is supposed of course that these feeder banks share a set of feeders). The proposed method is based on the Allocation Heuristic of Clifford et al. [9], which is modified in order to account for restrictions with respect to the capacity of the feeder banks: For each group of identical feeder banks Step 1: Sort the component types allocated to the group of identical feeder banks by decreasing required assembly time. If there is little excess capacity on the feeder-banks, make sure that the last two components of the list only need one feeder slot on either of the feeder banks. Step 2: Pick the first component type from the list, assign it to the machine with the least ‘allocated’ assembly time, unless the resulting number of occupied feeder slots would exceed the feeder bank capacity. In the latter case, assign the component type to the feeder bank that is second choice. Step 3: Compute the new ‘allocated’ assembly times. Eliminate the component from the list. If the list is empty, stop; else return to step 2.

Imbalance reduction of different machines – If all components can only be placed on one of the machines in line, then the allocation problem is trivial; if this allocation would result in an unbalanced line, nothing could change that. Also, since total process time consists of idle time and assembly time, the smallest process time may not be achieved by a perfectly balanced line: fast machines should be ‘‘overloaded’’ to some extent. However, if it is possible to re-allocate some components, the following procedure may result in a setup with less idle time, longer assembly time, and overall, less process time:

For the machine line Step 1: Find a machine in the line with a component-assembly time exceeding the average componentassembly time; call this machine m. With ‘component-assembly time’ the total machine assembly time includes the time needed to place all components that have been assigned to that particular machine. Call the feeder banks belonging to this machine bi (i = 1, . . . , n). Set i = 1.

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Step 2:

For all component types, assigned to feeder bank bi, search (if available) the feeder bank to which this component type could be re-assigned (replacement of component type). If the required feeder is available for a replacement, and enough feeder slots are free on the other feeder bank, compute the total processing time that would result after a replacement of this component type. The component type for which a replacement would result in the largest decrease in total process time, is replaced. If no such component type was found, or the new component-assembly time for m (resulting after a replacement) has become smaller or equal to the average component-assembly time, stop; else repeat step 2.

Step 3:

i = i + 1. If i > n, go to step 4; else go to step 2.

Step 4:

Go to step 1. If no replacements are possible anymore, stop.

Stage 3: Sequence Jobs – When these allocations are established, a good sequence of the jobs can be determined, based on estimations of the number of feeder changes required between two jobs. These estimations are of course based on the allocations made for each job. ‘‘Estimations of the number of feeder changes’’ are used, as the exact number of feeder changes depends on the strategy employed when determining which feeders should be allocated to which feeder slots for each feeder bank and job. For instance, consider the situation that for a certain machine (feeder bank), a certain component type in a certain feeder type is needed for (say) job 1, as well as (say) job 2 (succeeding job 1). Then the choice could be made to put that component type/feeder type-allocation in, say, slot 10 for job 1, and, say, in slot 25 for job 2, thus opting for a changeover which could have been avoided. Alternatively, as a rule, it is also possible that component/feeder-allocations that are identical for two successive jobs are put in the same slot for both jobs. Strictly speaking, this would be a compromise between the aim of minimal throughput time and minimal number of changeovers, since it seems unlikely that in the optimal situation with respect to process time, a certain component type–feeder type relation would be placed in the same feeder slot for succeeding jobs. However, these questions can only be addressed when the Allocation Problem and the Sequencing Problem have been solved. Whether this sequence is exploited in order to achieve a minimal number of changeovers by allocating the same components/feeders to the same slots for successive jobs, is a question that should be addressed later, weighing process time against changeovers. This is beyond the scope of this research. At this point it suffices to find a ‘‘good’’ sequence that minimizes changeover costs, given the allocations per job. In this context, ‘changeover costs’ are defined as the number of component type–feeder type–feeder bank allocations that two jobs have in common. The C- and P-strategies are then summarized below, as follows: C-strategy

P-strategy

Find a sequence that maximizes the sum of ‘commonalities’ between successive jobs. Commonality being defined as the number of shared components. Solve a TSP

Per job, allocate the components to feeders and feeder banks. The aim is a minimal assembly time per job. Solve IP-models

Per job, allocate the components to feeders and feeder banks. The aim for each allocation is a maximal resemblance with the previous allocation. Solve IP-models

Per job, try to re-allocate components in order to achieve a better process time. Use the Balancing procedures

For the combined job-allocations, try to ‘fill gaps’ on the feeder banks, in order to save changeovers. Use the KTNS policy

Find a sequence that maximizes the sum of ‘commonalities’ between successive jobs. Commonality being defined as the number of shared component–feeder–feeder bank allocations. Solve a TSP

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The respective Traveling Sales Problem (TSP)- and Integer Programming (IP)-models that were developed for the onsertion planning and scheduling, are detailed below. 5. Detailed problem formulations 5.1. The sequencing problem Recall that the sequencing problem relates mathematically to the well-known Traveling Salesman Problem (TSP).However, in this case, as opposed to the ‘‘real’’ TSP, the objective is maximizing ‘‘commonality’’ instead of minimizing costs. Define cij as the commonality between job i (PCB type i) and job j (PCB type j) for i, j = 1, . . . , n, n being the number of jobs in the day load. Commonality in this case is defined as the number of shared component type– feeder type–feeder bank allocations (P-strategy), or the number of shared component types (C-strategy). Let c0i be defined as the commonality of the existing setup (the last allocation of the previous day) with job i, and let ci0 = 0. (the latter means that there is no preference with respect to the end state, since the next day load is supposed to be unknown). Let the decision variables xij (i, j = 0, . . . , n), be defined as follows:  1 if job i is scheduled before job j xij ¼ 0 otherwise: The mixed integer programming formulation of max TSP is n X n X Max z ¼ cij xij ; i¼0

s:t:

n X i¼0 n X

ð1Þ

j¼0

xij ¼ 1;

j ¼ 0; . . . ; n;

ð2Þ

xij ¼ 1;

i ¼ 1; . . . ; n;

ð3Þ

j¼0

ui  uj þ nxij 6 n  1; xij 2 f0; 1g; ui P 0:

i ¼ 1; . . . ; n; j ¼ 1; . . . ; n;

ð4Þ ð5Þ

A Traveling Salesman tour J 0 ; J i1 ; . . . ; J in ; J 0 obtained by solving the above model, will yield the processing sequence J i1 ; . . . ; J in . In order to ensure that xii = 0 (i = 1, . . . , n), a small number should be chosen for cii. Note restriction (4). This inequality is necessary to guarantee that only one single tour is constructed, and not several subtours. The variables ui may be interpreted as the number of jobs i (i = 1, . . . , n) when the jobs are ordered in the sequence in which they will be processed. Since the TSP is NP-complete, most of the time the sequencing problem cannot be solved to optimality within a small amount of time, and a heuristic method is preferred. A well-known heuristic method for the TSP is the cheapest insert method. (Golden and Stewart [16], Little et al. [24]). This method is slightly modified for the onsertion problem, and is referred to as the maximal insert method, since maximization is the objective, not minimization as in the traditional TSP: Step 1: Step 2: Step 3:

Randomly select a job i, and subsequently a job j for which cij = maxkcik. Construct a subtour with job i and job j. Given the subtour, randomly select a job m that has not yet been inserted into the subtour. Insert job m in the subtour between job i and j for which cim + cmj  cij is maximal. If all jobs have been inserted, stop; else return to step 2.

5.2. The Allocation Problem The Allocation Problem (AP) for both the P-strategy and the C-strategy has a number of restrictions in common:

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(1) All components have to be assigned to a feeder and a (corresponding) machine. (2) Not more feeders can be used (per feeder type) than are available. (3) The feeders that are assigned to a certain machine may not use more slots than are available on that machine. In the following section these restrictions are formalized in a binary Integer Programming model for each of the two strategies. With respect to the third point raised above, some additional comments are in order. Thus far it has been suggested that all feeders need a certain fixed number of slots on a feeder bank. Reality is slightly more difficult. The total number of slots needed for a certain set of feeders depends on the exact order in which these feeders are positioned on the feeder bank. Sometimes a few slots are lost due to the feeder type nature. From a theoretical point of view it would therefore be best to construct a binary decision variable of the form xcfbs, i.e. a decision variable with dimensions ‘‘component type’’, ‘‘feeder type’’, ‘‘feeder bank type’’ and ‘‘slot number’’. However, doing so would make the number of decision variables prohibitive. To see this, consider a (common) small onsertor line with a Fuji CP-IV and a Fuji IP-II. The CP-IV has 140 feeder slots, the IP-II has 74 slots. Suppose that a PCB to be processed has 100 different component types that all can be mounted on the IP-II, and of which 80% can be mounted on the CP-IV. Then in total 100 * 74 + 80 * 140 = 18,600 binary decision variables would be needed (for this one job). Also an extra set of restrictions would be required. This would obviously lead to practically insolvable models. Fortunately the number of feeder slots ‘‘nominally required’’ for a feeder type is a reasonably good representation of reality. By using these numbers and using as feeder bank capacity a possibly adjusted number of feeder slots, allocations should be feasible. This means, however, that if the capacity of the feeder bank is filled completely, there are some restrictions with respect to the feeder arrangement on the feeder bank. The basic restrictions of the Allocation Problem can be formulated mathematically as follows. Let C be the number of different component types on the PCB (job); let F be the number of different feeder types available on the machine line; let B be the number of feeder banks in the line. Note that a machine may consist of one or more feeder banks. Let the decision variables xcfb (c = 1, . . . , C; f = 1, . . . , F; b = 1, . . . , B) be defined as follows:  xcfb ¼

1 if component type c is assigned to feeder type f of feeder bank b 0 otherwise:

Define the following parameters: feedf = the number of feeders available of type f, f=1, . . . , F. capb = the number of feeder slots available on feeder bank b, b = 1, . . . , B. slotfb = the number of feeder slots occupied by feeder type f on feeder bank b, f = 1, . . . , F; b = 1, . . . , B. The parameters slotfb are only defined for allowed combinations f and b. In order to obtain a feasible allocation, the following restrictions are required: F X B X

xcfb ¼ 1;

c ¼ 1; . . . ; C;

ð6Þ

f ¼1 b¼1 C X B X

xcfb 6 feed f ;

f ¼ 1; . . . ; F ;

ð7Þ

c¼1 b¼1 C X F X

slotfb xcfb 6 capb ;

b ¼ 1; . . . ; B;

ð8Þ

c¼1 f ¼1

xcfb 2 f0; 1g;

c ¼ 1; . . . ; C; f ¼ 1; . . . ; F ; b ¼ 1; . . . ; B:

ð9Þ

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Restriction (6) guarantees that each component type is assigned to a certain feeder type and feeder bank. Restriction (7) ensures that no more component types are assigned to a certain type of feeder than there are feeders available of that type. Restriction (8) guarantees that the feeders assigned to a certain feeder bank do not need more slots than are available on that feeder bank. Restriction (9) guarantees the 0/1 character of the decision variables. It is assumed that the parameters feedf and capb are such that feasible solutions exist. The objective function may take the following forms, depending on the strategy employed: For the P-strategy : min

C X F X B X

asstcfb xcfb ;

ð10Þ

pencfb xcfb :

ð11Þ

c¼1 f ¼1 b¼1

For the C-strategy : min

C X F X B X c¼1 f ¼1 b¼1

The parameters asstcfb represent the estimated machine assembly time when the components of type c (needed for the job (PCB)) are in feeder type f on feeder bank b. The parameters pencfb represent a penalty for component type–feeder type–feeder bank relation (c, f, b). When a relation (say) (c1, f1, b1) has been established for the previous job (i.e. xc1 f1 b1 ¼ 1 in the solution for the previous Allocation Problem), the next job should have a ‘‘bonus’’ (i.e. a negative penalty) on xc1 f1 b1 . Define therefore ( asstcfb if ðc; f ; bÞ is a feasible allocation asstcfb ¼ undefined if ðc; f ; bÞ is an infeasible allocation 8 asstcfb  M if xcfb ¼ 1 for the previous job ðfirst choiceÞ > > < pencfb ¼ asstcfb if xcfb ¼ 0 for the previous job; and ðc; f ; bÞ is feasible ðalternativeÞ > > : undefined if ðc; f ; bÞ is an infeasible allocation With asstcfb ¼[estimated machine operating time needed for a component of type c from feeder type f on feeder bank b] * [number of components of type c needed for the job (PCB)] and M a large positive integer. The Allocation Problem is then summarized for both strategies, as follows: C-strategy min

C X F X B X

P-strategy min

pencfb xcfb

c¼1 f ¼1 b¼1

C X F X B X c¼1 f ¼1 b¼1

Subject to F X B X

xcfb ¼ 1;

c ¼ 1; . . . ; C

f ¼1 b¼1

C X B X

xcfb 6 feed f ;

f ¼ 1; . . . ; F

c¼1 b¼1

C X F X

slotfb xcfb 6 capb ;

b ¼ 1; . . . ; B

c¼1 f ¼1

xcfb 2 {0,1},

c = 1, . . . , C; f = 1, . . . , F; b = 1, . . . , B

asstcfb xcfb

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A modified version of the Ross and Soland [31] branch and bound algorithm was used for obtaining an efficient solution for the AP. For a detailed description of the modified algorithm, see Appendix A. 6. Model validation Both strategies were implemented for a real life pilot study. Data of 8 PCB types were used to construct the required data files. The data files for the onsertion machine line were based, respectively, on the specifications of a ‘‘Fuji CP IV’’- and ‘‘IP II’’-feeder bank. The number of feeders were set in such a way that for some component types restrictions applied, i.e. not all component types could be assigned to just any feeder type. In order to validate the outcomes of the C-strategy, a model was constructed to determine the optimal allocations for the day loads, i.e. the allocations that absolutely minimize the number of changeovers. This model solves the sequencing and allocation problem simultaneously. In reality, for larger problems, computation time for this model may become prohibitive, thereby pointing to the use of the proposed heuristic method. Initial computations, using 14 day-load samples that were subsequently optimised and compared with results of the C-strategy, indicated an average deviation of 6% (ranging from 1% to 11%) of the optimal solutions. This is rather promising, given the complexity of the problem. The P-strategy was evaluated by determining a lower bound for the resulting PCB process times, and comparing this LB with the actually achieved process times. The lower bound is determined by using the machine assembly times without the balancing procedures. This yields the minimal sum of the machine assembly times. The P-strategy yielded an average deviation of 18% from the lower bound, which does not seem excessive given the fact that by increasing batch sizes from 20 to 40 this percentage remained almost identical. Thus the initial results seem satisfying. The pilot study validated the formulation of both strategies as not deviating excessively from the true optimal solution. However, more extensive computational experiments are called for to validate the quality and robustness of the approaches proposed. Such extensive experimentation is an area for future research, and beyond the scope of this paper. 7. Conclusions Considerable time and cost in the assembly of printed circuit boards (PCBs) can be saved through a more efficient onsertion-process. This not only saves time and costs, but also increases information availability to down- and up-stream supply chain members in terms of PCB manufacturing lead-times, and through improved estimates of throughput times. Two models were developed for planning and scheduling component–machine assignments for the processing of a set of PCBs on a line of onsertor machines. One model focuses on minimizing the number of feeder changeovers, and was referred to as the C-Strategy. The other model minimised the (per PCB) process time, and was referred to as the P-Strategy. Both strategies were validated successfully with small, reallife, data sets. More extensive testing of the proposed heuristics may shed additional light on their validity and robustness in a variety of larger scale implementations, which was identified as an area for future research. Appendix A. The adapted Ross and Soland algorithm The purpose of the classical assignment problem is to find optimal pairings of agents and tasks. Each task is assigned to a single agent, and each agent is given a single task. However, the IP-model of the Allocation Problem (AP, see Section 5.2) in this paper has extra restrictions, since the feeders to which component types have been assigned should not need more feeder slots than available on the feeder bank of the corresponding machines. The algorithm that Ross and Soland [31] developed for the Generalized Assignment Problem (GAP), uses the special structure of this problem. Lower bounds are determined for each solution subset by solving 0/1

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knapsack problems instead of linear programming problems. Using the solutions of the knapsack problems, certain decision variables are set to 0 or 1. In this appendix Ross and Soland’s algorithm has been adapted for the IP-model of the AP. The parameters of the IP-model for the P-strategy are used (asstcfb). Some additional assumptions were necessary: (1) If some feeder is transferred from a certain feeder bank to another (i.e. when a particular feeder can be mounted on more than one feeder bank), this has no consequences for the component assembly time. (2) If some component type is transferred from a certain feeder type to another feeder type on the same feeder bank (i.e. when a component has more than one allowed feeder type for a certain feeder bank), this has no consequences for the component assembly time. These assumptions will be explained in the rest of the appendix. Note that these assumptions are not very restrictive. With respect to the first assumption: If a feeder can be fitted on more than one feeder bank, these feeder banks are in practical cases of the same type, and therefore of the same speed. With respect to the second assumption: The component assembly time is determined for a major part by the speed of the machine, and the position of the feeder on the feeder bank. It is supposed that there is no difference in assembly time, when using a stick feeder instead of a tape feeder (for instance) for a certain component on a certain machine. Also the components are generally available in either tape or stick. With respect to the investigation of the branches of the branch-&-bound tree, the search strategy is LIFO. In order to describe the strategy, consider the following subset with corresponding IP-model: X X X min asstcfb xcfb þ W  ; ðA1Þ c2C  f 2F  b2B

s:t:

X f 2F 

X c2C 

X c2C 

X

xcfb ¼ 1;

c 2 C;

ðA2Þ

b2B

X

xcfb 6 feed f ;

f 2 F ;

ðA3Þ

b2B

X

slotfb xcfb 6 capb ;

b 2 B ;

ðA4Þ

f 2F 

xcfb 2 f0; 1g;

c 2 C  ; f 2 F  ; b 2 B :

ðA5Þ

With C = the set of unassigned component types; F = the set of feeder types of which one or more feeders are still available; B = the set of feeder banks that still have unoccupied feeder slots; feed f = the number of remaining feeders of type f; capb = the  number of unoccupied feeder slots on feeder bank b; asstcfb if the value of xcfb is still free  asstcfb ¼ (M being a large positive integer); M if xcfb has been set to 0  W = the total processing time required for the components that have been assigned so far. A lower bound for model (A1)–(A5) is obtained by solving this model after having dropped restrictions (A3) and (A4). This can be done easily by determining for each c 2 C an index fc 2 F and bc 2 B such that asstcfc bc ¼ minf 2F  ;b2B asstcfb . The solution for this strippedP model then is: 8c 2 C  : xcfc bc ¼ 1, and xcfb ¼ 0 if f 6¼ fc or b 6¼ bc . This yields the lower bound: Z  ¼ c2C asstcfc bc þ W  . If the solution found does not violate constraints Eq. (A3) and (A4), the optimal solution for this subset has been found. If not, this lower bound can be refined as follows.

J. Ashayeri, W. Selen / European Journal of Operational Research 183 (2007) 909–925

Define F 0

( 

¼

f 2F :

¼

) xcfb

>

feed f

;

c2C  b2B

( B0

XX



b2B :

X X

923

) slotfb xcfb

>

capb

;

c2C  f 2F 

C f ¼ fðc; bÞ 2 C   B : xcfb ¼ 1g;

8f 2 F 0 :

Note: with C * B the set of all feasible combinations component c–feeder bank b is meant. C b ¼ fðc; f Þ 2 C   F  : xcfb ¼ 1g; 8b 2 B0 ; XX xcfb  feed f ; 8f 2 F 0 ; d f ¼ c2C  b2B

d b

¼

X X

slotfb xcfb  capb ;

8b 2 B0 :

c2C  f 2F 

In order to satisfy constraints (A3) and (A4) some assigned component types have to be reassigned, for every feeder type in F 0  and feeder bank in B 0 . If for feeder f the assignment of (c, b) 2 Cf is broken, this means an increase in process time of at least  pc ¼ minfasstckl  asstcfc bc : ðk; lÞ 2 ðF  n ffc gÞ  B g: If for feeder bank b the assignment of (c, f) 2 Cb is broken, this means an increase in process time of at least ^ pc ¼ minfasstckl  asstcfc bc : ðk; lÞ 2 F   ðB n fbc gÞg: If such a k and l cannot be found, the problem (A1)–(A5) has no feasible solution and the corresponding subset can be eliminated from further research. Now the following problems have to be solved: For every f 2 F 0 : X  ðP f Þ min pc y cfb ; ðc;bÞ2C f

s:t:

X

y cfb P d f ;

ðc;bÞ2C f

y cfb 2 f0; 1g: For every b 2 B0 : ðP b Þ

min

X

^pc ^y cfb ;

ðc;f Þ2C b

s:t:

X

slotfb ^y cfb P d b ;

ðc;f Þ2C b

^y cfb 2 f0; 1g: The solutions to problems (Pf) and (Pb) designate those component types which must be reassigned to another feeder type or feeder bank, in order to satisfy the constraints on feeder type f and feeder bank b, respectively. Optimal solutions y cfb ¼ 1 and ^y cfb ¼ 1 mean that component type c of feeder type f is to be reassigned to another feeder type and/or to another feeder bank. In order to justify the separate solving of problems (Pf) and (Pb), it is assumed that, given an allocation (c, f, b), that the increase in assembly time of a change to (c, f 0 , b) plus the increase in assembly time of a change to (c, f, b 0 ) is smaller than the increase in assembly time of a change to (c, f00 , b00 ). Otherwise, the total re-assignment obtained from the solutions of (Pb) and (Pf) is not at minimal increased assembly time, which is the objective. In order to prevent the latter, the two assumptions, earlier mentioned were necessary.

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As an illustration, suppose the following situation that has to be excluded. From ðP f1 Þ and pc1 results a reassignment of xc1 f1 b1 to xc1 f2 b1 . From (Pb) and ^ pc1 results a re-assignment to xc1 f1 b2 . The possibility that there exists a potential re-assignment to (say) xc1 f3 b3 with a resulting increase in assembly time less than the combined increases in assembly time necessary for the former two re-assignments, has to be excluded. This explains the two assumptions made at the beginning of this appendix. Let the optimal objective function values for (Pf) and (Pb) be zf and zb , respectively. A refined lower bound for the objective function value of (A1)–(A5) then is X X LB ¼ Z  þ zf þ zb : ðB1Þ f 2F 0

b2B0

The optimal solution y cfb and ^y cfb for (Pf) and (Pb) "f 2 F 0  and b 2 B 0 , can be used to find a possible feasible solution. To obtain this, replace for all combinations (c, f, b) with y cfb ¼ 1 and ^y cfb ¼ 0 the assignment of component type c to feeder type f and feeder bank b by an assignment of component type c to feeder type k and feeder bank l, with k and l such that:  pc ¼ asstckl  asstcfc bc . Analogous for all (c, f, b) with ^y cfb ¼ 1 and y cfb ¼ 0, with corresponding ^pc . If y cfb ¼ ^y cfb ¼ 1 for some combinations (c, f, b), replace the allocation (c, f, b) for the one corresponding to y cfb (and  pc Þ or ^y cfb (and ^ pc Þ, such that both a change of feeder and feeder bank occurs. If the alternatives would imply either only a change of feeder type, or only a change of feeder bank, choose arbitrarily (the new allocation will not be feasible anyway in that case). In case this leads to a feasible solution, the best of the feasible solutions for (A1)–(A5) has been found. The objective function value then is equal to (B1). The subset can be eliminated from further research. If the subset cannot be eliminated, the subset is split into two new subsets by choosing a branching variable and setting this variable to 1 and 0, respectively. The branching variable is chosen by determining 8y cfb ¼ 0    pc capb tcfb ¼ min  pc feed f ; : slotfb Analogous 8^y cfb ¼ 0, with corresponding p^c for ^tcfb . Set tcfb ¼ minftcfb ; ^tcfb g, and choose as branching variable the variable xcfb for which tcfb is largest. (Of course, if for a c only one of tcfb and ^tcfb is defined, then tcfb is equal to the one defined). The point is to find out the assignment which, when re-assigned, would mean the greatest increase in assembly time relative to its requirement for feeder and feeder bank capacity (in number of feeders and feeder slots available for that particular feeder type). This one you would preferably not re-assign. Therefore, the candidate problem in which the separation variable is set to one is the problem that is subsequently examined. References [1] J. Ahmadi, R. Ahmadi, H. Matsuo, D. Tirupati, Components fixture positioning/sequencing for printed circuit board assembly with concurrent operations, Operations Research 43 (3) (1995) 444–457. [2] J.C. Ammons, M. Carlyle, L. Cranmer, G.W. DePuy, K.P. Ellis, L.F. McGinnis, C.A. Tovey, H. Xu, Component allocation to balance workloads in printed circuit card assembly systems, IIE Transactions 29 (1997) 265–275. [3] A. Balakrishnan, F. Vanderbeck, A tactical planning model for mixed-model electronics assembly operations, CORE Discussion paper 9349, Catholic University of Louvain, 1993. [4] O.M. Ball, M.J. Magazine, Sequencing of insertions in printed circuit board assembly, Operations Research 36 (2) (1998) 192–201. [5] J.F. Bard, A heuristic for minimizing the number of tool switches on a flexible machine, IIE Transactions 20 (4) (1988) 382–391. [6] D. Ben-Arieh, M. Dror, Part assignment to electronic insertion machines: Two machine case, International Journal of Production Research 28 (7) (1990) 1317–1327. [7] M.L. Brandeau, C.A. Billington, Design of manufacturing cells: Operation assignment in printed circuit board manufacturing, Journal of Intelligent Manufacturing 2 (1991) 95–106. [8] T.F. Carmon, O.Z. Maimon, E.M. Dar-El, Group set-up for printed circuit board assembly, International Journal of Production Research 27 (10) (1989) 1795–1810. [9] J.J. Clifford, T.L. Kayser, M.E. Posner, Applying Common Sense To Balancing Component Placement Machines, Ohio State University/AT&T Network Systems, Columbus, Ohio, 1993.

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