A short review on: Optimization techniques of ZnO based thin film transistors

Accepted Manuscript

A Short Review on: Optimization Techniques of ZnO based Thin Film Transistors Sumit Vyas PII: DOI: Reference:

S0577-9073(17)30405-7 10.1016/j.cjph.2017.12.002 CJPH 402

To appear in:

Chinese Journal of Physics

Received date: Revised date: Accepted date:

8 April 2017 1 December 2017 1 December 2017

Please cite this article as: Sumit Vyas , A Short Review on: Optimization Techniques of ZnO based Thin Film Transistors, Chinese Journal of Physics (2017), doi: 10.1016/j.cjph.2017.12.002

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Introduction to TFT Important application of ZnO thin film transistor has been discussed. Various techniques that can be used to improve the quality of ZnO based thin film transistor have been reviewed. Work from reputed research group has been summarized.

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A Short Review on: Optimization Techniques of ZnO based Thin Film Transistors

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Sumit Vyas*

Corresponding Author

Sumit Vyas

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Department of Electronics and Communication Engineering, Thapar University, Patiala-147001, India. Email: [email protected], Phone: 7800420845

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Abstract There has been a significant global interest in the thin film transistor (TFT) due to its potential use in flat panel display. A great deal of interest in zinc oxide (ZnO) based TFT has been developed owing to its promising electronic and optoelectronic properties. The performance of a

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TFT is mainly measured by calculating the turn-on voltage, drain current on-to-off ratio (Ion/Ioff) and channel mobility that depends on many factors like crystallanity of the active layer, quality of the insulator, and the quality of the interface between the different layers (semiconductor, insulator, and metallic contacts). All these factors further depend upon the growth and processing

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condition of different layers. This paper presents a short review that includes the factors affecting the performance of ZnO-based TFT and the methods to optimize them. The related work of reputed research groups are summarized and discussed systematically in the paper.

1. Introduction

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voltage; ZnO; leakage current

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Keywords: Thin Film Transistors; active-matrix liquid-crystal display; mobility; threshold

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Thin film transistor (TFT) is the basic building block of the active-matrix liquid-crystal

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display (AMLCD). TFT is basically used as a switch for driving the pixels in the flat panel display. The resolution of the display highly depends upon the performance of the TFT. The

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large area display with high-resolution, high frame rate, and low power operation requires the switching speed and driving current of the TFT to be very high. The switching speed of the TFT depends on the field effect mobility of charge carriers, sub-threshold slope, and the threshold voltage of the device. For low power operation, gate leakage current should be very less. For a high-resolution display, the field effect mobility (µFE>5 cm2/V-s), the drain current on/off ratio (Ion/Ioff>105) of the TFT should be very high, and the low sub-threshold slope, gate leakage

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current should be low [1]. The area of display depends on the crystalline nature of the material. Highly crystalline nature over a large area results in a large area display. All these performance parameter of the TFT is affected by factors like quality of the active layer, insulator, and quality of the interface between the different layers (semiconductor, insulator, and metallic contacts). All

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these factors further depend upon the growth and processing condition of different layers in TFT. The improper growth process may result in inter-grain and interface defects that degrade the performance of the TFT. Hence, it is necessary to choose a suitable material for TFT and optimize the fabrication process. Zinc Oxide (ZnO) has emerged as a potential material for high

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performance TFT. Due to its excellent electronic (high field effect mobility) and optoelectronic properties (insensitivity to visible light due to its wide bandgap), it is considered as one of the most suitable material for active channel layer material in TFT [2-4]. A very high performance

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ZnO-based TFT for a high resolution, large area display can be fabricated if the growth parameters are properly controlled and optimized. In this paper, all the factors affecting the

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performance of ZnO-based TFT and the methods to optimize them are discussed systematically.

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2. Crystalline nature of the ZnO thin film ZnO thin films are generally in the polycrystalline form with very high surface grain density.

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The polycrystalline film exhibits non-uniform characteristics across the film area. Therefore, the

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LCD having TFT with polycrystalline active layer will result in a non-uniform performance across the display area. Further, the nano-crystals in the film forms grain boundaries between them that degrade the field effect mobility via grain boundary scattering. Various localized states are created within the bandgap which traps the carriers and limits the carrier mobility and hence limits the performance of the TFT. In order to reduce the grain boundaries, the grain size of the active layer must be increased. The increase in the grain size may increase the surface

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roughness that again degrades the mobility. Therefore, it should be done via proper methods. There are various techniques to improve the crystalline nature of ZnO thin film like inserting a buffer layer, annealing, etc.

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2.1 ZnO thin film on buffer layer Growing the ZnO thin film on appropriate buffer layer improves the crystallinity of the film. The buffer layer reduces the lattice mismatch between the ZnO and the insulator layer hence the strain in the film is decreased, and the crystallinity and hence the mobility, stability, and various

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other parameters are improved. Remashan et al. [5] fabricated ZnO TFT on a glass substrate by MOCVD process. ZnO was grown on a thin buffer layer of MgZnO. The reported mobility, Ion/off ratio, threshold voltage, and the subthreshold slope was 9.1 cm2/V-s, 2.3 × 108, −2.75 V and 0.38 V/dec respectively for TFT with the buffer layer. For TFT without buffer layer, the mobility,

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Ion/off ratio, threshold voltage, and the subthreshold slope was 2.3 cm2/V-s, 6.4× 107, −6.75 V and

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0.78 V/dec respectively. Clearly the TFT with the buffer layer exhibited better performance as compared to TFT without a buffer layer. Park et al. [6] reported ZnO nonvolatile memories TFT

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using the poly (vinylidene fluoride/trifluoro ethylene) ferroelectric layer as an insulator. The TFT was giving superior properties when a very thin Al2O3 buffer layer was inserted between the

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ZnO and insulator layer. Hirao et al. [7] reported the improvement in crystallinity of RF

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sputtered ZnO thin film deposited on double layer SiOx/SiNx dielectric. A saturation mobility and Ion/off current ratio of 5.2 cm2 / V-s (at VGS = 40 V and VDS = 10 V) and 2.7 × 107 were obtained. He even demonstrated a 1.46-inch diagonal LCD with 61600 pixels driven by this ZnO-TFT with SiOx/SiNx dielectric. Lee et al. [8] reported ZnO TFT with cross-linked poly(vinyl alcohol) buffer layer and the stability of the TFT was better as compared to the TFT without a buffer layer.

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2.2 Thermal Annealing The crystallinity can also be improved by the annealing process. By annealing process, the smaller crystallites recombine to form larger crystallites hence the density of grains and grain

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boundaries decreases. As the grain boundary decreases the grain boundary scattering also decreases and mobility increases. Many researchers have reported the improvement in the device performance due to the annealing process. Park [9] studied the effect of rapid thermal annealing on the performance of RF sputtered ZnO TFT with SiO2 dielectric. They observed improvement

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in the crystallinity and transmittance of ZnO at the annealing temperature of 300 °C. Due to this the carrier mobility and concentration was increased respectively. Also, the dielectric layer was annealed before deposition of the ZnO layer and the further improvement in the mobility and Ion/off ratio was observed. J. Park [10] investigated the influence of annealing on ZnO/SiO2 TFT

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with Ti/Pt contacts. The SiO2 and ZnO were deposited by thermal chemical vapor deposition (CVD) and RF sputtering method respectively. He observed that improvement in structural

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characteristics and hence the mobility and Ion/off ratio due to annealing. The device was giving

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best performance at the annealing temperature of 300 °C. The threshold voltage, mobility, Ion/off ratio and subthreshold slope of the TFT annealed at 300 ºC were 2.5 V, 0.8 cm 2/V-s, 106 and

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0.84 V/dec respectively. Similarly, Ahn et al. [11] fabricated ZnO-based TFT with Al2O3 dielectric. Both the dielectric and active layer was deposited using atomic layer deposition

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(ALD). The device was annealed at various temperatures. The field effect mobility was found to be best at 250 °C and was 30 cm2/V-s. Annealing improves the performance of ZnO TFT, but annealing at high temperature may have an adverse effect on its performance. Park et. al. [12] studied the effect of high-temperature annealing on In-Ga doped ZnO (IGZO) TFTs with Mo source/drain contacts. The device

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performance was found to be degrading on annealing at temperatures higher than 500⁰ C. At a temperature higher than 500⁰ C, a reaction between the Mo oxide and the IGZO layer was taking place. As a result, MoO3 and In5Mo18O28 were formed which was confirmed using XRD. Also, the formation of different Mo-based compounds resulted in the release elemental Zn atoms due

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to the decomposition of the IGZO layer. The melting temperature of Zn is only 420⁰ C, hence the released Zn atoms would evaporate if the annealing temperature is higher than 450⁰ C. It was confirmed by energy dispersive spectroscopy (EDS). Therefore the overall performance of the TFT was found to degrade at higher temperature annealing. Shin et. al. [13] reported the

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degradation of performance of IGZO TFT at higher annealing temperature. They annealed the TFT at 400, 500, 600 and 700 ⁰C. The electrical performance was found to degrade at 700 ⁰C. At this temperature, it was found that In atoms were diffusing into the IGZO/gate insulator after

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crystallization. As a result, the interfacial and bulk trap density increased that resulted in the

respectively.

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2.3 Laser annealing

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degradation of saturation mobility (μsat), subthreshold slope (S-factor) and Ion/Ioff ratio

The thermal annealing may not be suitable for plastic and flexible substrates, therefore,

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LASER annealing can be performed. Kim et al. [14] reported LASER annealed bottom gate ZnO

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TFT with SiO2 insulator. After LASER annealing, the full-width at half-maximum (FWHM) was decreased to 0.1° from 0.49° indicating an improvement in the crystalline quality of the thin film. The as-deposited TFT has mobility and threshold voltage of 0.004 cm2/V-s and 21.6 V respectively. After LASER annealing by 200 LASER pulses, the mobility increased to 5.08 cm2/V-s and threshold voltage decreased to 0.6 V. Nakata et al. [15] investigated the effect of LASER annealing on the ZnO-based TFT on the plastic substrate. The ZnO thin film was

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annealing using excimer LASER pulses with a pulse width of 25 ns. The mobility of device after annealing increased to 12 cm2/V-s. 2.4 Annealing in the presence of gases

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Annealing in the presence of different gasses also improves improving the crystallinity of the active layer. Remashan et. al. [16] investigated the effect of post-fabrication rapid thermal annealing (RTA) in the presence of N2O plasma on the performance of ZnO TFTs. The value of off-current and on/off current ratio before treatment was 2 × 10−8 A and of 3 × 103 respectively.

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The off-current and on/off current ratio value improved to obtained after RTA were improved to 10−10 A and 105, respectively, by the subsequent RTA in the presence of N2O plasma. The N2O plasma treatment resulted in the reduction of the oxygen vacancies that was confirmed by X-ray photoelectron spectroscopy analysis. The improvement in current and on/off current ratio of the

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TFTs was attributed to the reduction of oxygen vacancies at the top region of the ZnO layer. Liu

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et. al. [17] reported the increase in the grain size of ZnO channel layer from 7 to 20 nm after treatment by O2. The reduction of oxygen vacancies and improvement in crystallite size resulted

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in the improvement of on/off current ratio. Kim et. al. [18] demonstrated that annealing at a low temperature in right ambient could improve the performance of ZnO TFT. They annealed the

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ZnO TFT at 300⁰ C and 500⁰ C in air and N2 respectively. The value of threshold voltage, field-

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effect mobility and on/off current ratio of un-annealed ZnO TFT were 13.7 V, 0.024 cm2/V-s and 2× 102 respectively. The grain size was significantly found to increase after annealing at 500 ⁰C in N2 ambient. This resulted in improvement of the threshold voltage, field-effect mobility and on/off current ratio to 12.5 V, 0.047 cm2/V-s and 2× 103 respectively. 2.5 Using different deposition techniques

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The properties of ZnO thin film is highly affected by the deposition technique used. There are very fewer reports present in the literature that compares the effect of deposition techniques on the properties of ZnO thin film. Aal et al. [19] used sol-gel and thermal evaporation method for depositing ZnO thin films. They observed that ZnO thin films deposited by the sol-gel method

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had more surface roughness and larger grain size as compared to thermally evaporated ZnO films calcined at same conditions. XRD analysis revealed that the ZnO film deposited by the sol-gel method had preferred orientation along 002 plane whereas ZnO film deposited by thermal evaporation method was polycrystalline in nature with orientation along 100, 002 and 101planes

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respectively. Singh et al. [20] deposited ZnO thin films by three different techniques, i.e., sol–gel derived, thermal oxidation of pre-deposited metallic zinc (Zn), and RF sputtering method. The optical, structural, and electrical properties of the ZnO films by different deposition techniques

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were studied by using various characterization techniques and were systematically compared. They observed significant differences in optical, structural, and electrical properties of the ZnO

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films by three deposition techniques. The structural properties of ZnO films obtained by oxidation of pre-deposited zinc were much better than those obtained by RF-sputtering and sol–

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gel. The electrical and optical properties of thermally oxidized ZnO film was found to be good

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enough as compared to ZnO films by sol-gel and RF sputtering for fabrication of electronic and optoelectronic devices. There are various reports on high-performance ZnO-based TFT (with

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high field effect mobility in the range of 0.2 to 40 cm2/V-s) [21-22] with ZnO films grown by methods like RF sputtering, sol-gel, atomic layer deposition (ALD), pulsed laser deposition (PLD), etc. [23-28].

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3. High-k Dielectrics The dimensions of the MOS devices are scaled down to improve the performance. Due to the continuous scaling, the dimension of the dielectric layer has reduced to the scale of a few

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nanometers. Si-based technology is ruling the semiconductor industry, and SiO2 is being used as the dielectric layer for many years. SiO2 has low dielectric constant, and the thin layer of SiO2 tends to be leaky and degrade the devices performance. Therefore, the interest towards the high-k dielectric increased. A high-k dielectric layer has many advantages on the device performance. It

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provides a larger capacitance and hence results in less gate leakage current as compared to SiO 2 for the same thickness. Due to the high capacitance, the coupling of the gate with channel layer increases and the carrier density in the channel increases, hence the operational voltages can be reduced. High-k dielectric also results in the improvement of the stability of the device by

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reducing the gate bias stress. Besides the high quality of thin film and insulator, the quality of the interface between them also plays an important role on the device performance. A poor interface

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will increase the trap density in the active layer hence mobility, and Ion/off current ratio will

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degrade. The quality of interface can be improved by the various process like annealing, increasing the deposition temperature, etc. which will be discussed here.

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Many researchers have studied the performance of ZnO TFT with a high-k dielectric and

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have reported improvements in the characteristics as compared to ZnO with SiO2 insulator. Fortunato et al. [29] reported RF sputtered ZnO TFT at room temperature with a very high field effect mobility of 70 cm2/V-s. Silicon-oxy-nitride was used as a gate insulator. The other parameter likes Ion/off ratio, threshold voltage, and subthreshold swings were 5 × 105, 1.8 V and 0.68 V/decade respectively. This high mobility could not have been achieved by using SiO2 dielectric. Carcia et al. [30] investigated the performance of ZnO TFT with HFO2, Al2O3, HfSiOx

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and SiO2 dielectrics. The ZnO films were deposited by RF sputtering method, SiO2 was deposited by thermal oxidation, and the other insulator layers were deposited by ALD method. The value of mobility, threshold voltage and subthreshold slope of TFT with HfO2 as a dielectric deposited at 300 °C were 12.2 cm2/V-s, 2.6 V, and 0.5 V/decade respectively. The performance

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of TFT with Al2O3 as dielectric layer depended on synthesis temperature, and the best synthesis temperature was found to be 200 °C. The observed value of mobility, threshold voltage and gate leakage current were 17.6 cm2/V-s, 6 V and 0.1 nA respectively. The value of mobility and threshold voltage of TFT with SiO2 dielectric oxidized at 1000 °C was 0.3 cm2/V-s and 4.5

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cm2/V-s respectively. The value of mobility and threshold voltage of TFT with HfSiO x dielectric deposited at 400 °C was 4.5 cm2/V-s, 28.4 V, and 1.7 V respectively. The processing temperature of high-k dielectrics was low, and the performance of TFTs with these dielectrics

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was superior as compared to TFT with SiO2 dielectric. Cross et al. [31] compared the stability and performance of ZnO TFT with SiO2 and SiN dielectric respectively. The subthreshold slope,

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Ion/off ratio and the mobility were 1.06 V/decade, 1 × 105, and 0.1 to 0.25 cm2/V-s respectively for TFT with SiO2 insulators. For TFT with SiN insulator, the subthreshold slope, Ion/off ratio and the

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mobility were 2.08 V/dec, 3×104 and 0.2 to 0.7 cm2/V-s respectively. The threshold value was

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comparable and was around 5 V. The gate bias stability of TFT with SiN dielectric was found to be much better as compared to the TFT with SiO2 dielectric. Moon et al. [32] investigated the

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possibility of using high-k dielectric La2O3 as a gate insulator for ZnO TFT. ZnO and La2O3 were deposited using DC sputtering and electron cyclotron resonance-atomic layer deposition (ECR-ALD) respectively. The field effect mobility of channel, Ion/off current ratio, turn-on voltage, and subthreshold swing were 0.77 cm2/Vs, 1 × 105, −0.8 V and 1.2 V/decade, respectively. Kawamura et al. [33] reported ZnO TFT with Al2O3 dielectric. He used ALD and

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plasma-assisted ALD (PAALD) for depositing Al2O3 and ZnO layer respectively with Ti source/drain electrode. The TFT with Al2O3 dielectric deposited by PAALD and ZnO deposited at 300 °C exhibited a higher mobility of 7.2 cm2/V-s as compared to the 5.7 cm2/V-s mobility of TFT with SiO2 dielectrics. The threshold voltage shift due to gate bias stress for TFT with Al2O3

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dielectric reduced to 6 V as compared to 20 V for TFT with SiO2 dielectric. The improvement in channel mobility and stability were attributed to the presence of the interfacial layer. Zhang et al. [34] and Brox-Nilsen et al. [35] reported RF sputtered ZnO TFT at room temperature with a Ta2O3 dielectric with channel mobility greater than 50 cm2/V-s respectively. Zhang et al. [34]

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reported field effect mobility, a threshold voltage, subthreshold swing and Ion/off ratio of 60.4 cm2/V-s, 1.1 V, 23 V/decade and 1.22 × 107 respectively. The reason for high channel mobility was attributed to the fringing-electric-field effect due to the undefined active layer. The high

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performance of TFT was attributed to relatively low trap state densities in the insulator/channel interface, to the proper dielectric thickness and smooth dielectric surface respectively. Similarly,

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Brox-Nilsen et al. [35] achieved maximum field effect mobility of 103 cm2/V-s and a threshold voltage of 4 V. Recently Afouxenidis et al. [36] reported ZnO TFT with aluminum titanate

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(Al2O3.TiO2) under varying conditions. The insulator layer was deposited by spray pyrolysis

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method on ITO coated glass. The bandgap and dielectric constant of the insulator was 4.5 eV and 13 respectively. The ZnO thin film was also grown by spray pyrolysis method. The TFT showed

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excellent performance with channel mobility of 10 cm2/V-s, a threshold voltage of 10 V, subthreshold swing of 550 mV/decade and Ion/off ratio of 106. Recently Walker et al. [37] reported the low-temperature fabrication of ZnO TFT with high-k dielectrics. Al2O3, HfO2, and ZrO2 were used as dielectric respectively. The dielectric layers were deposited at 150 C using ALD process and the ZnO thin film was deposited using the RF sputtering process. ZnO films on the

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dielectrics were found to be highly oriented towards 002 plane. ZnO thin film on Al2O3 dielectric exhibited smooth surface as compared to ZnO film on HfO2, and ZrO2 respectively. The threshold voltages of ZnO TFT for Al2O3, HfO2, and ZrO2 gate dielectrics were 2.9, 3.9 and 2.7 V respectively. The ZnO TFT with HfO2 dielectric achieved highest Ion/off ratio about 4 × 106.

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The Ion/off ratio of ZnO TFT with ZrO2 dielectric was close to 106 whereas ZnO TFT with Al2O3 dielectric fell behind in the range of 3 × 105. Since all the TFTs were of the same dimension, it was concluded that gate dielectric, ZnO mobility plays a critical role in the carrier mobility. Also, the gate-dielectric interface can affect the dielectric property due to the interface states and

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trapped charges. 4. Stability of ZnO TFT

Due to the ease of fabrication, the bottom gate structure is fabricated in which the active

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layer is exposed to the environment. Due to the oxygen vacancies, the ZnO reacts with the

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ambient oxygen. Therefore, the electrical properties of ZnO thin film changes over the time and the devices are electrically unstable and unsuitable for commercial use. To rectify this problem

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steps like passivation of the active layer (for bottom gate TFT), annealing under different gasses, fabrication of top gate TFT, etc. are reported in the literature. The threshold voltage shift under

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the effect of gate bias is also a major issue that should be resolved to realize a stable ZnO-based

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TFT for commercial purpose. Nomura et al. [38] reported the effect of Y2O3, Al2O3, HfO2, and the SiO2 passivation layer

and thermal annealing on the performance of In-Ga-Zn-O TFT. The TFT with passivation layer exhibited better performance compared to unpassivated one. The performance of the TFT with Y2O3 passivation layer was found to be best. The performance was further enhanced by

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annealing at the temperature of 250 °C. The passivated TFTs was very stable against the constant current stress (CCS), negative bias stress (NBS) and negative bias light illumination stresses (NBLS). The threshold voltage shift was suppressed to -4.4 V for NBLS of 2.7 eV for 3 hours of the test. Xu et al. [39] investigated ZnO TFT passivated by the polymer layer and observed

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improvement in device performance. The hysteresis in the ID-VDS and ID-VGS curves was effectively suppressed, and also significant suppression was found in negative output conductance of the device.

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Very few reports are available on top-gate ZnO TFT till now [40-45]. In the year 2006, Lee et al. [40-41] reported top-gate ZnO TFT poly-4-vinylphenol (PVP) as gate dielectric layer. They demonstrated that their top-gate ZnO-TFT was a novel promising test device to confirm C-V results for the work function measurement of any metal electrodes. At the end of the year 2006,

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Hwang et al. [42] reported top-gate ZnO TFT with double-layer of polymer/high-k oxide.

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Adopting that top-gate ZnO TFT, a load-resistance inverter was set up and demonstrated decent static and dynamic operations at 3 V. Hirao et al. [43] reported top-gate ZnO TFT with SiNx as

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the gate insulator. AMLCDs were having an aperture ratio and pixel density comparable to those of a-Si:H TFT-LCDs are driven by ZnO TFTs using the same driving scheme of conventional

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AMLCDs.

Remashan et al. [45] investigated the N2O plasma treatment on the performance of ZnO TFT.

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The oxygen vacancies were reduced due to the N2O plasma treatment and the off current, and Ion/off ratio was significantly improved. The off current and Ion/off ratio before and after annealing were 2 × 10−8 A, 3 × 103 and 10−10 A, 105 respectively. It can be observed that these parameters have improved by almost two orders of magnitude. Kawamura et al. [46] observed the stability in the ZnO TFT after annealing at 400 ºC in the oxygen ambient. Annealing leads to

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improvement in crystallinity hence the electrical properties improved, and the oxygen ambient results in the reduction of defects that leads to an increase in the stability against bias stress. Recently Kim et al. [47] reported the effect of the mid-annealing process on the characteristics of Al-doped ZnO TFT. The annealing in oxygen ambient was performed immediately after the

bias stress and the carrier mobility of the device was improved.

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deposition of ZnO layer. The oxygen vacancies were significantly reduced hence the negative

Jin et al. [48] reported the performance of oxygen and nitrogen annealed ZnO TFT. The

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threshold voltage of the TFTs was found to increase after annealing in the air whereas it got reduced when annealed in nitrogen. The zero-bias conductivity of the annealed TFT increased to six orders of magnitude. The stability of the annealed devices was improved, and it was fond to be stable for a 25-day period in ambient air without any passivation layer.

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The stability can also be improved by doping ZnO by elements like Li, Mg, etc. Nayak et al.

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[49] investigated the effect of Li doping on the performance of solution-processed ZnO TFT. It was found that an appropriate amount of Li doping significantly reduced the background

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conductivity of ZnO films and also improved the orientation of ZnO crystallites along the c-axis. A highest field-effect mobility of 3.07 cm2 /V-s was found for the 5 at. % Li-doped ZnO TFT.

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However, 15 and 25 at. % Li-doped ZnO TFTs showed a good environmental stability of Ion/off

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ratio with reasonable field-effect mobility. Ku et al. [50] reported the Mg-doped ZnO TFT with improved electrical characteristics and thermal stability. ZnO with 6% Mg doping showed improved subthreshold swing, field effect mobility, and thermal stability. The negative shift of threshold voltage decreased, and the activation energy increased respectively. These improvements were attributed to the formation of stronger Mg-O bond in the channel layer.

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There are also reports on the improvement in the stability of ZnO TFT by depositing bilayer channels. Ahn et al. [51] reported multi-channel ZnO TFT with improved stability. The channel consists of a-HZO/ZnO/a-ZnO layers due to which the trap density significantly reduce in the channel and dielectric interface. The stability and the mobility of the device were greatly

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improved as compared to the TFT with single ZnO channel layer. Similarly Seo et al. [52] compared the performance of single layer IZO channel layer and bilayer IZO:Ga and IZO:Ga ZnO TFT. The mobility of single layer TFT was 19 cm2/V-s, but the positive gate bias stress (PBS) was very poor. The mobility of bilayer TFT was reduced to 9.9 cm2/V-s, but the PBS was

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improved. The shift in threshold voltage due to PBS in single layer TFT was 3.4 V whereas the shift in bilayer TFT was reduced to 1.7 V. This improvement was attributed to the reduction of

5. Source/drain Contacts

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oxygen vacancies.

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The metal contacts play an important role in the performance of TFT. The mobility and threshold voltage is highly influenced by the contact resistance between source/drain contact and

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channel layer. Xu et al. [53] investigated the role of Al, Ti, Sn and Cu source/drain contact on

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the performance of bottom gate ZnO TFT. The thickness of the source/drain contact was 50 nm and was deposited using a shadow mask by DC sputtering method. The channel resistance (rch)

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was found to be equal for Ti/ZnO, Al/ZnO, and Sn/ZnO TFT. For Cu/ZnO TFT, the rch was very high due to the diffusion of Cu in the ZnO channel layer. The field effect mobility and the carrier concentration were maximum for Sn/ZnO TFT and were about 13.9 cm2/V-s and 2.18×1019 cm-3 respectively. After that, the interaction between the channel and metal was studied after annealing the device at 200 ºC for 3 min. It was found that the output characteristics of Al/ZnO

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TFT and Ti/ZnO TFT were almost same as that were before annealing whereas for Sn/ZnO TFT and Ti/ZnO TFT the characteristics varied. It was concluded that the Al/ZnO and Ti/ZnO TFT exhibited better thermal stability as compared to the Sn/ZnO and Cu/ZnO TFT. The carrier concentration in Sn/ZnO TFT increased due to the diffusion of Sn in the channel layer that acted

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as a donor. Therefore, the Sn/ZnO TFT suffers a negative voltage shift. The changes in the characteristics of Cu/ZnO and Sn/ZnO on heat treatment show that these TFTs were not thermally stable. The interface between metal and semiconductor and metal element depth profile was studied using high-resolution transmission electron microscopy (HRTEM), X-ray

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photoelectron spectroscopy (XPS) and energy-dispersive X-ray (EDX) respectively. At the interface of Al/ZnO and Ti/ZnO TFT, amorphous AlOx, and TiOx were found that were responsible for the contact resistance and thermal stability of the device. No such layer was

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found at the interface of Sn/ZnO and Cu/ZnO. The TFT with Sn contact exhibited excellent performance because the diffusion of Sn atom acted as a donor, but the TFT was not thermally

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stable.

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TFT performance can also be improved by using asymmetric source and drain contacts. If the source contact is Schottky barrier contact while the drain contact is ohmic then the back injection

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of holes at the drain reduces and the off current is significantly reduced. Therefore, the device performance at low drain voltages is improved. Adl et al. [54] fabricated ZnO TFT with

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Schottky source contact. The ZnO film was deposited using spin coating method. Au and Al metal were used for depositing source and drain contact respectively. The channel mobility was 0.001 cm2/V-s. Due to the Schottky source barrier the threshold voltage was very low (-110 V). The value of the drain current Ion/off ratio was 1×103. Ma et al. [55] also investigated the performance of ZnO TFT with Au Schottky source contact and Al drain contact. The leakage

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current was in the order of 10-7. The transistors exhibit field effect mobility, Ion/off ratio and saturation voltage of 0.1 cm2/ V-s, 105 and 6 V respectively. 6. Modeling and Simulation of ZnO TFT.

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With the increase in the interest in ZnO TFT, various research groups have attempted to develop mathematical models to predict the performance of the device. Various models have been proposed for ZnO-based TFT to determine the output characteristics and other parameters like defects states, mobility, etc. These models can be used by computer-aided designs

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applications live Silvaco TCAD, Sentaurus TCAD, etc. to the study of the characteristics of ZnO TFT via simulations. In 2003, Hossain et al. [56] investigated the effect of grain boundaries on the ZnO TFT performance by simulation. A two-dimensional device simulator was used for simulation of polycrystalline ZnO TFT. Through the simulation, the mobility, and the grain size

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were calculated and hence the density of total localized trap states in the grain boundaries of ZnO

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film was determined. Takechi et al. [57] applied the exponential distribution of band tail states to describe the threshold behavior of ZnO TFT. In 2010 Redinger et al. [58] proposed a model to

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predict the lifetime of ZnO TFT. He combined the existing threshold voltage model and Levinson’s model for the current and generated a simple relation between the grain-boundary

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trap formation and the threshold-voltage shift. The effect of bias stress on the TFT current can be

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calculated by using this relation. To calculate the lifetime they calculated threshold voltage shift by the power-law model and stretched exponential model respectively. Kimura et al. [59] studied the mechanism of photo-leakage current in ZnO TFT by device simulation. The 2D simulator (ATLASTM from Silvaco-International) along with tunneling effect and carrier generation models were used to studying the leakage mechanism of the device. Similarly, Singh and Chakrabarti [60-61] fabricated the ZnO TFT by RF sputtering and sol-gel method and compared the

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experimental results with the simulated one. The simulation of the device was carried out using modeling software Atlas from Silvaco International. Energy valance (EV) model, Drift-Diffusion (DD) model (for carrier transportation), standard recombination model, Hydrodynamics (HD) model, field-dependent mobility model and Fermi-Dirac statistics (for carrier distribution) were

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used for simulations. The experimental and the simulated results were in the close agreement. Torricelli et al. [62-63] fabricated ZnO TFT by spray pyrolysis and also studied the device by simulation for the various channel length (>40 microns). The charge transport in the ZnO channel was explained by multi-charge-trapping-and- release (MTR) mechanism. By

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experimental results and simulation studies, they proposed a model to calculate the drain current. Torricelli et al. [63] also modeled short channel (<40 microns) ZnO TFT with the contact resistance. They modeled the trap distribution in the channel layer near the source/drain electrode

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by the contact resistance. Their experimental results and numerical results for long channel and short channel ZnO TFT were in the close agreements. García-Sánchez et al. [64] modified the

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model proposed by Torricelli et al. using Lambert function to calculate the drain current directly without any iterations. The results obtained by the proposed model were in the close agreement

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with the results obtained by Torricelli et al. [62].

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7. Amorphous ZnO TFT

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Hydrogenated amorphous-Si (a-Si:H) TFT is most commonly used for large area display and polycrystalline-Si (poly-Si) TFT is used for high-speed, high-resolution display. However, the low value of field-effect mobility of a-Si TFT makes it unacceptable for high-speed, highresolution displays. Poly-Si TFT has very high field-effect mobility but the crystallization of a-Si to poly-Si requires a very high-temperature processing and is a very time-consuming process that increases the cost and time of production. The high processing temperature of Si-based TFT

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makes its incompatible with cheaper and flexible substrate like glass and plastic. Also, the nonuniform electrical properties of poly-Si TFT over a large area makes it inappropriate for large area display.

The low bandgap of Si makes it sensitive to visible light; therefore, its

characteristics degrade on exposure to visible light. Hence, shielding is required that limits the

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resolution of the display [65]. One of the alternatives to achieve high efficiency and avoid high temperature is to use amorphous transparent oxides for the channels and electrodes, and fabricate TFTs at room temperature. In this regard, α-IGZO has the advantages of high transparency, high field effect mobility, uniform large area deposition by sputtering, low processing temperature of

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that supports cheaper substrate like glass and also plastics and polymers which are flexible [65]. Jeong et. al. [66] reported a-IGZO TFT with highly doped source and drain region and treated plasma, exhibited c-Si MOSFET behavior. The parasitic resistance was extracted using

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transmission line method and the value was found to be very low. There was no effect of gate overlap on the transfer characteristics. The negative and its bias dependency were decreased as

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compared to lightly doped drain MOSFET. The reason was attributed to the high doping region that extended into channel region and its doping profile gradually decreased from source and

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drain contact to channel region. The plasma induced oxygen vacancies and H doping in a-IGZO

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film was responsible for the decrease in the negative and its bias dependency. It was concluded that a-IGZO TFT with plasma exposed source and drain bulk region can be used as high

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performance switching and driving devices for various applications. Lee et. al. [67] demonstrated a a-IGZO TFT with ZrO2 gate dielectrics. The channel width and length was 240 μm and 30 μm respectively. The TFT showed a high field effect mobility and on current of 28 cm2/(V-s) and a 2.11 mA at a VGS of 10 V respectively. The threshold voltage and subthreshold swing were and 3.2 V and 0.56 V/decade respectively. This TFT exhibited a high transconductance (gm) based on

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the high gate dielectric capacitance which shows that the a-IGZO TFT with ZrO2 gate dielectric exhibits high quality and performance that makes the TFTs suitable for switching devices. Tian et. al. [68] presented a fully transparent TFT with dual-layer channel made-up of a-IGZO deposited on glass substrates at low temperature. The TFT exhibited a high on-to-off ratios of

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~108 and low subthreshold swing (SS) of less than 200 mV/decade, as compared to the singlelayer ones. Similarly, many researchers and companies like Samsung, Hitachi, AU Optronics Corporation, Dai Nippon Printing, LG electronics and many more have exhibited electronic different display devices with based on a-IGZO and are working towards the commercialization

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of it in the near future [69-78]. In November 2012 in Japan, a smart-phone with the new generation IGZO display was launched. The device exhibited a high-resolution screen with low power consumption that made it attractive to users and resulted in phenomenal sales. Since then,

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are making waves in the market.

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devices like tablets, smartphones, ultrabooks, 4K Ultra HD Display etc. with a-IGZO displays

8. Conclusion

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ZnO has emerged as an important semiconductor material for TFTs because of its excellent electrical and optical properties. The high conductivity and transparency of ZnO makes is

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suitable for channel material in TFTs. Based on all the reports, it can be said that ZnO can be a

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future material for the fabrication of low cost, high performance electronic TFTs. However, there are certain challenges. The performance ZnO TFT depends on many factors like the quality of the ZnO active layer, dielectric layer, and quality of the interface between the different layers (semiconductor, insulator, and metallic contacts). All these factors can be optimized by various methods like annealing, insertion of buffer layer, surface treatment, proper selection of insulator layer etc. Further, by using amorphous IGZO, a very high performance TFT can be fabricated.

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Displays based on a-IGZO TFTs are on the way of commercialization and very soon it will

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replace the conventional a-Si displays.

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