A survey on low power RF rectifiers efficiency for low cost energy harvesting applications

Journal Pre-proofs Regular paper A Survey on Low Power RF Rectifiers Efficiency for Low Cost Energy Harvesting Applications Humberto P. Paz, Vinicius S. Silva, Eduardo V. V. Cambero, Humberto X. Araújo, Ivan R. S. Casella, Carlos E. Capovilla PII: DOI: Reference:

S1434-8411(19)31557-2 https://doi.org/10.1016/j.aeue.2019.152963 AEUE 152963

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International Journal of Electronics and Communications

Received Date: Accepted Date:

20 June 2019 12 October 2019

Please cite this article as: H.P. Paz, V.S. Silva, E.V. V. Cambero, H.X. Araújo, I.R. S. Casella, C.E. Capovilla, A Survey on Low Power RF Rectifiers Efficiency for Low Cost Energy Harvesting Applications, International Journal of Electronics and Communications (2019), doi: https://doi.org/10.1016/j.aeue.2019.152963

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A Survey on Low Power RF Rectifiers Efficiency for Low Cost Energy Harvesting Applications Humberto P. Paza,∗, Vinicius S. Silvaa , Eduardo V. V. Camberoa , Humberto X. Ara´ ujob , Ivan R. S. Casellaa , Carlos E. Capovillaa a

Federal University of ABC, Santo Andr´e, S˜ ao Paulo, Brazil Federal University of Tocantins, Palmas, Tocantins, Brazil

b

Abstract In this paper the analysis, simulation and prototyping of radio frequency rectifier topologies for ambient energy harvesting applications are evaluated, highlighting the effects of input power levels below -10 dBm. The equivalent diode impedance model is taken into consideration for better interpreting its effects when attached to each rectifier topology. Furthermore, the output capacitance modeling and its effects over the rectifier efficiency are discussed for different capacitance types, including a radial stub. A prototype of the most prominent topology was built on a low cost FR-4 substrate for RF harvesting in the range of -10 to -20 dBm, resulting in an approximate efficiency between 40% and 25%, respectively. Keywords: Efficiency, harvesting, radial stub, radio frequency, rectifier, diode. 1. Introduction During the past recent years, the development of remote sensing networks based on wireless sensors have been linked to new integration technologies and, as a result, concerns about the device life cycle and lifetime have been increasing in importance. As a solution to increase the system lifetime and also its mobility, RF (Radio Frequency) energy harvesting has been discussed in different fronts, for example, power density [1, 2, 3, 4, 5, 6], maximum operating distance [7, 8, 9], multisine excitation [10, 11, 12, 13, 14, 15], and others. The advances in ∗

Corresponding author Email addresses: [email protected] (Humberto P. Paz ), [email protected] (Vinicius S. Silva), [email protected] (Eduardo V. V. Cambero), [email protected] (Humberto X. Ara´ ujo), [email protected] (Ivan R. S. Casella), [email protected] (Carlos E. Capovilla)

Preprint submitted to International Journal of Electronics and Communications

October 15, 2019

this area, based on an intense research effort, make RF energy harvesting a prosperous base for the development of isolated power sources independent of wires or battery. An important parcel in the development of RF energy harvesting devices is the design of the RF rectifier. It is composed by a matching network, a diode, an output low pass filter, and a load, as shown in Fig. 1. The use of low loss substrates in conjunction with high complexity rectifier topologies, with multiples diodes, increase the manufacturing price significantly [16, 17, 18]. Although the development goal of an RF rectifier is to optimize its efficiency, the manufacturing price needs to be feasible to be put into practice. Therefore, previous research made use of FR-4 substrate to decrease the circuit fabrication cost, reporting peak efficiency values around 76% for 19 dBm [19] and lower than 25% for -20 dBm [3, 4, 17, 20, 21] at 2.4 GHz.

Fig. 1: Block diagram of a rectifier.

Aiming to increase the device mobility, the use of the 2.4 GHz ISM (Industrial, Scientific, and Medical) band is a favorable option, mostly for indoor applications. Wi-Fi routers, for instance, are limited to a maximum EIRP (Effective Isotropic Radiated Power) of 20 dBm and 18 dBm for the IEEE 802.11b and IEEE 802.11g standards, respectively, with its power distributed over the signal channel bandwidth according to the modulation. However, due to the RF transmission path losses, to obtain an input power, Pin , over -10 dBm, the system needs to be located at a few centimeters from the transmitter. For this reason, it is not sufficient to increase the rectifier efficiency only for high Pin levels, as it is considered in some works related to the design of RF rectifiers [1, 8, 22, 23, 24, 25, 26]. The study and characterization of each Pin level of the RF rectifier are essential to increase its efficiency for real harvesting applications, operating at Pin levels below -10 dBm. In this context, this work aims to fill a lack in the literature, reinforcing the necessity to keep improving the RF rectifiers design, evaluating the effects of the diode impedance, the different approaches for the design of the output capacitive filter, and the rectifier topology that adequately matches ambient RF energy harvesting applications, increasing the sensi2

bility of then device. Furthermore, the system characterization is also valid for dedicated power sources, turning possible to increase the maximum power transferring distance that the system would be optimized. The article is organized as follows. Besides this introduction, in section II, the adopted RF impedance model is presented and used to represent four different commonly used commercial RF diodes. In section III, four basic rectifier topologies are introduced, and a low power optimization process is shown. At section IV, the most efficient rectifier topology is evaluated with lumped output and radial stub capacitors, describing their resulted ripples for different quality factor capacitors. In section V, a temperature analysis is performed for the most prominent rectifier topology. In section VI, the process of manufacturing the most efficient rectifier topology for low RF power levels is presented. Finally, in section VII, the main conclusions are discussed. 2. RF Impedance Model of Diodes In RF applications, the diode packaging parasitic effects have a significant impact on the diode losses [10, 27] and the reactance parcel of the rectifier input impedance, Zin , mostly due to its equivalent parasitic capacitance. As a consequence of the diode nonlinearities in addition with the package parasitic effects, it is important to develop a model to represent its impedance behavior according to the power level and operating frequency, using a smallsignal analysis [28]. As shown in Fig. 2, it can be made by adding a parallel capacitance, Cp , and a series inductance, Ls , to the diode equivalent model, according to [28, 29, 30]. In Fig. 2, Rs is the internal series resistance, and it is constant over the frequency and input power excursion, but the junction resistance, Rj , and junction capacitance, Cj , are dependent of the diode voltage, Vd , and current, Id , as expressed in Eq. (1) and Eq (2).

3

Fig. 2: Equivalent small signal diode model with package parasitics.

8.331 × 10−5 nT Is + Id

Rj =

(1)

Cj0 im Cj = h 1 − VVdj

(2)

The Rj can be determined by Eq. (1), and Cj by Eq (2), where Vj is the junction voltage, Cjo is the zero voltage junction capacitance, m is the grading coefficient, Is the saturation current, n the ideal factor, and T is the temperature coefficient in Kelvin. In these equations only Rj is not directly related to Vd . So, as Id describes the diode current, substituting Eq. (3) in Eq. (1) and applying a Taylor expansion at the exponential (truncating it at the third term), the direct relation between Rj and Vd can be expressed by Eq. (4), since the proposed analysis considers only low voltages over the diode. h Vd i Id = Is e nVt − 1

−5

Rj = 8.33 × 10

nT Is−1

(3)

  1 Vd2 nVt 1 − Vd + 2

(4)

In this way, the diode impedance, Zd , as a function of the angular frequency, w, can be represented by: 

1 Zd (w) = + jwCp 1 −1 ((jwCj + Rj ) + Rs + jwLs )−1

−1 (5)

When the diode is reversely polarized, Rj increases due to the Vd negative first order term presented in Eq. (4). This analysis is important to describe Zd during the whole signal 4

period since, for the direct polarized operating point, Rj has an opposite behavior, assuming that Vd is a composition of the anode sinusoidal voltage, Vin , minus the cathode output DC (Direct Current) voltage, Vo . Hence, for the proposed process, four different commercial diodes commonly used for RF applications are selected (SMS7630, SMS7621, HSM282, and HSM286). The diode parameters are presented in Table 1, according to their manufactures. These diodes operate over -10 dBm and at least at 3 GHz, fitting the input power range and the 2.4 GHz band proposed for analysis. Table 1: Diode parameters for impedance analysis. Diode

SMS7630

SMS7621

HSM282

HSM286

Is (uA)

5

0.04

0.022

0.05

Rs (Ohm)

20

12

6

6

Cjo (pF)

0.14

0.1

0.7

0.18

Vj (V)

0.34

0.51

0.65

0.65

M

0.4

0.35

0.5

0.5

n

1.05

1.05

1.08

1.08

Bv (V)

2

3

15

7

Package

079LF

079LF

SOT-23

SOT-23

Cp (pF)

0.16

0.16

0.08

0.08

Ls (nF)

0.8

0.8

2

2

Computing |Zd | for each diode at 300 K and at 2.45 GHz, it is possible to determine the diode threshold voltage, Vth , and the behavior of |Zd | when the component is forward and reversely polarized. According to Fig. 3, the diode that better fits low power levels is the SMS7630, and its choice can be justified by its values of forward and reverse polarized |Zd |. When forward polarized, the SMS7630 reaches earlier Vth , around 0.15 V, which is similar to [28]. Even though the HSM282 has the lowest |Zd | for positive voltages lower than the Vth of the SMS7630, it has a very low reverse impedance, and this factor decreases its efficiency severely due to the reverse leakage current.

5

Fig. 3: |Zd | as a function of Vd .

Therefore, as the SMS7630 results in a satisfactory impedance behavior, it is essential to indicate the temperature impact over |Zd |, since Is is directly dependent of T due to intrinsic characteristics of the semiconductor [31, 32], as illustrated by Eq. (6), where To is 300 K [33], Io is the saturation current measured at To , and ψ is the energy gap (0.69 for the SMS7630). The |Zd | is directly dependent on the temperature changes over Rj . Consequently, an increase of T reduces the Vth , and the opposite behavior is observed when T decreases, as shown in Fig. 4.

Is = Io

 T  N2 To

4

e−ψ1.2×10

1 T

− T1




o

(6)

Fig. 4: |Zd | as a function of Vd , varying the temperature coefficient.

Furthermore, the rectifier efficiency depends on the parameter Bv , the maximum reverse 6

voltage over the diode, presented in Table 1. If Vd < Bv , the efficiency can be significantly reduced. As the maximum value of Vd depends on the rectifier topology and the number of diodes employed, four different rectifier topologies will be analyzed in the next section. 3. Comparison of Analyzed Topologies The aim of this section is to analyze the efficiency of four different rectifier topologies and determine the more adequate suitable for RF energy harvesting applications for low Pin levels. The topologies chosen in this analysis are the series rectifier topology [2, 29, 34, 35], shunt rectifier topology [23, 36, 37, 38], doubler rectifier topology [10, 11, 39, 40, 41], and symmetric rectifier topology [1, 42, 43, 44] due to their extensive use in rectifiers modeling. Higher order voltage multipliers are not included in this analysis due to their increased component number and diminished efficiency [3, 30, 45]. The input source of each RF rectifier is represented by the Th´evenin equivalent circuit with the voltage source defined by vIN and a 50 Ω series resistance, Zs . Each rectifier topology is composed by at least one of the following components: transmission line, Zline ; diode, D; output capacitive filter, Co ; and load, Rl . The output voltage over Rl is defined by vO . The series rectifier topology is shown in Fig. 5. The diode ideally conducts during the positive half cycle of the input signal, but to guarantee this characteristic in an RF rectifier, a DC short circuit has to be added at the diode anode. Its purpose is to eliminate the charge accumulation that can be caused by RF sources connected to the rectifier. Diverging from the series rectifier topology, the shunt rectifier topology presented in Fig. 6 requires a series DC block connected to its input to avoid a reverse current flow from its output to the RF source.

Fig. 5: Series rectifier topology.

7

Fig. 6: Shunt rectifier topology.

In the case of the symmetric rectifier topology of Fig. 7, it can be analyzed as a twobranch series rectifier, composed by Zline1 , D1 , and Co1 during the positive half cycle, and by Zline2 , D2 , and Co2 during the negative half cycle. Assuming a similar insight for the voltage doubler of Fig. 8, the circuit can be related to the junction of a series and a shunt rectifier. It is important to notice that only for the voltage doubler, it is not necessary to apply the DC short circuit at the input, and that the capacitor C1 works as a charge holder during the negative half cycle in series with D2 , and as a charge pumper during the positive half cycle in series with D1 . In these two topologies, both diodes, D1 and D2 , operate in opposites half cycles, increasing the operating period of the rectifier. However, this increase in the conducting cycle does not represent an improvement of the output power. It can be demonstrated by simulating the output efficiency over a range of Pin , using the Harmonic Balance (HB) simulation and following the efficiency calculus, ηRF −DC , presented in Eq. (7), for Vo , the DC portion of vO .

Fig. 7: Symmetric rectifier topology.

8

Fig. 8: Doubler rectifier topology.

ηRF −DC =

Vo2 Pin Rl

(7)

The simulation results obtained through the software ADS (Advanced Design System from Keysight) at 300 K and varying Pin from -20 dBm to -10 dBm, as presented in Fig. 9 and Fig. 10, show the topologies evaluation for an ideal LC input matching network, Zline , set to 50 Ω using the input return loss parameter, S11 , through the LSSP (Large Signal SParameters) simulation according to the desired Pin level. Furthermore, Rl is set to reach the maximum efficiency for each topology, using a 100 pF output capacitor and the SMS7630079LF diode since it presented the optimized |Zd |. For the lower input power level, -20 dBm in Fig. 9, the series and shunt rectifier topologies present similar efficiencies, the same pattern that is presented when comparing the symmetric and doubler rectifier topologies. However, as presented in Fig. 10 for -10 dBm, the dual diode rectifier topologies increase their efficiencies at a higher rate if compared to single diode topologies when Pin increases.

Fig. 9: Efficiency of rectifier topologies when optimized for -20 dBm.

9

Fig. 10: Efficiency of rectifier topologies when optimized for -10dBm.

Furthermore, the diode Bv voltage effect is highlighted at high Pin levels. In Fig. 9, the efficiency curves suffer a monotonic decrease that is intensified for Pin levels over -5 dBm, considering the one diode topologies. Similarly, in Fig. 10 a similar monotonic behavior is seen, and it happens for a lower Pin level for the one diode topologies. For this reason, the advantage of complex topologies for Pin levels over -10 dBm is based on the total reverse voltage over each diode, a factor that is divided at least by two in doubler and symmetric rectifier topologies. It turns out that this factor incentives the use of these topologies for systems that require high Rl values which increase Vo . 4. Output Capacitance Impact All the rectifier topologies analyzed use an ideal output capacitance, however depending on the capacitor physical dimensions, material, and resulting capacitance, the design can present a shift in the operating frequency and a decrease in the efficiency according to the quality factor, Q. The Q factor results in a resistance in parallel with Rl , composing the total output load, Rltotal , described by Eq. (8). Furthermore, to assemble a precise simulation, the capacitor S-Parameter is also necessary, since the resonant frequency, which changes the linear decreasing behavior of its reactance over the frequency to an inductive behavior, is mostly caused by parasitic effects.

10

Rltotal (w) = 

QRl wCo Q wCo

+ Rl



(8)

Normally, output capacitive filters for ambient RF energy harvesting are limited to Co ≤ 100pF [3, 10, 34, 46, 47]. For lower capacitance values the Q increases, but at the same time, the output voltage ripple also increases. One solution for this problem is to use an equivalent microstrip stub [19, 42, 23, 48, 49, 50], increasing the final board size but decreasing manufacture component cost. To confirm this hypothesis, the series rectifier topology is simulated using an ideal capacitor, a lumped low and high Q capacitor, and a radial stub capacitor designed for a low cost FR-4 substrate (r = 4.5, h = 1.6 mm and tanδ = 0.02). To maintain the same parameters used to simulate the rectifier in the last section, all components are set or chosen to 100 pF, and the matching network is also optimized for each case. 4.1. Lumped Capacitor The capacitors are chosen according to its series resonance frequency since the Q is also degraded at this point. For this analysis the multilayer capacitors from ATCeramis 530L and 600F101 are chosen, the 530L has a series resonance frequency close to 18 GHz while the 600F101 the series resonance is close to 2 GHz. 4.2. Radial Stub Capacitor The equation that represents the equivalent impedance of a radial stub, Zc , contains the first and second order Bessel function and it is too much complex for optimization processes, so a reduced version developed by [51] is used and extrapolated to an equivalent ADS microstrip radial stub, as it can be seen in Eq. (9), where β is the phase constant, Eef f is the effective dielectric constant, h is the dielectric thickness, Win is the radial stub input width, L is its length and θ its aperture angle.     sin( 2θ ) W2in j120πhβ 1 2 Zc = − p ln + + L 2 (βL)2 θ Eef f

(9)

Assuming a FR-4 substrate, for a 100 pF radial stub with θ = 45° and W in = 2 mm, its length is equal to L = 11.52 mm. 11

4.3. Results for Different Capacitors

Fig. 11: Efficiency of the series rectifier at 2.45 GHz for different capacitors.

In Fig. 11, the simulated results obtained for the series rectifier optimized for different output capacitors at -20 dBm is presented. Even though the results presented seem similar to the ideal capacitor, radial stub, and the 530L ATC capacitor, the ripple value presented by each component is not the same. For the ATC 600F101, the efficiency is decreased by more than 3%. The radial stub, 530L, and 600F101 ripples are respectively 1.5%, 1%, and 10.7%, and according to these results, the radial stub presents the lowest discrepancy if compared to the ideal capacitor, showing that its Q is high and its influence can be disregarded. 5. Temperature Effect The diode impedance variation due to the temperature, described in the second section, presented a decrease in the Vth voltage as T increases, mostly due to the diode Rj . However, this variation is not necessarily converted in an efficiency increase since the rectifier impedance match is totally dependent of the diode impedance [52]. In order to verify the effects of the T parameter variation, the series rectifier with the output radial stub capacitor is simulated for different T values, as shown in Fig. 10. The results define a decrease in the rectifier efficiency for all T values different from the design goal (300 K). The results are significant to illustrate that the circuit is best matched for the design temperature, even though the Vth changes are inversely proportional to T . 12

Fig. 12: Efficiency of the series rectifier as a function of Pin for different temperatures.

6. Radial Stub Series Rectifier 6.1. Design To endorse the results, a series rectifier topology with an output radial stub capacitor is fabricated over a FR-4 substrate matched for 50 Ω with a microstrip transmission line, using the SMS7630-079LF diode. The rectifier is designed to best perform at 300 K. The proposed layout for the matching network is shown in Fig. 13, and it is basically composed by an open radial and a grounded rectangular stub with dimensions: W1 = 3 mm, W2 = 1.9 mm, W3 = 0.5 mm, Win1 = 3 mm, L1 = 16 mm, L2 = 10.5 mm, L3 = 19.1 mm, Lr1 = 7.9 mm and θ2 = 50°. The grounded stub works as a ground path to eliminate the anode DC component at the diode, as previously discussed, and it is based on a thick microstrip line to obtain a high inductive pattern. The input radial stub is used to increase the rectifier matching bandwidth. Furthermore, a rectangular 50 Ω line is added to the input network to settle the input female SMA (SubMiniature Version A) connector, but its length can be decreased depending on the connector choice or even extinguished for an antenna coupled directly to the rectifier design, tending to increase the efficiency. The radial stub capacitive filter has the highest efficiency result, though it still causes a low voltage ripple at the output. So, a choke inductor is added in series with Rl . The radial stub capacitance layout is presented in Fig. 14, and its dimensions optimized through the LSSP simulation are: θ2 = 53.2°, Win2 = 5.4 mm, and Lr2 = 10.8 mm. The dimensions of 13

Fig. 13: Layout of the series rectifier matching network.

the interconnection between the diode and the radial stub are: L4 = 10 mm, and W4 = 1.1 mm.

Fig. 14: Output interconnections and output radial stub filter dimensions of the series rectifier.

The manufactured board is presented in Fig. 15 with a 3.3 kΩ SMD (Surface Mount Device) output load that closely matches the maximum output efficiency point.

Fig. 15: The series rectifier prototype.

14

6.2. Results The Zline and Co are optimized through ADS simulation using the S11 and Vo , obtaining the maximum power point. This analysis is obtained using the LSSP and HB simulations. According to this perspective, the S11 has to be the first physical measurement done to prove the effectiveness of the development process. In Fig. 16, the S11 parameters are presented based on simulations and measurements using a Rohde & Schwarz ZVB8 Network Analyzer. Although there is a slight shifting in the results, the measured and simulated depths are matched for the designed Pin level (-20 dBm).

Fig. 16: Input return losses of the series rectifier.

In the next analysis, the Agilent N931A signal generator is connected to the rectifier, and the output voltage measurements are done using the DMM4040 Tektronix multimeter to calculate the series rectifier efficiency. The results obtained varying the input signal frequency for three different Pin levels are shown in Fig. 17. Considering that the efficiency of the rectifier is limited by the Zline losses and mismatch when compared to the topology evaluated in section III, the decrease in the peak efficiency value of the prototype is within an expected range for a low cost FR-4 substrate. In Fig. 17, the minimum efficiency value for the series rectifier at 2.4 GHz is around 20 %, but it reaches a maximum value higher than 25 % for 2.5 GHz. Another important aspect that can be seen in Fig. 17 is the rectifier efficiency increasing rate according to Pin . This factor is higher from -20 dBm to -10 dBm due to the impedance 15

match in the analyzed bandwidth, as shown in Fig. 16. Furthermore, the maximum efficiency point is shifted to higher frequencies, as it was expected due to the S11 parameter, but for the design Pin level, this maximum is inside the 2.4 GHz ISM band.

Fig. 17: Efficiency of the series rectifier as a function of frequency for different Pin levels.

The simulated and measured rectifier efficiencies as a function of Pin are presented at Fig. 18, despite the maximum efficiency point being shifted, the rectifier reaches more than 40 % of efficiency for 2.5 GHz at -10 dBm and more than 30 % for 2.45 GHz at the same Pin level. For the simulated results, the efficiency starts to decrease significantly around -5 dBm for both frequencies, which is expected due to the Bv factor. However, for the measured results, the efficiency gets relatively stable for Pin levels from -5 dBm to 0 dBm. This discrepancy is related to the Bv factor estimated by the manufacturer, and any Bv variation is associated with a squared efficiency error due to the Eq (7) quadratic Vo term.

16

Fig. 18: Efficiency of the series rectifier for different Pin levels at 2.45 and 2.5 GHz.

7. Conclusion In this work, the efficiency analysis of different low power RF rectifier topologies has been performed, pointing important aspects of the circuit as the diode choice, topology, and output filter interference on the efficiency. Four diodes were presented, and their threshold voltages and impedances were discussed, presenting the SMS7630 as the best diode for RF energy harvesting applications. Furthermore, the performance analysis of four rectifier topologies was presented based on a low input power level premise from -20 dBm to -10 dBm, and the single diode series topology was described as the most efficient. The output capacitance of the rectifier is also analyzed, comparing the use of lumped capacitors with capacitive radial stubs, and the effectiveness of the radial stub capacitor is presented as a viable option to overcome lumped capacitance problems and to decrease fabrication costs, as it is shown in the prototype developed, where the efficiency reached satisfactory values over 25 % and 40 % for -20 dBm and -10 dBm, respectively. Acknowledgment This document is a result of the research project funded by the Brazilian National Council for Scientific and Technological Development (CNPq) and Coordination for the Improvement of Higher Education Personnel (CAPES).

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Declaration of interests ☒ The authors declare that they have no known competing financial interests or personal relationships that could have appeared to influence the work reported in this paper. ☐The authors declare the following financial interests/personal relationships which may be considered as potential competing interests: