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A switched priority scheduling mechanism for ATM switches with multi-class output buffers
Computer Networks 35 (2001) 203±221
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A switched priority scheduling mechanism for ATM switches with multi-class output buers Z.G. Li, X.J. Yuan, C.Y. Wen *, B.H. Soong School of Electrical and Electronic Engineering, Nanyang Technological University, Nanyang Avenue, Singapore 639798, Singapore Received 10 February 2000; received in revised form 29 May 2000; accepted 31 July 2000 Responsible Editor: H.L. Truong
Abstract In this paper, we propose a switched priority scheduling mechanism for an Asynchronous Transfer Mode (ATM) switch with multi-class output buers. The switched priority scheduling mechanism is composed of a model-based linear controller, a heuristic nonlinear controller and the corresponding switching law of the controllers. The nonlinear controller is ®rst applied to bring each class buer into a small neighborhood of its operating point such that the linear controller can be used. The linear controller is then used to ensure that each buer occupancy converges to its desired operating point. The service rate of each class buer is periodically computed and dynamically adjusted. We derive the design formulae of the control mechanism such that each buer occupancy globally converges to its desired operating point related to quality-of-service requirements. Ó 2001 Elsevier Science B.V. All rights reserved. Keywords: Asynchronous transfer mode; Switched priority scheduling mechanism; Global convergence; Multi-class; Analysis
1. Introduction ATM technology is developed to integrate various services into future high-speed networks. It can support real-time service that allows users to transmit information with the guarantee of quality-of-service (QoS). To provide dierent types of service quality, ATM Forum has de®ned four classes of services for various trac, namely Constant Bit Rate, Variable Bit Rate, available bit rate (ABR) and unspeci®ed bit rate [4]. Among these, the ABR service is considered the best-eort trac. When trac sources have equal priority and equivalent QoS requirements, a simple and high-speed scheduling method, ®rst-in ®rst-out (FIFO), is a proper solution. However, for packet-switching networks having a separate output buer associated with each service class, some other scheduling algorithms, together with call admission control (CAC), are used to provide the guaranteed service to each class with various QoS requirements. Among these scheduling algorithms, Generalized Processor Sharing (GPS) algorithm and its varied versions have been designed to ensure fair bandwidth share of
*
Corresponding author. Tel.: +65-790-4947; fax: +65-792-0415. E-mail address: [email protected] (C.Y. Wen).
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each class [7,8]. Recently, Shim et al. [9] proposed a model-based priority scheduling algorithm for ATM switches with multi-class output buers corresponding to each outgoing link. However, the method proposed in [9] can only be used at a neighborhood of the operating point. In practice, it is dicult to ensure that the initial state of each class buer is in the neighborhood. This implies that this method cannot be globally used. Thus, it is necessary to design a simple algorithm, which can be globally used, to ensure QoS requirements of each class buer. The major motivation of this paper is to present such a method. As far as algorithms for ATM switches are designed, there generally exist two types of methods. One is heuristic [1,3,12] and the other is model-based [5,2,9]. The ®rst method can be widely used. But there does not exist any mathematical analysis tool to strictly prove the convergence except some qualitative analysis tools to illustrate the trend. Thus, the performance cannot be rigorously analyzed, especially when the system is operated at a neighborhood of the corresponding operating point, and therefore it can only be demonstrated by a great number of simulations. Although the second method can be used to achieve the objectives and there exist many eective design methods when the system is at a neighborhood of the operating point [9,5,2], it is only possible to establish an exact model for a switch by using a ¯uid-¯ow trac model [2]. To model the dynamics of a complex network, many restrictive requirements must be imposed on the network. These requirements limit the application of this method. Thus, this method can only be used for some ideal cases. Although these two methods have their own disadvantages, it is a nice idea to combine them together to design some eective algorithms. In this paper, we propose a switched priority scheduling mechanism for an ATM switch with multi-class output buers in which some ideas motivated from the control ®eld are incorporated. The switched priority scheduling mechanism is composed of a model-based linear controller, a heuristic nonlinear controller and the corresponding switching law of the two controllers. Although the convergence speed of the linear controller is very fast, the linear controller can only work in a small vicinity of the operating point. Note that the nonlinear controller can globally bring the system to the vicinity of the operating point such that the linear controller can work. This implies that the switched controller can work globally. Moreover, the convergence speed of the nonlinear controller is very slow although it can be used globally. To improve the convergence speed, we use the switched controller rather than the nonlinear controller. Generally, the dynamics of each class buer can only be modelled by a complex nonlinear model and there does not exist any eective method for the design of such a nonlinear model. However, a heuristic nonlinear controller can be designed. The heuristic nonlinear controller is ®rst used to bring each class buer into a small vicinity of its operating point, where the dynamic of the switch can be described by a linear model. A linear controller is designed based on the model and then used to ensure that each class buer occupancy converges to its desired operating point related to QoS requirement [9]. Our switched mechanism can be used in the whole state space instead of only in the neighborhood of the operating point. The remainder of the paper is organized as follows. The system models are described in detail in the following section. The switched priority scheduling mechanism is proposed in Section 3. Section 4 contains the analysis of the proposed mechanism. Its eciency is illustrated through simulations in Section 5. Finally, some concluding remarks are given in Section 6. 2. The system models An ATM switch studied in this paper is connected to an adjacent switch by two links: an outgoing link and an incoming link. The only outgoing link has a FIFO buer associated with each priority class. A trac source is classi®ed by its priority and we assume that trac sources of each priority class have the same QoS requirements. Let L denote the total number of all classes of trac sources and xi t denote the number of cells occupied in the ith class buer at time t. From the ¯uid-¯ow trac model [2], we have
Z.G. Li et al. / Computer Networks 35 (2001) 203±221
dxi t dt
fi t ÿ ui t=T ; maxf0; fi t ÿ ui t=T g;
xi t > 0; xi t 0;
205
1
where fi t is the arrival cell rate (cells/T ) and ui t is the service cell rate (cells/T ) of the ith class buer at time t and T is the updating period of the service rates. In this paper, we suppose that an outgoing link has transmission capacity of C (cells/T). Each outgoing link has a scheduler that monitors periodically the buer occupancy level and computes service rate of each class buer. The service rate of the ®rst class buer is ®rst computed based on the information available at that time. Subsequently, the service rate of the i 1th class buer is computed i 1; 2; . . . ; L ÿ 1 based on the information including the computed service rate of all higher class buers. In other words, based on the information available at time nT, the new service rates are computed in sequence during the time duration Tc which equals to computation time of the lowest priority class service rate. In our mechanism, the newly computed service rates are applied at time n 1T rather than at time nT Tc as in [9]. Since the buer occupancies are observed and the service rates are newly computed every T s, the continuous-time model (1) can be converted into the following discrete-time model with the slot duration of T: xi n 1 maxf0; xi n fi n ÿ ui n ÿ 1g;
Fig. 1. Input rates.
2
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where fi n and ui n are the amounts of cells that arrive and depart at the ith class buer during the duration n; n 1, respectively, and xi n is the number of cells occupied in the ith class buer at time n. The objective. The objective of this paper is to design a scheduling algorithm such that each class buer occupancy globally approaches its operating point. To achieve this objective, we need the following assumptions. Assumption 1. Suppose that there exists an n~1 such that jfi n 1 ÿ fi nj 6 ri jfi n ÿ fi n ÿ 1j
8n P n~1 ;
3
where 0 6 ri < 1. In other words, fi n is convergent. The convergence of fi n has been well studied in [11,1,10]. Assumption 2. Suppose that di < lim fi n < C^i ;
4
n!1
where di is the minimum service rate that has to be allocated to the ith class buer and
Fig. 2. Service rates with ad1 ad2 ad3 0:05.
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C^i C ÿ
L X ji1
dj ÿ
iÿ1 X j1
lim fj n:
n!1
207
5
Assumption 3. Suppose that L X j1
lim fj n Target rate;
n!1
6
where Target rate qC with q 2 0:95; 0:985 in [4,12]. Remark 1. Eqs. (3), (4) and (6) are necessary conditions for all class buers to be stable. Eqs. (3), (4) and (6) imply that the source can be stablized within di ; C^i . Remark 2. In practice, the input fi n is always changing. In other words, Eq. (3) does not always hold. However, we can require (3) to hold true within a large enough interval such that each class buer occupancy can approach a small vicinity of its operating point. This requirement is quite reasonable. In fact, if
Fig. 3. System behaviour with ad1 ad2 ad3 0:05.
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fi n changes rapidly and largely, there does not exist any algorithm which can be used to stabilize these buers. For simplicity, we suppose that (3) always holds in this paper. The case that (3) holds for a large enough interval can be analyzed similarly. 3. The switched scheduling mechanism The switched priority scheduling mechanism is composed of a model-based linear controller, a heuristic nonlinear controller and the corresponding switching law of the controllers. We shall ®rst present these two controllers. Generally, the dynamics of each class buer switch can only be modelled by a complex nonlinear model of form (2). Although there exists such a model, there does not exist any eective method to design a controller for such a system. Thus, we use a heuristic nonlinear controller. If xi n > xdi with xdi being the desired ith class buer occupancy, then ui n should be increased till xi is decreased. Otherwise, ui n must be decreased till xi is increased. This is the main idea of the heuristic nonlinear controller and the nonlinear controller is of the following form:
Fig. 4. Service rates with ad1 ad2 ad3 0:5.
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ui n
8 < maxfdi ; minfCi ; ui n ÿ 1gg :
maxfdi ; minfCi ; ui n ÿ 11 adi xi n ÿ xdi =xdi gg
xdi P xi n > xi n ÿ 1 or xdi 6 xi n < xi n ÿ 1; otherwise;
209
7
where i 1; 2; . . . ; L, adi 1 6 i 6 L are adjustable parameters, and Ci is the maximum allowable service rate of the ith class buer and it is de®ned as follows: Ci C ÿ
L X ji1
dj ÿ
iÿ1 X
uj n:
8
j1
To ensure the maximum tolerable time delay given as QoS requirement, xdi can be obtained as follows: xdi di MTDi , where MTDi is the maximum tolerable time delay of the ith class [9]. Remark 3. To reduce the computation, we can use 1 adi ÿ 2l x d i
1 2l
instead of adi =xdi in (7) where
is minimized.
Fig. 5. System behaviour with ad1 ad2 ad3 0:5.
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Remark 4. Note that ui n is not adjusted in the cases where xdi P xi n > xi n ÿ 1 or xdi 6 xi n < xi n ÿ 1. This is very important and it can ensure the adjustment of each service rate to be smooth and each service rate to approach a small vicinity of its corresponding operating point. The above nonlinear controller will bring each class buer into a small vicinity of its operating point xdi ; u0i with the constraints that di < u0i < Ci and xdi > 0. This will be shown in detail in the next section. In this small neighborhood, (2) can be represented by the following linear model: xi n 1 xi n fi n ÿ ui n ÿ 1:
9
In this case, a linear controller can be used to ensure that each class buer occupancy converges to its desired operating point related to QoS requirement. The linear controller is of the following form: ui n 1 2a xi n ÿ xdi ÿ 1 a xi n ÿ 1 ÿ xdi 1 aui n ÿ 2 ÿ aui n ÿ 1;
10
where 0 < a 6 1. If a 1, then the above linear controller is in an optimal form in terms of convergence speed of the linear controller proposed in [9] in the case that Tc T .
Fig. 6. Service rates with ad1 ad2 ad3 0:03.
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Remark 5. From the point of computation, two best choices of a are 0.5 and 1. We shall now de®ne the switching law of the controllers. Suppose that the nonlinear controller is used currently. The linear controller will be switched to if the following three inequalities are satis®ed: jfi n ÿ 1 ÿ fi n ÿ 2j 6 b1 ;
11
jui n ÿ 1 ÿ fi nj 6 b1 ;
12
xdi j 6 b2 ;
13
jxi n ÿ
where b1 and b2 are two adjustable positive parameters which depend on a. The function of b1 and b2 is to ensure that each class buer is in a small vicinity of its operating point xdi ; u0i . Note that the convergence speed of the linear controller is quicker than that of the nonlinear controller, so b1 and b2 should be set as large as possible so that the linear controller can be used as early as possible. Suppose that the linear controller is used currently. The nonlinear controller will be switched to if there exists an i such that the calculated service rate ui n > Ci or ui n < di .
Fig. 7. System behaviour with ad1 ad2 ad3 0:03.
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Remark 6. With the condition that xdi > 0, it is easier to choose the parameters b1 , b2 and a. If the desired xdi is zero in practice, we can let xdi be a small positive number. Remark 7. Our switched priority scheduling mechanism can be globally used and it can ensure that each class buer occupancy globally converges to its operating point, instead of only in a neighborhood of the operating point.
4. Analysis of the proposed mechanism In this section, we shall ®rst use some qualitative method to analyze the heuristic nonlinear controller. Observation 1. Any initial state xi 0 can be brought into a small vicinity of its operating point under the control of the heuristic nonlinear controller. We shall use some qualitative descriptions to analyze it. We consider the following two cases.
Fig. 8. Input rates.
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Case 1. There exists an n0 such that xi n0 > xdi . There are two situations. Situation 1. We consider the following two possible cases. Case (a). xid < xi n0 1 < xi n0 . It follows that ui n0 ÿ 1 > fi n0 . This implies that the current service rates can work well if the input rates does not increase in the next period. Since we do not know whether fi n0 1 will be increased or decreased, ui n0 is not adjusted. This idea has also been used in the design of linear systems with communication constraints [6]. If it happens that fi n0 1 6 fi n0 , then xi n0 2 will continue to decrease. Case (b). xi n0 1 > xi n0 > xdi . It can be shown that ui n0 ÿ 1 < fi n0 . Note that from (7) d d xi n0 1 ÿ xi 14 ui n0 1 ai > ui n0 : xdi Using (7), we have ui n0 1 > ui n0 : This implies that ui n will be increased until xi n 6 xdi or ui n Ci . Note also that xi n will be decreased until xi n 6 xdi under the control of u l Ci l P n. Thus, xi n will be less than xdi after some time.
Fig. 9. Service rates with ad1 ad2 ad3 0:05.
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Situation 2. xi n0 1 < xdi . This implies that the service rate is too large and it needs to be reduced. Note that in this situation, (14) becomes d d xi n0 1 ÿ xi < ui n0 : ui n0 1 ai xdi Using (7), we have ui n0 1 < ui n0 : This implies that ui n will be decreased until xi n P xdi or ui n di . Note also that xi n will be increased till xi n P xdi under the control of ui l di l P n. Thus, xi n will be greater than xdi after some time. Case 2. There exists an n0 such that xi n0 < xdi . The proof is similar to that of Case 1 by using qualitative descriptions. Therefore, nonlinear controller (7) will bring each class buer into a small vicinity of the corresponding operating point. Since the ®rst class buer has the highest priority, it will be ®rst brought into a small vicinity of its operating point. Similarly, the ith class buer will be the ith one being brought into a small vicinity of its operating point i 2; . . . ; L. This will be shown in detail in next section via simulations.
Fig. 10. System behaviour with ad1 ad2 ad3 0:05.
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215
Remark 8. The above analysis will be veri®ed by simulations in the next section. We shall now analyze the model-based linear controller. Proposition 1. Suppose that Assumptions 1±3 are satisfied. Then the operating point can be reached asymptotically under the control of the model-based linear controller if the linear controller is always used, that is, di < ui n < Ci hold for all n P n1 > n~1 , where ui n is defined in (10) and n1 is the starting time of linear controller. Proof. From (9) and (10), we obtain xi n 1 xi n fi n ÿ ui n ÿ 1 xi n fi n ÿ 1 2axi n ÿ 1 1 axi n ÿ 2 ÿ 1 aui n ÿ 3 aui n ÿ 2 axdi : Note that xi n xi n ÿ 1 fi n ÿ 1 ÿ ui n ÿ 2; xi n ÿ 1 xi n ÿ 2 fi n ÿ 2 ÿ ui n ÿ 3:
Fig. 11. Service rates with ad1 ad2 ad3 0:05; b1 0:65; b2 1:25; r1 r2 r3 0:25; a 1 .
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It follows that jxi n 1 ÿ xdi j 6 jfi n afi n ÿ 1 ÿ 1 afi n ÿ 2j 1 ÿ ajxi n ÿ xdi j 6 jfi n ÿ fi n ÿ 1j 1 ajfi n ÿ 1 ÿ fi n ÿ 2j 1 ÿ ajxi n ÿ xdi j 6 1 a ri jfi n ÿ 1 ÿ fi n ÿ 2j 1 ÿ ajxi n ÿ xdi j 6 1 a ri rinÿn1 jfi n1 ÿ 1 ÿ fi n1 ÿ 2j 1 ÿ ajxi n ÿ xdi j 6 1 a ri rinÿn1 1 ÿ a 1 a ri rinÿ1ÿn1 jfi n1 ÿ 1 ÿ fi n1 ÿ 2j 2
1 ÿ a jxi n ÿ 1 ÿ xdi j 6 nÿn1 1
6 1 ÿ a
jxi n1 ÿ xdi j nÿn1
1 a ri rinÿn1 1 ÿ arinÿ1ÿn1 1 ÿ a 6 1 ÿ anÿn1 1 jxi n1 ÿ xdi j 1 a ri
jfi n1 ÿ 1 ÿ fi n1 ÿ 2j
n1ÿn1
1 ÿ a ÿ rin1ÿn1 jfi n1 ÿ 1 ÿ fi n1 ÿ 2j: 1 ÿ a ÿ ri
Fig. 12. System behaviour with ad1 ad2 ad3 0:05; b1 0:65; b2 1:25; r1 r2 r3 0:25; a 1.
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Note that 0 6 ri < 1;
0 6 1 ÿ a < 1:
Thus lim jxi n 1 ÿ xdi j 0:
n!1
This implies that lim xi n xdi :
n!1
Remark 9. From the above proof, we know that the convergence rate of the linear controller is maxf 1 ÿ a; maxi fri gg. Remark 10. Through choosing parameters b1 and b2 properly, the switched mechanism has the following property:
Fig. 13. Service rates with ad1 ad2 ad3 0:05; b1 1:25; b2 2:5; r1 r2 r3 0:25; a 1.
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Suppose that the input rate satis®es Assumption 1, then the linear controller will be always used once it is switched to. From Observation 1 and Proposition 1, we know that our mechanism can be used to ensure that each class buer occupancy will globally converge to its operating point. This can be summarized as follows. Theorem 1. Suppose that Assumptions 1±3 are satisfied. Then the operating point, xdi , can be reached asymptotically from any initial xi 0 under the control of the switched scheduling mechanism. Proof. The proof is straightforward by using Proposition 1 and Observation 1.
5. Numerical simulations Since the eciency of linear controller (10) has been well studied in [9], we shall concentrate our simulations on the eectiveness of nonlinear control (7). Two types of input rates, namely, slowly varying input rates and fast varying input rates, will be considered.
Fig. 14. System behaviour with ad1 ad2 ad3 0:05; b1 1:25; b2 2:5; r1 r2 r3 0:25; a 1.
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Consider an ATM switch with three priority-class output buers and a scheduler corresponding to each outgoing link. For the outgoing link, let T 1 ms, C 60 cells=T , MTD1 20 T , MTD2 30 T , MTD3 40 T and d1 d2 d3 5, then xd1 100 cells, xd2 150 cells and xd3 200 cells. We shall ®rst consider the case where the inputs change very slowly. The input rates are illustrated in Fig. 1. We shall ®rst consider the eect of parameters adi 1 6 i 6 L on the behaviour of ATM switches. The system behaviour and the service rates under dierent series of adi 1 6 i 6 3 are respectively shown in Figs. 2±7. From these ®gures, we know that the proposed mechanism can bring each class buer into a small vicinity of its operating point if the duration interval of each constant is large enough. We shall now consider the case where the inputs change rapidly as illustrated in Fig. 8. It can be noted in Figs. 8±10 that our mechanism can still work well. From the above two simulations, we know that our proposed mechanism can be globally used. However, the convergence speed is very slow if we only use the nonlinear controller, especially when each class buffer is in a small vicinity of its operating point. To overcome it, the nonlinear controller and the linear controller are used together. It can be shown that our switched mechanism can ensure that each class buer globally approach its operating point. This is illustrated in Figs. 11±14, where the input rates are given in Fig. 8. Remark 11. From Figs. 9, 10, 13 and 14, we know that there is signi®cant enough bene®t to use the switched controller as compared to the use of nonlinear controller alone.
6. Conclusion We have proposed a switched priority scheduling mechanism for an ATM switch with multi-class output buers. The switched priority scheduling mechanism is composed of a linear controller and a nonlinear controller. The service rate of each class buer is periodically computed and dynamically adjusted. We derived the design formulae of the control mechanism such that each buer occupancy globally converges to its desired operating point related to QoS requirements. In our future research, we shall present some method to choose the parameters b1 , b2 and a.
Acknowledgements The authors are grateful to Professor Soh Yeng Chai and the anonymous reviewers for providing thorough comments on the previous version of the paper. Their suggestions have considerably improved the quality of the paper. References [1] A. Arulambalam, X.Q. Chen, N. Ansari, An intelligent explicit rate control algorithm for ABR service in ATM networks, in: ICC'97, 1997, pp. 200±204. [2] L. Benmohamed, S.M. Meerkov, Feedback control of congestion in packet switching networks: the case of a single congested node, IEEE/ACM Trans. Network 1 (1993) 693±707. [3] R. Jain, S. Kalyanaraman, R. Viswanathan, Rate based control: mistakes to avoid, ATM Forum/94-0882, 1994, pp. 1±6. [4] R. Jain, Congestion control and trac management in ATM networks: recent advances and a survey, Comput Network ISDN Syst. 28 (1996) 462±476. [5] A. Kolarov, G. Ramamurthy, A control theoretic approach to the design of closed loop rate based ¯ow control for high speed ATM networks, in: Proceedings of IEEE INFOCOM'97, 1997, pp. 293±301.
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[6] X.P. Liu, W.S. Wong, Controllability of linear feedback control with communication constraints, in: Proceedings of the 36th CDC, 1997, pp. 60±65. [7] A.V. Parekh, R.G. Gallager, A generalized processor sharing approach to ¯ow control in integrated service networks: the singlenode case, IEEE/ACM Trans. Network 1 (1993) 344±357. [8] A.V. Parekh, R.G. Gallager, A generalized processor sharing approach to ¯ow control in integrated service networks: the multiple nodes case, IEEE/ACM Trans. Network 4 (1994) 137±150. [9] K.H. Shim, J.M. Nho, J.T. Lim, On priority scheduling algorithm at ATM switches with multi-class output buers, IEICE Trans. Commun. 82 (1999) 34±38. [10] M.K. Wong, F. Bonomi, A novel explicit rate congestion control algorithm, in: GLOBECOM'98, 1998, pp. 2125±2132. [11] X.J. Yuan, Z.G. Li, B.H. Soong, C.Y. Wen, A RAM/DAM switching mechanism for ATM ABR trac control, Computer Communication, to appear. [12] X.J. Yuan, B.H. Soong. An improved rate-based control scheme for ABR service, in: Proceedings ATS'99, 1999, pp. 107±112.
Li Zhengguo received the B.Sci. degree and the M.Eng. degree from Northeastern University in 1992 and 1995, respectively. Since 1997, he has been a Ph.D. student in Nanyang Technological University, His research interests include hybrid systems, iterative learning control, IT security and ATM congestion control. Currently, he is working at the Center for Signal Processing in Nanyang Technological University.
Xiaojing Yuan received her M.Eng. degree in Telecomm. & Elec. System from Northern Jiaotong University, China in 1994. She is now a Ph.D. student in Nanyang Technological University. She is currently working on ¯ow control and scheduling in ATM network.
Changyun Wen received his B.Eng from Xian Jiaotong University in 1983 and Ph.D. from the University of Newcastle in Australia. From August 1989 to August 1991, he was a Postdoctoral Fellow at the University of Adelaide, Australia. Since August 1991, he has been with the School of Electrical and Electronic Engineering at Nanyang Technological University where he is currently an Associate Professor. His major research interests are in the areas of adaptive control, iterative learning control, robust control, signal processing and their applications to ATM congestion control. He is currently an Associate Editor of IEEE Transactions on Automatic Control.
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Boon-Hee Soong received his B.Eng. (Hons I) degree in Electrical and Electronic Engineering from University of Auckland, New Zealand in 1989 and the Ph.D. degree from the University of Newcastle, Australia, in 1990. Currently, he is an Associate Professor with the School of Electrical and Electronic Engineering, Nanyang Technological University. From October 1999 to April 2000, he was a Visiting Research Fellow at the Department of Electrical and Electronic Engineering, Imperial College, London under the Commonwealth Fellowship Award. His research interests include the application of system theory, high speed networks, optimization of wireless communication networks, queueing theory and signal processing.
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A switched priority scheduling mechanism for ATM switches with multi-class output buers Z.G. Li, X.J. Yuan, C.Y. Wen *, B.H. Soong School of Electrical and Electronic Engineering, Nanyang Technological University, Nanyang Avenue, Singapore 639798, Singapore Received 10 February 2000; received in revised form 29 May 2000; accepted 31 July 2000 Responsible Editor: H.L. Truong
Abstract In this paper, we propose a switched priority scheduling mechanism for an Asynchronous Transfer Mode (ATM) switch with multi-class output buers. The switched priority scheduling mechanism is composed of a model-based linear controller, a heuristic nonlinear controller and the corresponding switching law of the controllers. The nonlinear controller is ®rst applied to bring each class buer into a small neighborhood of its operating point such that the linear controller can be used. The linear controller is then used to ensure that each buer occupancy converges to its desired operating point. The service rate of each class buer is periodically computed and dynamically adjusted. We derive the design formulae of the control mechanism such that each buer occupancy globally converges to its desired operating point related to quality-of-service requirements. Ó 2001 Elsevier Science B.V. All rights reserved. Keywords: Asynchronous transfer mode; Switched priority scheduling mechanism; Global convergence; Multi-class; Analysis
1. Introduction ATM technology is developed to integrate various services into future high-speed networks. It can support real-time service that allows users to transmit information with the guarantee of quality-of-service (QoS). To provide dierent types of service quality, ATM Forum has de®ned four classes of services for various trac, namely Constant Bit Rate, Variable Bit Rate, available bit rate (ABR) and unspeci®ed bit rate [4]. Among these, the ABR service is considered the best-eort trac. When trac sources have equal priority and equivalent QoS requirements, a simple and high-speed scheduling method, ®rst-in ®rst-out (FIFO), is a proper solution. However, for packet-switching networks having a separate output buer associated with each service class, some other scheduling algorithms, together with call admission control (CAC), are used to provide the guaranteed service to each class with various QoS requirements. Among these scheduling algorithms, Generalized Processor Sharing (GPS) algorithm and its varied versions have been designed to ensure fair bandwidth share of
*
Corresponding author. Tel.: +65-790-4947; fax: +65-792-0415. E-mail address: [email protected] (C.Y. Wen).
1389-1286/01/$ - see front matter Ó 2001 Elsevier Science B.V. All rights reserved. PII: S 1 3 8 9 - 1 2 8 6 ( 0 0 ) 0 0 1 6 8 - 7
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each class [7,8]. Recently, Shim et al. [9] proposed a model-based priority scheduling algorithm for ATM switches with multi-class output buers corresponding to each outgoing link. However, the method proposed in [9] can only be used at a neighborhood of the operating point. In practice, it is dicult to ensure that the initial state of each class buer is in the neighborhood. This implies that this method cannot be globally used. Thus, it is necessary to design a simple algorithm, which can be globally used, to ensure QoS requirements of each class buer. The major motivation of this paper is to present such a method. As far as algorithms for ATM switches are designed, there generally exist two types of methods. One is heuristic [1,3,12] and the other is model-based [5,2,9]. The ®rst method can be widely used. But there does not exist any mathematical analysis tool to strictly prove the convergence except some qualitative analysis tools to illustrate the trend. Thus, the performance cannot be rigorously analyzed, especially when the system is operated at a neighborhood of the corresponding operating point, and therefore it can only be demonstrated by a great number of simulations. Although the second method can be used to achieve the objectives and there exist many eective design methods when the system is at a neighborhood of the operating point [9,5,2], it is only possible to establish an exact model for a switch by using a ¯uid-¯ow trac model [2]. To model the dynamics of a complex network, many restrictive requirements must be imposed on the network. These requirements limit the application of this method. Thus, this method can only be used for some ideal cases. Although these two methods have their own disadvantages, it is a nice idea to combine them together to design some eective algorithms. In this paper, we propose a switched priority scheduling mechanism for an ATM switch with multi-class output buers in which some ideas motivated from the control ®eld are incorporated. The switched priority scheduling mechanism is composed of a model-based linear controller, a heuristic nonlinear controller and the corresponding switching law of the two controllers. Although the convergence speed of the linear controller is very fast, the linear controller can only work in a small vicinity of the operating point. Note that the nonlinear controller can globally bring the system to the vicinity of the operating point such that the linear controller can work. This implies that the switched controller can work globally. Moreover, the convergence speed of the nonlinear controller is very slow although it can be used globally. To improve the convergence speed, we use the switched controller rather than the nonlinear controller. Generally, the dynamics of each class buer can only be modelled by a complex nonlinear model and there does not exist any eective method for the design of such a nonlinear model. However, a heuristic nonlinear controller can be designed. The heuristic nonlinear controller is ®rst used to bring each class buer into a small vicinity of its operating point, where the dynamic of the switch can be described by a linear model. A linear controller is designed based on the model and then used to ensure that each class buer occupancy converges to its desired operating point related to QoS requirement [9]. Our switched mechanism can be used in the whole state space instead of only in the neighborhood of the operating point. The remainder of the paper is organized as follows. The system models are described in detail in the following section. The switched priority scheduling mechanism is proposed in Section 3. Section 4 contains the analysis of the proposed mechanism. Its eciency is illustrated through simulations in Section 5. Finally, some concluding remarks are given in Section 6. 2. The system models An ATM switch studied in this paper is connected to an adjacent switch by two links: an outgoing link and an incoming link. The only outgoing link has a FIFO buer associated with each priority class. A trac source is classi®ed by its priority and we assume that trac sources of each priority class have the same QoS requirements. Let L denote the total number of all classes of trac sources and xi t denote the number of cells occupied in the ith class buer at time t. From the ¯uid-¯ow trac model [2], we have
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dxi t dt
fi t ÿ ui t=T ; maxf0; fi t ÿ ui t=T g;
xi t > 0; xi t 0;
205
1
where fi t is the arrival cell rate (cells/T ) and ui t is the service cell rate (cells/T ) of the ith class buer at time t and T is the updating period of the service rates. In this paper, we suppose that an outgoing link has transmission capacity of C (cells/T). Each outgoing link has a scheduler that monitors periodically the buer occupancy level and computes service rate of each class buer. The service rate of the ®rst class buer is ®rst computed based on the information available at that time. Subsequently, the service rate of the i 1th class buer is computed i 1; 2; . . . ; L ÿ 1 based on the information including the computed service rate of all higher class buers. In other words, based on the information available at time nT, the new service rates are computed in sequence during the time duration Tc which equals to computation time of the lowest priority class service rate. In our mechanism, the newly computed service rates are applied at time n 1T rather than at time nT Tc as in [9]. Since the buer occupancies are observed and the service rates are newly computed every T s, the continuous-time model (1) can be converted into the following discrete-time model with the slot duration of T: xi n 1 maxf0; xi n fi n ÿ ui n ÿ 1g;
Fig. 1. Input rates.
2
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where fi n and ui n are the amounts of cells that arrive and depart at the ith class buer during the duration n; n 1, respectively, and xi n is the number of cells occupied in the ith class buer at time n. The objective. The objective of this paper is to design a scheduling algorithm such that each class buer occupancy globally approaches its operating point. To achieve this objective, we need the following assumptions. Assumption 1. Suppose that there exists an n~1 such that jfi n 1 ÿ fi nj 6 ri jfi n ÿ fi n ÿ 1j
8n P n~1 ;
3
where 0 6 ri < 1. In other words, fi n is convergent. The convergence of fi n has been well studied in [11,1,10]. Assumption 2. Suppose that di < lim fi n < C^i ;
4
n!1
where di is the minimum service rate that has to be allocated to the ith class buer and
Fig. 2. Service rates with ad1 ad2 ad3 0:05.
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C^i C ÿ
L X ji1
dj ÿ
iÿ1 X j1
lim fj n:
n!1
207
5
Assumption 3. Suppose that L X j1
lim fj n Target rate;
n!1
6
where Target rate qC with q 2 0:95; 0:985 in [4,12]. Remark 1. Eqs. (3), (4) and (6) are necessary conditions for all class buers to be stable. Eqs. (3), (4) and (6) imply that the source can be stablized within di ; C^i . Remark 2. In practice, the input fi n is always changing. In other words, Eq. (3) does not always hold. However, we can require (3) to hold true within a large enough interval such that each class buer occupancy can approach a small vicinity of its operating point. This requirement is quite reasonable. In fact, if
Fig. 3. System behaviour with ad1 ad2 ad3 0:05.
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fi n changes rapidly and largely, there does not exist any algorithm which can be used to stabilize these buers. For simplicity, we suppose that (3) always holds in this paper. The case that (3) holds for a large enough interval can be analyzed similarly. 3. The switched scheduling mechanism The switched priority scheduling mechanism is composed of a model-based linear controller, a heuristic nonlinear controller and the corresponding switching law of the controllers. We shall ®rst present these two controllers. Generally, the dynamics of each class buer switch can only be modelled by a complex nonlinear model of form (2). Although there exists such a model, there does not exist any eective method to design a controller for such a system. Thus, we use a heuristic nonlinear controller. If xi n > xdi with xdi being the desired ith class buer occupancy, then ui n should be increased till xi is decreased. Otherwise, ui n must be decreased till xi is increased. This is the main idea of the heuristic nonlinear controller and the nonlinear controller is of the following form:
Fig. 4. Service rates with ad1 ad2 ad3 0:5.
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ui n
8 < maxfdi ; minfCi ; ui n ÿ 1gg :
maxfdi ; minfCi ; ui n ÿ 11 adi xi n ÿ xdi =xdi gg
xdi P xi n > xi n ÿ 1 or xdi 6 xi n < xi n ÿ 1; otherwise;
209
7
where i 1; 2; . . . ; L, adi 1 6 i 6 L are adjustable parameters, and Ci is the maximum allowable service rate of the ith class buer and it is de®ned as follows: Ci C ÿ
L X ji1
dj ÿ
iÿ1 X
uj n:
8
j1
To ensure the maximum tolerable time delay given as QoS requirement, xdi can be obtained as follows: xdi di MTDi , where MTDi is the maximum tolerable time delay of the ith class [9]. Remark 3. To reduce the computation, we can use 1 adi ÿ 2l x d i
1 2l
instead of adi =xdi in (7) where
is minimized.
Fig. 5. System behaviour with ad1 ad2 ad3 0:5.
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Remark 4. Note that ui n is not adjusted in the cases where xdi P xi n > xi n ÿ 1 or xdi 6 xi n < xi n ÿ 1. This is very important and it can ensure the adjustment of each service rate to be smooth and each service rate to approach a small vicinity of its corresponding operating point. The above nonlinear controller will bring each class buer into a small vicinity of its operating point xdi ; u0i with the constraints that di < u0i < Ci and xdi > 0. This will be shown in detail in the next section. In this small neighborhood, (2) can be represented by the following linear model: xi n 1 xi n fi n ÿ ui n ÿ 1:
9
In this case, a linear controller can be used to ensure that each class buer occupancy converges to its desired operating point related to QoS requirement. The linear controller is of the following form: ui n 1 2a xi n ÿ xdi ÿ 1 a xi n ÿ 1 ÿ xdi 1 aui n ÿ 2 ÿ aui n ÿ 1;
10
where 0 < a 6 1. If a 1, then the above linear controller is in an optimal form in terms of convergence speed of the linear controller proposed in [9] in the case that Tc T .
Fig. 6. Service rates with ad1 ad2 ad3 0:03.
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211
Remark 5. From the point of computation, two best choices of a are 0.5 and 1. We shall now de®ne the switching law of the controllers. Suppose that the nonlinear controller is used currently. The linear controller will be switched to if the following three inequalities are satis®ed: jfi n ÿ 1 ÿ fi n ÿ 2j 6 b1 ;
11
jui n ÿ 1 ÿ fi nj 6 b1 ;
12
xdi j 6 b2 ;
13
jxi n ÿ
where b1 and b2 are two adjustable positive parameters which depend on a. The function of b1 and b2 is to ensure that each class buer is in a small vicinity of its operating point xdi ; u0i . Note that the convergence speed of the linear controller is quicker than that of the nonlinear controller, so b1 and b2 should be set as large as possible so that the linear controller can be used as early as possible. Suppose that the linear controller is used currently. The nonlinear controller will be switched to if there exists an i such that the calculated service rate ui n > Ci or ui n < di .
Fig. 7. System behaviour with ad1 ad2 ad3 0:03.
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Remark 6. With the condition that xdi > 0, it is easier to choose the parameters b1 , b2 and a. If the desired xdi is zero in practice, we can let xdi be a small positive number. Remark 7. Our switched priority scheduling mechanism can be globally used and it can ensure that each class buer occupancy globally converges to its operating point, instead of only in a neighborhood of the operating point.
4. Analysis of the proposed mechanism In this section, we shall ®rst use some qualitative method to analyze the heuristic nonlinear controller. Observation 1. Any initial state xi 0 can be brought into a small vicinity of its operating point under the control of the heuristic nonlinear controller. We shall use some qualitative descriptions to analyze it. We consider the following two cases.
Fig. 8. Input rates.
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Case 1. There exists an n0 such that xi n0 > xdi . There are two situations. Situation 1. We consider the following two possible cases. Case (a). xid < xi n0 1 < xi n0 . It follows that ui n0 ÿ 1 > fi n0 . This implies that the current service rates can work well if the input rates does not increase in the next period. Since we do not know whether fi n0 1 will be increased or decreased, ui n0 is not adjusted. This idea has also been used in the design of linear systems with communication constraints [6]. If it happens that fi n0 1 6 fi n0 , then xi n0 2 will continue to decrease. Case (b). xi n0 1 > xi n0 > xdi . It can be shown that ui n0 ÿ 1 < fi n0 . Note that from (7) d d xi n0 1 ÿ xi 14 ui n0 1 ai > ui n0 : xdi Using (7), we have ui n0 1 > ui n0 : This implies that ui n will be increased until xi n 6 xdi or ui n Ci . Note also that xi n will be decreased until xi n 6 xdi under the control of u l Ci l P n. Thus, xi n will be less than xdi after some time.
Fig. 9. Service rates with ad1 ad2 ad3 0:05.
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Situation 2. xi n0 1 < xdi . This implies that the service rate is too large and it needs to be reduced. Note that in this situation, (14) becomes d d xi n0 1 ÿ xi < ui n0 : ui n0 1 ai xdi Using (7), we have ui n0 1 < ui n0 : This implies that ui n will be decreased until xi n P xdi or ui n di . Note also that xi n will be increased till xi n P xdi under the control of ui l di l P n. Thus, xi n will be greater than xdi after some time. Case 2. There exists an n0 such that xi n0 < xdi . The proof is similar to that of Case 1 by using qualitative descriptions. Therefore, nonlinear controller (7) will bring each class buer into a small vicinity of the corresponding operating point. Since the ®rst class buer has the highest priority, it will be ®rst brought into a small vicinity of its operating point. Similarly, the ith class buer will be the ith one being brought into a small vicinity of its operating point i 2; . . . ; L. This will be shown in detail in next section via simulations.
Fig. 10. System behaviour with ad1 ad2 ad3 0:05.
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215
Remark 8. The above analysis will be veri®ed by simulations in the next section. We shall now analyze the model-based linear controller. Proposition 1. Suppose that Assumptions 1±3 are satisfied. Then the operating point can be reached asymptotically under the control of the model-based linear controller if the linear controller is always used, that is, di < ui n < Ci hold for all n P n1 > n~1 , where ui n is defined in (10) and n1 is the starting time of linear controller. Proof. From (9) and (10), we obtain xi n 1 xi n fi n ÿ ui n ÿ 1 xi n fi n ÿ 1 2axi n ÿ 1 1 axi n ÿ 2 ÿ 1 aui n ÿ 3 aui n ÿ 2 axdi : Note that xi n xi n ÿ 1 fi n ÿ 1 ÿ ui n ÿ 2; xi n ÿ 1 xi n ÿ 2 fi n ÿ 2 ÿ ui n ÿ 3:
Fig. 11. Service rates with ad1 ad2 ad3 0:05; b1 0:65; b2 1:25; r1 r2 r3 0:25; a 1 .
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It follows that jxi n 1 ÿ xdi j 6 jfi n afi n ÿ 1 ÿ 1 afi n ÿ 2j 1 ÿ ajxi n ÿ xdi j 6 jfi n ÿ fi n ÿ 1j 1 ajfi n ÿ 1 ÿ fi n ÿ 2j 1 ÿ ajxi n ÿ xdi j 6 1 a ri jfi n ÿ 1 ÿ fi n ÿ 2j 1 ÿ ajxi n ÿ xdi j 6 1 a ri rinÿn1 jfi n1 ÿ 1 ÿ fi n1 ÿ 2j 1 ÿ ajxi n ÿ xdi j 6 1 a ri rinÿn1 1 ÿ a 1 a ri rinÿ1ÿn1 jfi n1 ÿ 1 ÿ fi n1 ÿ 2j 2
1 ÿ a jxi n ÿ 1 ÿ xdi j 6 nÿn1 1
6 1 ÿ a
jxi n1 ÿ xdi j nÿn1
1 a ri rinÿn1 1 ÿ arinÿ1ÿn1 1 ÿ a 6 1 ÿ anÿn1 1 jxi n1 ÿ xdi j 1 a ri
jfi n1 ÿ 1 ÿ fi n1 ÿ 2j
n1ÿn1
1 ÿ a ÿ rin1ÿn1 jfi n1 ÿ 1 ÿ fi n1 ÿ 2j: 1 ÿ a ÿ ri
Fig. 12. System behaviour with ad1 ad2 ad3 0:05; b1 0:65; b2 1:25; r1 r2 r3 0:25; a 1.
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217
Note that 0 6 ri < 1;
0 6 1 ÿ a < 1:
Thus lim jxi n 1 ÿ xdi j 0:
n!1
This implies that lim xi n xdi :
n!1
Remark 9. From the above proof, we know that the convergence rate of the linear controller is maxf 1 ÿ a; maxi fri gg. Remark 10. Through choosing parameters b1 and b2 properly, the switched mechanism has the following property:
Fig. 13. Service rates with ad1 ad2 ad3 0:05; b1 1:25; b2 2:5; r1 r2 r3 0:25; a 1.
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Suppose that the input rate satis®es Assumption 1, then the linear controller will be always used once it is switched to. From Observation 1 and Proposition 1, we know that our mechanism can be used to ensure that each class buer occupancy will globally converge to its operating point. This can be summarized as follows. Theorem 1. Suppose that Assumptions 1±3 are satisfied. Then the operating point, xdi , can be reached asymptotically from any initial xi 0 under the control of the switched scheduling mechanism. Proof. The proof is straightforward by using Proposition 1 and Observation 1.
5. Numerical simulations Since the eciency of linear controller (10) has been well studied in [9], we shall concentrate our simulations on the eectiveness of nonlinear control (7). Two types of input rates, namely, slowly varying input rates and fast varying input rates, will be considered.
Fig. 14. System behaviour with ad1 ad2 ad3 0:05; b1 1:25; b2 2:5; r1 r2 r3 0:25; a 1.
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Consider an ATM switch with three priority-class output buers and a scheduler corresponding to each outgoing link. For the outgoing link, let T 1 ms, C 60 cells=T , MTD1 20 T , MTD2 30 T , MTD3 40 T and d1 d2 d3 5, then xd1 100 cells, xd2 150 cells and xd3 200 cells. We shall ®rst consider the case where the inputs change very slowly. The input rates are illustrated in Fig. 1. We shall ®rst consider the eect of parameters adi 1 6 i 6 L on the behaviour of ATM switches. The system behaviour and the service rates under dierent series of adi 1 6 i 6 3 are respectively shown in Figs. 2±7. From these ®gures, we know that the proposed mechanism can bring each class buer into a small vicinity of its operating point if the duration interval of each constant is large enough. We shall now consider the case where the inputs change rapidly as illustrated in Fig. 8. It can be noted in Figs. 8±10 that our mechanism can still work well. From the above two simulations, we know that our proposed mechanism can be globally used. However, the convergence speed is very slow if we only use the nonlinear controller, especially when each class buffer is in a small vicinity of its operating point. To overcome it, the nonlinear controller and the linear controller are used together. It can be shown that our switched mechanism can ensure that each class buer globally approach its operating point. This is illustrated in Figs. 11±14, where the input rates are given in Fig. 8. Remark 11. From Figs. 9, 10, 13 and 14, we know that there is signi®cant enough bene®t to use the switched controller as compared to the use of nonlinear controller alone.
6. Conclusion We have proposed a switched priority scheduling mechanism for an ATM switch with multi-class output buers. The switched priority scheduling mechanism is composed of a linear controller and a nonlinear controller. The service rate of each class buer is periodically computed and dynamically adjusted. We derived the design formulae of the control mechanism such that each buer occupancy globally converges to its desired operating point related to QoS requirements. In our future research, we shall present some method to choose the parameters b1 , b2 and a.
Acknowledgements The authors are grateful to Professor Soh Yeng Chai and the anonymous reviewers for providing thorough comments on the previous version of the paper. Their suggestions have considerably improved the quality of the paper. References [1] A. Arulambalam, X.Q. Chen, N. Ansari, An intelligent explicit rate control algorithm for ABR service in ATM networks, in: ICC'97, 1997, pp. 200±204. [2] L. Benmohamed, S.M. Meerkov, Feedback control of congestion in packet switching networks: the case of a single congested node, IEEE/ACM Trans. Network 1 (1993) 693±707. [3] R. Jain, S. Kalyanaraman, R. Viswanathan, Rate based control: mistakes to avoid, ATM Forum/94-0882, 1994, pp. 1±6. [4] R. Jain, Congestion control and trac management in ATM networks: recent advances and a survey, Comput Network ISDN Syst. 28 (1996) 462±476. [5] A. Kolarov, G. Ramamurthy, A control theoretic approach to the design of closed loop rate based ¯ow control for high speed ATM networks, in: Proceedings of IEEE INFOCOM'97, 1997, pp. 293±301.
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[6] X.P. Liu, W.S. Wong, Controllability of linear feedback control with communication constraints, in: Proceedings of the 36th CDC, 1997, pp. 60±65. [7] A.V. Parekh, R.G. Gallager, A generalized processor sharing approach to ¯ow control in integrated service networks: the singlenode case, IEEE/ACM Trans. Network 1 (1993) 344±357. [8] A.V. Parekh, R.G. Gallager, A generalized processor sharing approach to ¯ow control in integrated service networks: the multiple nodes case, IEEE/ACM Trans. Network 4 (1994) 137±150. [9] K.H. Shim, J.M. Nho, J.T. Lim, On priority scheduling algorithm at ATM switches with multi-class output buers, IEICE Trans. Commun. 82 (1999) 34±38. [10] M.K. Wong, F. Bonomi, A novel explicit rate congestion control algorithm, in: GLOBECOM'98, 1998, pp. 2125±2132. [11] X.J. Yuan, Z.G. Li, B.H. Soong, C.Y. Wen, A RAM/DAM switching mechanism for ATM ABR trac control, Computer Communication, to appear. [12] X.J. Yuan, B.H. Soong. An improved rate-based control scheme for ABR service, in: Proceedings ATS'99, 1999, pp. 107±112.
Li Zhengguo received the B.Sci. degree and the M.Eng. degree from Northeastern University in 1992 and 1995, respectively. Since 1997, he has been a Ph.D. student in Nanyang Technological University, His research interests include hybrid systems, iterative learning control, IT security and ATM congestion control. Currently, he is working at the Center for Signal Processing in Nanyang Technological University.
Xiaojing Yuan received her M.Eng. degree in Telecomm. & Elec. System from Northern Jiaotong University, China in 1994. She is now a Ph.D. student in Nanyang Technological University. She is currently working on ¯ow control and scheduling in ATM network.
Changyun Wen received his B.Eng from Xian Jiaotong University in 1983 and Ph.D. from the University of Newcastle in Australia. From August 1989 to August 1991, he was a Postdoctoral Fellow at the University of Adelaide, Australia. Since August 1991, he has been with the School of Electrical and Electronic Engineering at Nanyang Technological University where he is currently an Associate Professor. His major research interests are in the areas of adaptive control, iterative learning control, robust control, signal processing and their applications to ATM congestion control. He is currently an Associate Editor of IEEE Transactions on Automatic Control.
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Boon-Hee Soong received his B.Eng. (Hons I) degree in Electrical and Electronic Engineering from University of Auckland, New Zealand in 1989 and the Ph.D. degree from the University of Newcastle, Australia, in 1990. Currently, he is an Associate Professor with the School of Electrical and Electronic Engineering, Nanyang Technological University. From October 1999 to April 2000, he was a Visiting Research Fellow at the Department of Electrical and Electronic Engineering, Imperial College, London under the Commonwealth Fellowship Award. His research interests include the application of system theory, high speed networks, optimization of wireless communication networks, queueing theory and signal processing.