A technique to transform programs into circuits

North- Holland Microprocessing and Microprogramming 22 (1988) 125-140

125

A Technique to Transform Programs into Circuits Jan

Kazimierczak

Institute of Engineering Cybernetics, Technical University of Wroclaw, Poland In this paper a technique to transform programs of the operating system nucleus into sequential circuits is introduced and a concept of a new solution of the os-nucleus is discussed. According to the presented concept the operating system nucleus should be realized as hardware, in the form of an automaton with internal and external parameters, that generates the operation code and addresses parts of the programs belonging to the os-nucleus. Note that in the current os-nucleus the same opcode appearing in different instructions is stored in a large number of memory locations. In the presented solution one opcode appearing in many instructions is represented by only one elementary memory element (e.g. by one flip-flop), included in the designed hardware. Similar reasoning concerns the addresses of operands. In this paper the synthesis of circuits of such a type of hardware is considered and also its result in the form of block diagram of this hardware is shown.

Keywords. Operating system, Computer hardware, Finite automaton, Software, Sequential circuits, Transformation of software into hardware.

I. Introduction

It is generally known that an operating system (os) of a computer consists of programs implemented in either software or firmware which make the hardware usable. On the other hand, we know that the current operating systems possess some disadvantages. These disadvantages, discussed below, may be removed by a partial transformation of software into hardware. The execution of such transformation is especially desirable for programs included in the operating system nucleus. The transformation of software into hardware may comprise all programs of the current os-nucleus or only its most significant components. This approach is conformable with future trends in the development of operating systems. These future trends include the migration of the operating systems functions from software to firmware or hardware [2]. For example, we can note

that the hardware costs of computer systems decrease every year. However, the cost of producing software increases every year. As a result, there is a growing payoff in the use of more hardware to automata functions previously performed by using software [9]. Some approach to the design of an osnucleus, of which all programs, or only part of them will be implemented in hardware, is introduced briefly below. The idea for a new design of the operating system nucleus, presented in this paper, arises from necessity of removal of a disadvantage of the current osnucleus organization. Namely, the present os-nucleas is a set of control programs, which are stored in the main memory. A single program of the ()s-nucleus is a sequence of instructions. Each instruction consists of two components: the operation code and the address of one or two operands. In a program there are many instructions with the same operation code. This means that the given operation code is stored in many locations of the main memory. Since the current os-nucleus consists of a number of control programs, the number of memory locations with the same operation code is very large. Similar considerations apply to the addresses of operands. The mentioned feature of the current os-nucleus we treat as a disadvantage. This disadvantage we want to remove in the presented design of the new type of os-nucleus. In our opinion, the os-nucteus will possess better advantage, if the same opcodes, and the same addresses of operands, are represented by only one elementary memory element, not by a great number of memory locations. Hence, according to the mentioned property of the present os-nucleus, designed hardware should represent each opcode by only one elementary memory element, i.e. by one flip-flop. The same reasoning refers to the addresses of operands. There['ore, the hardware representing a new type of the os-nucleus should include two sets of elementary memory elements, i.e. a set Y representing opcodes

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and a set 2 representing addresses of operands. On the sets Y and X, under influence of an external parametric signal p, which for example can represent an interrupt, a suitable program of the os-nucleus is created. According to this remark, such a type of the os-nucleus may be called a "self-organizing" osnucleus. The hardware to execute functions of the self-organizing os-nucleus can be realized in the form of a finite automaton < A > , further called the automaton with internal and external parameters [3]. Hence the above mentioned sets X and Y are treated as sets of memory elements of the automaton < A > . Each pair < y , x > of excited memory elements from sets Y and 2 uniquely determines the internal state of < A > and an instruction which is generated on the output of < A > . Hence, the automaton < A > has two outputs, on the first output operation codes are generated, while on the second output addresses of operands are generated. The synthesis of the automaton < A > may be explained in the following way. Namely, for simplicity, we assume that a current os-nucleus has only two programs written in an assembly language, denoted by o~i and '~i' Then, we assume that we want to replace the mentioned os-nucleus by the hardware which will be able to generate either instructions of ~ l or .~2- At the beginning each program is split into two parts, i.e. the operating part and the addressing part (Fig. 1). At first the operating part of the program s~i is considered. The operating part of the program .~i is expressed in the form of a graph G i whose vertices are labeled by opcodes and whose edges represent transitions between opcodes. The number of vertices of the graph Gi is equal to the number of instructions in the program ~i- There are many vertices with the same opcode. According to the presented concept, the graph Gi is collapsed to combine all vertices labeled by the same opc0de into one vertex representing an internal state of an automaton < A } > with internal parameter [3]. As a result of performing this operation the transition state diagram G} of the operating part of an automaton < A} > is obtained. The same procedure, as above, is performed on the operating part of the program ~'i, and as a result the transition state diagram G~ of an automaton < A ) > is obtained. Next the diagram G) is put on

A

'

×s

Fig. 1. Design philosophy and action of the self-organizing os-nucleus.

the diagram G} to obtain covering vertices labeled by the same opcodes. As a result of performing such covering, the state diagram of the operating part of the automaton < A > with internal and external parameters is obtained. In a similar way, the synthesis of the addressing part of the automaton < A > is performed. A design philosophy and an action of the self-organizing os-nucleus is illustrated in Fig. 1. In this figure the set Y represents the operating part of the automaton < A > , whereas the set X represents its addressing part. Moreover, in Fig. 1 the symbol Yr denotes the opcode, the symbol x,. denotes the address of an operand and the symbol p denotes the external parameter that assumes, in the considered example, either value Pi for creating the program ~ , or value pj for creating the program ,~j. The symbol z in Fig. 1 means that the operation indicated by the opcode of a running instruction is finished. There are several advantages in using the synthesized os-nucleus. The most natural advantage would be an increase of performance speed of the os-nucleus, because instructions of its programs are not fetched from memory to cpw but are generated by the automaton < A > . The second advantage is that part of the main memory is saved which so far was occupied by programs of the current osnucleus. The third advantage is that organization of

J. Kazimierczak / Transforming Programs into Circuits

the self-organizing os-nucleus seems more a mirror of the organization of memory in the human brain than organization of the current os-nucleus. For this reason the concept of the self-organizing osnucleus may be the germ to solve the problem of a machine intelligence by using hardware. The fourth advantage, as was already mentioned above, is a decrease of the cost of such computers that contain the os-nucleus made in the form of the presented hardware. A method of synthesis of the proposed hardware is described in following sections of this paper.

2. Transformation of a Program into the Hardware

Let us assume that we have a program .~i of the current o> nucleus which will be transformed into the hardware. We also assume that the program .~/: is written down in a symbolic assembly language. A schematic example is shown in Fig. 2, where c~= < y , . v > is a single computer instruction, y is an operation code, x is either an address of the operand on which the operation ), is performed or an address in the jump instruction. For simplicity, we assume that the program .~/i is applied in one-ad-

127

dress machine whose c e u contains only one accumulator. This means that every symbol _v/ in description of .e/i designates only an address of memory location. The program .~/i may be expressed in the form of a transition state diagram Gi of a finite automaton < A i > . The transition state diagram Gi of the automaton < A i > , further called the graph G~, is shown in Fir;. 3. The vertices of the graph G,, designated by symbols qr ~ Qi, represent internal states of the automaton < Ai>. With respect to program .c~/, (see Fig. 2), the given symbol qr denotes a place of the instruction in the program .eJ~. To the vertex qr the opcode )!: and the address .v~ of an operand or address of a jump in the program are assigned. -['he edges of the graph G, represent input signals of the automaton < A i > and are labeled by symbols zr ~: Z,. With respect to the program .c/, the symbol z,. :; Z, either means a sign of a result of performing the operation included in the given instruction or only means that the given operation is finished. The graph (~, can be split into two parts, i.e. into a graph Gi whose vertices q,. will be labeled by 3) ~: Y, H2×o,

93x~

C3

~z

0C9

~i ~4

x4 x4

~Z

X04

~13

~t

X4 x3

~3 ~4

XZ XI

~.~

X3

.gz

xo~

93

X4

93×z 9~x

I

x~

,

XZ X3

Xo~ x,I

Fig. 2. A schematic example of a program :1,.

Fig. 3. The graph G, of the program .~/:treated as the state diagram of an automaton < A, >

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J. Kazimierczak / Transforming Programs into Circuits

and into a graph Hi whose vertices qr will be labeled by x, e Xi. These graphs represent the operating part and addressing part of the program ,~¢i, respectively. The graph Gi is shown in Fig. 4. According to the concept of the self-organizing os-nucleus, discussed in the first section, the graphs G i and Hi are collapsed in order to obtain covering vertices labeled by the same elements, i.e. by the same opcodes in Gi and by the same addresses in Hi. The result of this operation are graphs G} and H} that determine the behaviour of an a u t o m a t o n < A } > with internal parameter. This a u t o m a t o n made in the form a hardware is able to issue instructions of the program ~ i . The above mentioned operation, performed on the graphs Gi and Hi, is equivalent to transform the automaton < A~> with transition state diagram Gi, shown in Fig. 3, into the a u t o m a t o n < A ) > determined by the state diagrams G~ and H}. The operation of transforming the graphs Gi and Hi into the graphs G} and H}, respectively, is performed by using computer on an expression G,y which describes the graph Gi (see Fig. 3) and on a Table Ti,,, (qr~-,Yi,X,) including the assignments between vertices qr of Gi and the pairs Yi,x,.. The expression G + representing the graph Gi has the following form: G + = °(q ll(zlq22(zlq33(zzq44(zlq55(zlq66 ( 6((Zlq77(Zlq88(Zlq99(z2qlolO(zlqll I l(Zlq1212 ( 12(Zlq1313(Zlq1414(z2q1515(Zlq16)15,Z3qll)14) 13 •..) 1°,z3q l 3) 9) 8... )4, Z3q7)3)2)1)0. ( 1) We shall briefly explain the transformation of the graph Gi (see Fig. 3) into the symbolic expression Gi+. In the first step we write the open bracket 0( with index k=O, and after this bracket we write symbol ql of the first vertex of G i. In the second step we write the open bracket 1( with index k = 1, after it we write symbol zl of the edge that issues from the wertex ql standing before bracket l(. After symbol z~ we write symbol q2 of the vertex to which this edge leads. After five steps we obtain

G+ = O(qll(zlq22(zlq33(z2q4a(zlqs... Note that from the vertex q3 two edges z2 and z3 issue, at first the edge z2 is considered. Performing the same procedure further, we reach the last vertex q16 of the graph G~Gi

G/" . . . .

q1313(zlq1414(z2q15 ! 5(zlq16)ls...

Since from vertex q16 of G,Gi does not any edge issue, after symbol q16 in Gi+ we write close bracket )15 with index k = 15. In the next step we decrease by one the current value k = 15 of the index of brackets and we return to the vertex ql4 written in G + before the open bracket 14(. We check whether there is an edge z~ issuing from q14 that was not written down in G? yet. In our case such an edge exists, it is denoted by symbol z3 and leads to the vertex qtt- Hence, after close bracket )15 we write c o m m a and term z3q]l. Since all edges issuing from q14 were already considered, after the term z3qll a close bracket should be placed. On next items of G/+ we also write close brackets )13)12)1J)lo because from each vertex q~3,ql:,ql l,qlo only one edge z~ issues. We obtain ...Zlq16)15,Z3qll)14) 13) 12)11)10 .... The final steps of building the expression Gff are similar the above mentioned ones. The expression Gi+ and the Table Ti,o (q:--*yj, xs) constitute a basis to synthesis of the automaton < A ~ > with internal parameters. The synthesis of the a u t o m a t o n < A~> is divided into the synthesis of the operating part of < A~> and synthesis of the addressing part of < A ~ > . At first we shall consider the synthesis of the operating part of the automaton .

2.1 Synthesis of the Operating Part of the Hardware In the first step of the synthesis we build, on the basis of Table Ti,o (qr~--*Yj,Xs) or on the basis of the graph Gi, such subsets Qid of vertices qr ~ Qi of the graph 6;i to which the same operation code yj e Yi is assigned. There exist the following assignments in the graph Gi of Fig. 3. Y l ~---+P,i,i =

{ql,qs,q8,qlo,ql3}

Y2~'"~0i,2 = {q3,q9,q14} Y3+----*0i,3 = {q4,q6,qll}

(2)

y4*-----~Qi,4 = {q2,qT,ql2,qzs} y*~---~Q* = {ql6}. ~

In the next order we suppose that all vertices qr of the graph Gi, belonging to the given subset Q/j, will be represented only by one state bj e Bi of the automaton < A~ > . Hence, we obtain the Table Ti: (Yj,---~Oi.j,----~bj) of the following assignments

J. Kazimierczak / Transforming Programs into Circuits

Fig. 4. The graph G, of the operating part of the program ,e/, and its splitting into subgraphs.

Yl +----+0i, I~'-'~b l, Y2~

0i,2~--+b2, 1,'*+-----+0 * +---+b*

(3) The second step of the synthesis we shall explain on the basis of the graph Gi shown in Fig. 4. This graph represents the operating part of the graph Gi from Fig. 3. In the second step of the synthesis we perform an operation of splitting the graph G i into s u b g r a p h s Gi, r which should satisfy the following conditions: C I. Each subgraph Gi, r o f G i should include only such vertices q~, of Gi which are connected and labeled by different opcodes yj e Yi. In other words, each subgraph Gi, r o f Gi can include from each subset (2i? = Qi (Eqs. 2) only one vertex. C2. Each vertex qs of Gi has to belong only to one s u b g r a p h Gi, r of the graph Gi. Each subgraph Gi, s o f Gi is labeled by symbol es e E i which is called a value of the internal parameter "e" of an automaton < A', > . The splitting of the graph Gi into subgraphs G~,r is shown in Fig. 4, where subgraphs Gi,, are denoted by using solid lines. Note Y3*--+O_i.3+--*b3, f4 *--+ 0i,4 *---+b4 •

129

that last vertex ql~ in the Gi, representing the END instructions of ,e/i, is omitted in the splitting. Some s u b g r a p h s Gi,r of the graph Gi can be identical. Hence, we have the following detinition: C3. Two graphs G,., of the graph Gi are said to be identical (or equivalent) if and only if they possess the same structures described by the same symbols and edges connecting these graphs with other graphs Gi.,. of Gi lead to vertices q,. belonging to the same subsets Q,,/. If in a given graph G i at least two identical subgraphs of the type G~,,.appear, then the graph G~ will be split into more greater subgraphs denoted by symbols (~i.,, (n = 1,2 .... ). The subgraphs (~i.,, should satist} the following condition: C4. Each subgraph Gi.,, of a graph Gi should include only such subgraphs of the type G,.,. which are connected and labeled by different values e,. of the parameter "'e". Each subgraph Gi.,, of a graph Gi is labeled by symbol.If,, that is treated as symbolic value of the internal parameter "7"" of the automaton < A', >. The graph Gi shown in Fig. 4 is split into two subgraphs of type (i/i,,,, i.e. subgraphs 0i.l and (5',.> because in the graph G, of Fig. 4 there are two identical subg r a p h s Gi, 2 labeled by the same value e~ of the parameter "e". The subgraphs Gi.1 and G,,e of the graph Gi are denoted in Fig. 4 by the broken lines. The vertices q.,. appearing in the given subgraphs G,,r, form the subset Qi.+r c Q,, to which also the value e~ of " e " is assigned. The subsets O,:~r c Oi together with values e~ assigned to them, are placed in the Table T,.2 (Oi+~+--+er).

Qi+,l = {ql,q2,q3,q4}.-.-+el Oi,20cl) = {q5,q6,qv}.~-+e2 Oi.+3 = {q~,qg}~--+e~ (4) Qi,2~2) = {qm,qll,ql2}*--~e2 Oi,+4 = {q13,q14,qls}.~--,e4. Similarly as above, the vertices q, included in the given subgraph of the type (~,~ form a subset Q~.~ Oi, to which the valueJ~, of the parameter '~/" is assigned. Moreover, the values es of the parameter "e", assigned to such subgraphs Gi,r which are included in the given subgraph of type (~/,~, form a subset kT~.~c Ei. For the graph Gz of Fig. 4 we obtain the following subsets of type Qi,,, and/~i,: 0/,1 = {ql,q2 ..... q9}~---+fl 0-i.2 = {ql0,ql| .... qlS}~---+J2 (5) +

+

,

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J. Kazimierczak / Transforming Programs into Circuits

Ei,1 = {el,e2,e3}~---~fl Ei,2 = {e2,e4}~-*f2. Having all subsets of types Qi+r, Qij, Q.i,n, Ei,n we may perform the third step of the synthesis of the automaton < A~>. In the third step of the synthesis, the graph Gi of Fig. 4 is collapsed in order to obtain covering the vertices labeled by the same opcode. This operation can be performed in such way that the subgraphs Gi,r of he graph G~ are put one on top of the other to obtain the mentioned covering of vertices. However, performing this operation immediately on the subgraphs G~.r is very difficult, especially when a given program of the os-nucleus is large. For this reason, in practical realization, the mentioned operation is performed on the symbolic expression G + (see Eq. (1)). The symbolic expression G + is transformed into an expression G + + The transformation of the expression G+ into G + + is performed in the following manner. We replace each symbol qr in G +, standing before any open bracket k(, by element bj according to the Table Ti, l(Yj*""'~Oi,/~---*bj) (see Eqs. (3)). If the given q, there is before the comma or the close bracket )k, we shall replace it by the pair bje.~, where es is such value of "e" which is assigned to the given qr, according to the table Ti,2 (Qi*,r*---.er) (see Eqs. (4)). Moreover, to each symbol zj in G + we add such value er o f " e " that is assigned to vertex q,,, from which the given edge issues. The items in the expression G + representing the beginning vartices of subgraphs 0i, l and (~i,2 should be denoted in G + + by appropriate value f~ of the parameter " f " . Moreover, the places of connections of the subgraph (~i,1 with Gi,2 also should be appropriate denoted in the expression G/+ + by symbolf~. As we see in Fig. 4, the beginning vertex of Gi, l is q¿, the beginning vertex of (~i,2 is qlo, besides the subgraph C~i,1 is also connected with subgraph (~i,2 in vertex q13. Hence, for distinction of the subgraphs (~i,l, (~i,2, on the item in G + +, relative to the item ql 1 ( in G + (eq. (1)), the value o f f l o f " f " should be placed; whereas on the items in G + + corresponding the items qlo I° (and q13)9 in G + the value f2 must be placed. Note that in the graph Gi (see Fig. 4) there are two the same subgraphs Gi,2 (fl) and Gi,2(f2) with value e2 of e. The connections of these subgraphs with another subgraphs Gi,r o f G i will be denoted in

the expression G,+ + by symbols fl andfz, respectively. As we see in Fig. 4, the subgraph Gi,20cl) is connected with subgraph Gi,3, while the subgraph Gi,2(J2 ) is connected with subgraph Gi,4. Therefore, in the expression G + +, we assign symbol J] to symbol e2 assigned to edge zl issuing from q7 (see Fig. 4), and symbol f2 to symbol e2 assigned to edge Zl issuing from qlzThe expression G + + obtained from the expression G + (see Eq. (1)) has the following form: G + + = O(btf 11(zlelb42(zlelb23 3( 3((ZZe Ib34(Zlelbl

5(zlezb36(

6(z le2b47(zlezb18(zle3flb29 9( 9((z2e3 b 0f210(zle2b3 I I (

l l(zlezb412(zle2f2 b113(zle4bz14(z2e4b415 15((z2e4b*)15, z3e4b3e2) )14 14)13)12)1l)l°,z3e3ble4f2)9)8...) 4, z3elb4e2)3)2)l) O.

15(

(6) Note that in G + + there are such terms k(...)k, %..)", before which the same symbol b/is written. In this case we shift the contents of the brackets %..)" to the inside of the brackets k(...)~, i.e. we perform the following operation bj~(...)k...bf(...),, = ...b~(,..)k.,.b/ .... Then we transform the symbolic expression Gi++ into a symbolic expression G++. During transforming the expression G + + into G+ + we omit the values es of "e" appearing in Gi+ + after the elements b/, also we omit the value fro of the parameter '~". The expression G/+ +, obtained from G + + has the following form:

G~

zle4

t .!! Fig. 5. Tho graph G} as the collapsed form of the graph Gi from Fig. 4.

J. Kazimierczak / Transforming Programs into Circuits

G+ + = °(b ll(zlelb42(zlelb23(z2elb34(zlelbl,zle2b4)4,

z2e3bl,z2e4b4,z3e4b3,z3e3bl,z3elb4)3,zle2bl,zle4 b*)2,zl e3b2,Zle2b 3,zle4b2)l) O. (7) N o t e that in G + + there are 18 terms of type Zjerbk, while in G/+ + there are only 15 terms, because in graph Gi (Fig. 4) two the same subgraphs Gi, r with the same value e2 occurred. On the basis of the expression G+ + the transition state d i a g r a m G} of the a u t o m a t o n < A } > m a y be drawn. F o r the expression G + + (Eq. (7)) the graph G} has the form shown in the Fig. 5. The fourth step of the synthesis of the operating part of the a u t o m a t o n < A ~ > depend on a c o m p o sition of such expression G* as will represent a graph G~(~' of alteration of values ej of the parameter "e". This expression m a y be obtained from the expression G + + (Eq. (6)). N o t e that each element b~ in G + + has assigned to itself a certain value ej of "e". The rules of the assignments of the elements br to values ei of " e " m a y be defined as follows: (i) The element br, which there is in G + + before the open bracket k(, has assigned to itself such value e: of "e", which is written d o w n in pair ziej standing in G + + after the given open bracket k(, e.g.

... z,e,.b~ k (zieib ,.(k + 1..... (ii) The element b~, which there is in G + + within zieabrej, appearing before the c o m m a or the closed bracket, has assigned to itself such value ey as is written down on the right side of br, e.g. ...zieabrej, .... On the basis of these rules, the expression G + + (6) m a y be t r a n s f o r m e d into the expression G* characterizing the change of the value ej of "e". The t r a n s f o r m a t i o n G + + into G* is p e r f o r m e d in such a way that on the left side of each element br, appearing in G + +, we write such value ej that is assigned to the given br, whereas values el, assigned in the G + + to elements zi, are omitted. M o r e o v e r , valuesJ;, o f f assigned to symbols br in the expression G + + also will be omitted in the symbolic expression G*. The expression G* obtained from G + + (6), as an result of this transformation, has the form: G* = °(elbl l(zle 1 b42(Zlelb23(z2el b34(zle2bl 5 5( 5((zle2b36(zle2b47(7(zlfle3blS s( s(zle3b29(z2e2bl lO(zle 2 b3 l l(zlezb412(ztf2e4b113( term

13(zle46214(zze4b4,z3e2b3))14 14)13)12)1 l)lO,z3e4bl)9)8.." ...)4,z3e2b4)3)2)l)°.

(8)

1 31

In next order the expression G* is t r a n s f o r m e d into the expression G** in the following manner. Each element bj, appearing in G* before the term k(...)k is m o v e d to inside of one and is placed on the left side of each pair Zier standing inside the given term k(...)k. Moreover, during building G** the elements bs appearing in G* i before the c o m m a or the closed bracket )k are omitted in G**. The expression G** has the following form:

G** = °(ell(blZlel2(b4Zlel3(b2Z2el4(b3zle25 5( 5((blZl e 26(b3zle27(V(b4ztfle3S(blzle 9 9( 9((b2t2e21°(blZl e211(b~Zle212( 12(bnzlf2e4L3(blZle414(b2z2e4,b2z3e 2)14...) I°, h223e4)9)s...)4 b2z3e 2)3)2)1)0. (9) In the expression G** the pair b:zi appearing in any term ... eik(bjzie ...... represents a signal which causes the transition from the value e: into new value e, ( f o r j 4= s o r j = s). The expression G** is arranged so that for each the value 0 only one term of the type e/k(...)k is composed. After the a r r a n g e m e n t of the expression G** we obtain the expression G** as follows: G** = °(e| l(blZ1 el,b4Zlel,b2Z2el,b 3zle22 2( 2((blZle2,b3zle2,b4zff]e33 3( 3((blZle3 ,b2z2e2,bzz3ea4(blZle4,b2z2e4,

b2z3e2)4) 3, b4zlf2e4)2b?z3e 2)1)0

(10) On the basis of this expression the graph (~} m a y be drawn as shown in Fig. 6. The fifth step of the synthesis of the operating part of the a u t o m a t o n < A} > depend on a c o m p o -

b~z.~ ~ .

b3z4

Fig. 6. The graph G} of transitions between values of the internal parameter 'o'.

J. Kazimierczak/ TransformingProgramsinto Circuits

132

sition of such expression (~+ as will represent the transitions between values f~ of the internal parameter ' ~ ' . The information about transitions between valuesf~ is included in the expression of type G/+ +. The expression (~+ derived from the expression G/+ + (see Eq. (6)) has the form as follows: G+ = °0c1l(b2e3z 2fz,bze3z3f2)l) O. (1 1) The expression (~/+ represents the transition graph (~ shown in Fig. 7. The final results of synthesis of the operating part of the automaton < A~> are as follows: i. The expression G+ + (Eq. (8)) that represents the graph G~ (see Fig. 5); ii. The expression G** (Eq. (10)) that represents the graph G~ (see Fig. 6); iii. The expression (~/+ (Eq. (11)) that represents the graph (~. (see Fig. 7). The graphs G~, (~ and 0~ are treated as the state diagrams of sequential circuits.

2.2 Synthesis of the Addressing Part of the Hardware

x4HQi,4

=

{ql,qlj}Hd4

xs~----~Qi,s = {ql0}Hds x*~-~(?~" = {q~6}*---,a*. Note that in the program d i of Fig. 2 there are branch instructions. In the graph Gi of Fig. 3 these instructions are represented by vertices q3,q9ql4. The addresses Xol,Xoz,X03 included in these instructions indicate the memory locations where some instructions to which the jump is realized, are stored. On the other hand, it is known that according to the considered conception, the instructions of the program ,~t i will be not stored in the main memory but will be generated by the automaton < A~>. For this reason, the mentioned addresses XobXo2,Xo3 represent "empty" addresses denoted further by symbol x0. Moreover, for the last instruction in the program ~'i "empty" address x* is assigned. We suppose that vertices q~, belonging to the same subsets Qi,s (Eqs. 12)), will be represented only by one state ds ~ Di of the automaton < A}> with internal parameters.

Table Tl,2( qk *--*bjer~-~ds) The basis for synthesis of the addressing part of the automaton is the Table Ti, o (qr'---*yj, Xs), the expression G + (1) and the result of synthesis of the operating part. In the first step of synthesis, similarly as in the case of the operating part of the < A}>, from the Table Ti, o (qr*---~yj,Xs) some subsets Oi,s of the vertices q~ labeled by xs are formed. Each subset Qi, s-should include such vertices q~ to which the same address Xs is assigned. From the graph a i o f Fig. 3 we can derive the Table Ti, i (xs,---*O_.i,~*---~ds) of the following assignment: Xo~---~Oi,O = {q3,q9,ql4}.---.do Xl ~--~Oi, l -~- {q2,qa,q7,qls}~--+dl

xz~--~Qi,2 = {q6,ql2}+---.d2 x3*---*Qi,3 = {qs,q8,q13}~----~d3

A

(12)

!

G i,

bz.e3z 3

Fig. 7. The graph Gi of the transitions between values of the internal parameter "f'.

qk

bler(fn)

ds

ql q2 q3 q4 q5 q6 q7 q8

bl el fl b4el b2el b3el bl e2 b3e2 b4e2 bl e3

o'4 dl (b4) do dl (b3) d3 d2 (fl) dl

q9

b2e3

ql o

bl e2f2

do d5

d3

qll

b3e2

d4

ql 2 ql 3 ql 4 ql 5 q16

b4e2 bl e4 b2e4 b4e4 b*

d2 (f2) d3 do dl d*

Note that automaton has two types of the internal states, i.e. the state of bFtype and the state of ds-type. Internal state bFtype represents the operation code. However, internal state ds-type represents the address. There exist some relations be-

133

J. Kazimierczak / Transforming Programs into Circuits

tween the states hftype and d~.-type. For example, when we know the assignments of type bjyr*---*qk, determined on the basis of the sets Qi+r and Qij (Eqs. (3), (4)), then for the given qk we may find in the Table T,.I (xs*---*O_.i,s~--~ds) (Eq. 12)) such element d~ as in the automaton < A~> represents the given qk. We may derive a Table Ti,2 (qk*---*bjer*--*ds). Comparing the graph G i and Gi (Fig. 3 and Fig. 4) we can note that in the program ,~'i, in the part denoted by symbol e~, there exist two the same address xl on the items q2 and q4. This means that the same address Xl*----~dl will cause two different transitions to next address. In order to avoid this undesirable situation, the transition from q2(x0 will be additionally labeled by symbol b4, whereas the transition from q4(xl) will be labeled by symbol b3. Hence, in the Table Tt,2 in 2nd and 4th rows there are denotations dl(b4) dl(b3). The similar reasoning refers to the case when the same subgraph Gi, r appears in different subgraphs Gi,n. Having the Table 1),2, we may replace the operation of coiling the addressing part of the graph Gi by the transformation of the expression G,.+ ÷ into an expression H + +. This operation is performed in the following manner. For every symbol bj in the expression G + +, standing before any open bracket in G + +, we subordinate such value er of " e " as appears in the pair zte~ standing directly after the given open bracket. For example: G + + = °(blfll(Zlel b4~(zlelb2 3(zze lb34(... In the result of the execution of this operation we obtain the expression/4,-+ , H + = O(blelf II(zlelb4elz(zlelbzel3(z2elb3el4 4( 4((zlelble25(zle2b3e26 6( 6((zle2b4ezV(zle2ble38(zte3b2e39 9( 9((z2e3ble2f210(zle2b3e211 11( 1I((zle2 b4e21Z(zle2ble413(zle4b2e414 14( t4((zze4 b4e415(z2e4b ,) 15( )15,z3e4b3ez) 14...)lO,z3e3bleaf2)9...)4, z3el b4e2)3)2)l)0.

~

z

,t e2~'l

Fig. 8. The graph H~ as the result of coiling the addressing part of the graph G'ifrom Fig. 3,

5((ztezd26(6(zlezfld 1 7( 7((zlezd38(zle3do9(z2e3dslO(zle2d 4 11( I I((zle2d212(12(zle~2d3 13( 13((z1 e4 do l4(zae4dl ! 5(z2e4d*)l 5, z3e4d4)14)13...)lO,z3eBd3) )9 9)8... )4,z 3e l d l ) 3)2) l )°.

(14)

The expression H + +, similarly as the expression G7 +, is arranged with respect to elements d~- The result of such arrangement is the symbolic expression hr.+ +

H~ + = °(d41(zle 1 dl2(zlelb4do3(z2eldl,Z3eldl, z 2e 3d54( z l e2d4)4,z 3e 3d34( z l e2d25(

5(z le,.A dl,z lez/2d3) 5, z le3do,zle4do)4,z2e4dl, z3ead4)3,zle lb3d3, zleed3,z2e4d*)2,zje2d-,)l) °

(15) On the basis of the expression H/+ + we can draw the graph H~ shown in Fig. 8. This graph is treated as the state diagram of a sequential circuit < Di >.

2.3 Block Diagram o f the Hardware

(13)

In the next order, each pair bjc r and each term b;ed',., appearing in the expression H/+, we replace by suitable element ds, according to the Table 1"~,2 (qk*--*b~e,.*--*ds). Thus we obtain the expression H~ + as follows:

H + + = O(d41(zleldl2(zlelb4do3(z2eldl4(Zlelb3d35 5(

The above derived symbolic expressions determine the formal model of the a u t o m a t o n with internal parameters "e" and " f " . This automaton made as hardware is able to generate instructions of the program ,~i. Each symbolic expression represents the graph treated as the state diagram of appropriate sequential circuit. Namely, the graph G~ of Fig. 5 is the state diagram of the circuit < B i> whose current state br causes the output of the cur-

J. Kazimierczak / Transforming Programs into Circuits

134

I p = const.

I

,

f

M I I

___~

P I

, ½

I

e ~"

L

P

(zj,e~,bk)

--3 b I

b Z

!

-I

• 6i>

I

I

Fig. 9. The block diagram of the hardware generating the instructions of the program all.

rent opcode Yr- Similarly, the graph H~ of Fig. 8 is the state diagram of the circuit whose current state ds causes the output of the current address x~. The graphs (~ and (~, shown in Fig. 6 and in Fig. 7, are the state diagrams of the circuits < El> and < F i > , respectively, that generate the current values of the parameters " e " and ,)o,. The block diagram of the a u t o m a t o n < A ~ > is shown in Fig. 9. The a u t o m a t o n < A ; > begins its action under influence of an initial signal, denoted in Fig. 9 by symbol p = const. This signal sets the initial state of the a u t o m a t o n < A ~ > and causes the issue of the first instruction of the program d i . The last instruction of ~¢i, determined by state (b*,d*) of the aut o m a t o n < A ~ > , causes a return to the beginning state. In this point we have to note that the replacement of only one program of the current os-nucleus by the hardware does not give us desirable satisfaction, because not all capabilities of such a type of the hardware are utilized. According to the concept introduced in section l we shall obtain better advantage, when two or greater number of programs of the current os-nucleus are replaced by the presented type of the hardware. For this reason, the results obtained in sections 2 we treat as the formal basis for the design of the hardware that will represent all programs of the current os-nucleus. This hardware, made in the form of the a u t o m a t o n with internal and external parameters, we have called the self-organizing os-nucleus. The method of synthesis of

such type of the os-nucleus will be introduced in next Section.

3. Synthesis of the Self-Organizing os-Nucleus

Suppose that the self-organizing os-nucleus will contain only two programs denoted by d i and ~ i . The formal model of the a u t o m a t o n < A ~ > for the program ~ i (see Fig. 2) was determined in the previous section. In a similar way a formal model of the a u t o m a t o n < A) > for the second program ,~'j is determined. On the formal models of < A ~ > and < A)> the synthesis of an automaton < A > with internal and external parameters is performed. For program ~4i a value Pi of the external parameter p is assigned, whereas for program ~ ' j the value pj o f p is assigned. At first we shall introduce a method of synthesis of the operating part of the automaton < A > . However, in order to introduce this method we have to consider the program d j . An exemplary program ~ ' i is shown in Fig. 10. The graph Gj of the operating part of the program ~¢j is shown in Fig. 11. The symbolic expression G~ representing the graph Gj has the following form:

Gf = O(q]l(zlq~2(zlq~3(zlq~4 (Zlq~5(z]q~ 6( 6(z2q~7(Zlq~8(zlq~9(z2q]olO(zlq]l 11( ll(zlq]212(zlq]313(Zlq]414(ztq]515(Zlq]616( 16

r 17 t 17 t 16 15 (z2q17 (zlql8 ,z3q7) ) )...) 10

J. Kazimierczak / Transforming Programs into Circuits

~

xz

CX2. {J3

XS"

Or-:3 ~

Xl

oC~ ~t

x6

Y~

xz

~z

xol

~3

Xl

~J4

X2

~9 ~J2 oC..to ~JO

Xoz

CT--4,t

~3

Xg

d-,4z

~4

XI

~4:5

~3

X~

0C4~

~o,

X6

0('45

~4

x~

~z

Xo S

!___..___~. oc$

135

X2

e,

1

G(I:~ ~18 Fig. 11 The graph G: of the operating part of the program :/: and its splitting into subgraphs.

Fig. 10. A schematic example of a program ~/i.

)10,z3q ] 3)9)8)7,z3q] 0)6)5...)1)0.

(16)

On the basis of the graph Gj we can complete the following subsets of the set Qj. yI*--*Qj, I = ~ql,q4,qs,qlz,qls}~--~bl, y2.~--.,Qj,2 = {q6,q9,q16}+--,b2, y3 ~--* Qj,3 = { q'2,q'%q] l ,q]3 } ~-* b3, (17) y4~--~Qj,4 = {q'3,q'5,q]o,q'14,q('7}*--"b4, y**---~'Q* = {qis}*--*b*. In order to determine values er andfn of the parameters "e" and " f " we have to transform the expression G f into other expression Gj+. This transformation is performed in such a way that elements q'r in the expression Gfl are replaced by elements bk, according to assignments in Eqs. (17). The expression G+ derived from G.I~ (16) has the following form: G) + = °(b II(zlb32(zlb43(zlb14(zlb 45(ztbz6(Z2637( zlb18(Zlb29(z2b41°(zlb31 l(zlb 1 12(zib313(zlb414(Zlb215(zlb216(z2b417( 17 ~

I

~

t

!

:

!

t

,

t

!

17(21b*)17,E363)16)15...)l°,z363)9)8...)7,7.364)6)5)...° ) (18) The symbolic expression Gj+ is compared with the expression (3+ + (Eq. (7)), referring to the program -~'i, and on the basis this comparison and assignments (17) we may determine the following assignments: Qj+20c3) = {q'bq'z,q'3}*--*e2, Q/+l = {q4,qs,q6,q7} . . . . el, Q j,+5 = {q's,q'9,q]o,q]l}*-*es, Qj,20c2) = {qlz,q13,q14}*--*e2, (19) Qi+4 = {q]5,q]6,q]v}*----*e4, Qj,3 = {ql,q2 ..... qll}~--"f3, Qj,2 = {q12,q13 ..... qls}*--*f2. Having subsets of the types Q/,r, Qj,+ and Qj,, we may transform the symbolic expression Gf" (eq. 16)) into a symbolic expression G / + , in similar manner as it was made for the expression G + (eq. (1)). The expression G + + derived from G J- has the following form: G J~- + = °(btf31(zle2b32(zle2b43(zle~3bl4(zlelb45( ^

!

t

t

!

!

t

./

/

136

J. Kazimierczak / Transforming Programs into Circuits

G,+ + = °(b 1l(z~elb42(zlelbz3(z2elb34(zlelbl,Zle2b4) 4 )4,zze3bl,z2e464,z3e4b3,z3e3b5, z3elb4)3,zle2bl,Zle4b*)2,zle3b2, z le2b3,Zle4b2) 1,bl l(zle2b32(zlezb43( 3(zle2bl,zlelb24(zzelb3,zzesb4,

: II

\k/k/ //L

Fig. 12. The 0raph G) as the result of coiling the graph (3/.from Fig. 11.

5(zlelb26(6(z2glb37(zlelblS(zle5b29(z2e5b41O( l°(l°(zlesb31 l(zlesbtf212((zle2b313 ( 13(zle2b 4 14(zle2f2b 115(zle4b216(z2e4b417( 17(zle4b*)17,z3e4b3elf3)16)15...) 10, z3esb3e2f2)9)8)7,z3elb4es)6)5...)l) O. (20) The expression Gj+ ÷ is arranged with respect to elements bk. During the arrangement, elements f2 and f3 appearing in the G7 + are omitted. Moreover, the same terms of the typ zierbs which appear in an arranged expression after the same open bracket will be reduced only to one term. The result of mentioned operations is the symbolic expression Gj+ +, G ; + = °(b 1l(zle2b32(zle2b43(zle2bl,Zlelb24( 4(zzel b3,z2e564,z2e4b3,z3e4b3,z3e5b3,

zze4b4,z3e4b3,z3esb3,z3elb4)4,zlesb3, zlenb*)3,zlelbl,zlesbl)Z,zlelb4, z lesbz,zle4b2)l)°.

(22) After arranging the expression G '+ + with respect to elements b,, and after reducing the same terms of the type zierbt which appeared in the same pair of brackets k(...)k, we obtain the expression G'+: G '+ = °(b I I(zlelb42(zle2b23(zzelb34(zlelbl,ztezb4,

zle5bO4,z2e3bl,zze4b4,z3e4b3,z3e3bb z3elb4,z2esb4,z3esb3) 3,zlelbz,zle2bb zle4b*,zlesb3)2,ztezb3,zle3bz,zlesb2)l) °.

(23) On the basis of the expression G' + we can draw the graph G' that is treated as a transition state diagram of the operating part of the self-organizing os-nucleus. The graph G' is shown in Fig. 13. As is shown in Fig. 13 the transitions between the internal states of the type b k of the automaton < A > depend on the variable "z" and values er of the internal parameter "e" of < A > . In order to design the sequential circuit < E > of the automaton < A > generating the current value of "e", we must determine the transition diagram of the < E > . According to presented method we have to determine

z3elb4)4,zle5b3,Zle4b*)3,Zlelbl, zlesbl)2,zlelb4,zle5b2,zle4b2)1) °.

(21) The graph Gj represented by the expression Gj+ + is shown in Fig. 12. N o w let us return to the expression G~ ÷ (7) that represents the graph G~ (Fig. 5). Having the expressions G+ + and G7 + (21) we can perform an operation of "covering" the expression G/+ + by the expression Gj+ +. This operation is equivalent to coveting the graph G~ (see Fig. 5) by the graph Gj (see Fig. 12) in such a way that each vertex bk of Gj covers only such vertex of G~ which is labeled by the same symbol bj. However, if in the graph Gj there is a vertex bs but in the graph G~ there is no vertex with symbol bs, then the vertex bs of G) is added to the structure of G~. In the first step of covering the expression G+ + by Gj+ +, the expression (Tj++ is added to the expression G+ +. As the result, the expression G '+ + is obtained:

Fig. 13. The graph G' representing the state diagram of the operating part of the hardware performing functions of the programs d i and ~/.

J. Kazimierczak / Transforming Programs into Circuits

a symbolic expression representing the state diagram of the circuit < E > . For the program d i transitions between values er of the parameter "e" are determined by the symbolic expression ~ * (Eq. (10)). In a similar way, as in the case of the program ,~i, we can derive an expression G~* that determine transitions between values er of the parameter "'e'" for the program ,q//. Having the expressions (7** (10) and G** we can perform the operation of covering the expression (7** by the expression ~f'*. This operation is equivalent to covering the graph G} (see Fig. 6) by the graph G) represented by the expression (7**. The final result of this operation is a symbolic expression G'** that represents the state diagram of the sequential circuit < E > . In order to design the sequential circuit < F > that will generate the current value of the second internal parameter "i/", we must determine the state diagram of this circuit. For the program ~ t i the transitions between values of " f " are expressed in the form of the symbolic expression 1~,+ (see Eq. (11)). Similar expression for the program '~¢i denoted by symbol GY/can be derived from the expression G~ + (see Eq. (20)). Having the expression (~+ and 0j+ we can perform the operation of covering the expression (~+ by the expression (~:~ .] The final result of this operation is a symbolic expression (~' + that represents the /

'



137

state diagram of the circuit < F > . The basis for synthesis of the addressing part of the self-organizing os-nucleus, in the considered example, are the symbolic expressions H + + and ~ + + which represent the addressing parts of the programs ,~i and ~'j, respectively. The expression hr+ + for the program ,~i was already discussed in section 2.2. In a similar way we can determine the expression/4~ + for the program ,~_~/~.Having the expression ~ + and H/+ + we perform the operation of covering the expression H I + by the expression H~~ *. The result of this operation is a symbolic expression H '++ that represents the state diagram of the sequential circuit < D > which will generate current addresses of operands of the programs ,~i or

,~//,

On the basis of the obtained results of the synthesis we can draw the block diagram of the hardware executing function of the self-organizing os-nucleus. This block diagram is shown in Fig. 14, and represents the structure of the automaton < A > with internal and external parameters. It is similar to the block diagrams of Fig. 9 that represent the automaton with internal parameters. But in Fig. 14 we have an additional element denoted by symbol (P), representing the register that stores the current value o f the external parameter p.

--4

(P)

I ~] rEl|

I

I



i

Z.

• D>

(zJe'~bk) 1 iI

7-

-t Fig. 14. The block diagram of the hardware < A > representing the self-organizing os-nucleus.

138

J. Kazimierczak / Transforming Programs into Circuits

4. Behaviour and an Application of the Self-Organizing os-Nucleus The presented hardware we have called "self-organizing", because, according to our conception, on sets of opcodes and addresses of operands, represented by sets B and D of internal states of the circuits < B > and < D > a suitable program of the os-nucleus is organized. At first, under the influence of a parametric signal Pr, initial states bJ, dk, e~, f~ of the circuits < B > , < D > , < E > and < F > , respectively, are determined. The initial states hi, dk cause issuing the first instruction of a program d r on the output of < A > . When this instruction is finished, a signal zi generated by cptJ causes the change of internal states of the circuits < B > and < D > , in agreement with the initial state es of the circuit < E > , and on the output of < A > the second instruction of ~'r is generated. Note that the initial state e~.of < E > determines the

P F

E

B Fig. 15. Hierarchy of states tran~_ltions of the hardware .

first subsequence of instructions of ~¢r to be generated on the output of < A > . When the first subsequence of instructions of d r is executed by cPu, the internal state es of < E > is changed, and the new state of < E > determines the second subsequence of d r which will be generated on the input of < A > . Similarly as the initial state of < E > , the initial state.f~ of the circuit < F > determines the first subsequence of values e, of the internal parameter e generated on the output of < E > . In general, one state of < E > determines a subsequence of several internal states of < B > and < D > , while one state of the circuit < F > determines a subsequence of several internal states of the circuits . The above described hierarchy of state transitions of the circuits of the hardware < A > is shown in Fig. 15. For simplicity, in Fig. 15 transitions between states of the circuit < D > are not considered, these transitions are depended on state transitions of the circuit < B > . The number of internal states of the circuits < B > , < D > , < E > and < F > can be constituted under some principles arising from the described concept. Namely, the number of internal states of the circuit < B > is equal to number of different opcodes appearing in such programs of the os-nucleus as will be generated by the designed hardware < A > . Note that the same opcode appearing in very many instructions will be represented by only one state b/of < B > . The number of internal states of the circuit < E > depends on the partition of graphs of operating parts of the mentioned programs into subgraphs of the type G~j (see Fig. 4) denoted by suitable values e~ of the internal parameter "e". The number of the different subgraphs of the type Gij, obtained after decomposition of the programs, univocally determines the number of internal states of the circuit < E > . As shown in Fig. 4, subgraphs of the type Gi,i are joined into more greater subgraphs (~i,n denoted by values f~ of the internal parameter/. The identical subgraphs of the type (~i,n are represented in the structure of the circuit < F > only by one statef~. Hence, the number of internal states of the circuit < F > is equal to the number of the subgraphs of the type (~i,,, obtained during the synthesis of the hardware < A > . In a similar way as in the case of the circuit < B < we

J. Kazimierczak / Transforming Programs into Circuits

can define the n u m b e r o f internal states o f the circuit < D > . This n u m b e r is equal to the n u m b e r o f different addresses o f o p e r a n d s increased by one, because all addresses a p p e a r i n g in j u m p instructions are represented only by one state o f < D > . One o f the m o r e interesting e x a m p l e s o f the app l i c a t i o n o f the a b o v e described h a r d w a r e < A > is using it for scheduling processes executed by cPu. This e x a m p l e is illustrated in Fig. 16. There are four queues o f processes executed by cPU. T h e y are: Rt queue o f processes cyclically executed a c c o r d i n g to strategy R o u n d - R o b i n ; Re queue o f b l o c k e d p r o cesses: R3 queue o f r e a d y processes; Ra queue o f u n b l o c k e d processes. The process is defined as a user p r o g r a m in executing a n d is r e p r e s e n t e d in any queue by its n a m e in the form o f a n a t u r a l n u m b e r . W e a s s u m e that the m a x i m u m n u m b e r o f places in any queue is equal to four. It is k n o w n t h a t d u r i n g the cPU action s o m e i n t e r r u p t i o n s occur, e.g. running process is b l o c k e d because it initiates an input,/ o u t p u t o p e r a t i o n . W h e n the i n t e r r u p t occurs, a suitable p r o g r a m o f the os-nucleus should be realized. In the presented solution i n s t r u c t i o n s o f this p r o g r a m are g e n e r a t e d by the h a r d w a r e < A > m a d e up, a c c o r d i n g to described concept, in the form o f the a u t o m a t o n with internal a n d external p a r a meters. N o t e that in the system o f queues RI,R2,R~.R4, further called the system < R > , very man~ such states a p p e a r for which the a u t o m a t o n < A > will issue the same sequence o f instructions. A n y subset o f states o f < R > for which the same sequence o f i n s t r u c t i o n s is g e n e r a t e d by < A > is defined as a m a c r o s t a n o f < R > . A n y m a c r o s t a n o f

~lS_1 I~-~1 e _1 < A> i Fig. 1 6. Applications of the hardware < A > for scheduling processes executed by cPu,

139

< R > is represented by only one internal state o f an a u t o m a t o n < L > , shown in Fig. 16. T h e synthesis o f < L > is p e r f o r m e d in the s a m e m a n n e r as the synthesis o f the a u t o m a t o n < A > described in Sections 2 a n d 3. The a u t o m a t o n < L > can be treated as a r e c e p t o r o f the os-nucleus because its c u r r e n t internal state represents a current m a c r o s t a n o f the system < R > . T h e message a b o u t the current state o f < L > is given, in the form a signal, from the outp u t o f < L > into the p a r a m e t r i c i n p u t o f < , 4 > , and represents a value o f the external p a r a m e t e r p o f < A > . F o r different values of p, on the o u t p u t o f < A > different sequences o f instructions are generated. In Fig. 16 the s y m b o l s denotes the interrupt, the s y m b o l z m e a n s that the c u r r e n t instruction issued by < A > is finished, the s y m b o l u m e a n s that the given sequence o f instructions g e n e r a t e d by < A > for the given value o f p is finished. M o r e over, the s y m b o l u denotes a signal that causes the c h a n g e o f the internal state o f the r e c e p t o r < L > .

5. Conclusion In the c o n s i d e r e d e x a m p l e the self-organizing osnucleus as the a u t o m a t o n < A > represents only two p r o g r a m s , i.e. the p r o g r a m s .~/, a n d .c~'i. W h e n on the i n p u t o f the < A > the signal p, is given, the a u t o m a t o n < A > will generate instructions o f the p r o g r a m ,e/i- H o w e v e r , if on the i n p u t o f the < A > the signal p / i s given, on its o u t p u t instructions o f the p r o g r a m ,~i will be generated. The signals p, and Pi are treated as values o f the external p a r a meter "'p". In general the external p a r a m e t e r "p'" m a y c o n t a i n m a n y values p,. c P. Each value p,. o f the p a r a m e t e r "'p'" refers to a single p r o g r a m o f the osnucleus. N o t e that each value Pr o f the "'p'" d e t e r m i nes some initial states h/,da.,e,J;, for which the au~ t o m a t o n < A > will be g e n e r a t i n g the instructions o f a certain p r o g r a m ,e/r. Hence, if on the i n p u t a such signal p, is supplied' to d e t e r m i n e o t h e r initial states than p l a n n e d initial states, the a u t o m a t o n < A > will generate an - u n k n o w n " p r o g r a m ,~J~. This p r o g r a m m a y be useful or useless. The aut o m a t o n < A > , as the ()s-nucleus. can d e t e r m i n e all " ' u n k n o w n " p r o g r a m s c o n c e a l e d in its structure a n d then it can d e t e r m i n e a set o f useful p r o g r a m s . Thus, the a u t o m a t o n < A > can extend the set o f

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programs to be generated on its output. The mentioned feature of < A > gives the possibility of an automatic extension of functions executed by the os-nucleus u-" hour necessity of writing suitable programs and fetching them to the main memory. This ability of the self-organizing os-nucleus we can motivate as follows. Let us note that during the synthesis of the hardware < A > programs of the os-nucleus have been split into small parts. These small parts~ belonging to different programs, can be suitable connected so that we obtain a program which is useful and extends functions executed so far by the os-nucleus. This fact can also be utilized to solve some problems of the artificial intelligence. Namely, the described concept of the self-organizing os-nucleus can be used to solve the problem of knowledge acquisition from user programs by computer possessing the ability in domain of the automatic programming. According to [5], during acquiring the knowledge, the user program, written in a higher-level language, is also split into small parts containing some pieces of knowledge. Those small parts of the user programs are transformed into symbolic expressions, similar to the expressions described in this paper. These symbolic expressions represent in the computer m e m o r y some graphs. Since, in general, these graphs represent small parts of different user programs, by suitably connecting them such a user program can be obtained which so far has not been yet executed by the computer. Hence, if a user gives to the computer a specification, written in the natural language, describing a problem which should be solved, the computer can build a program to solve this problem [5]. The algorithm, described in Sections 2 and 3, of the decomposition of programs into small parts and transforming them into symbolic expressions seems to have the potential for generalization to other applications. There is, however, a lot of further work to do in domain of the full practical applications of the presented solution.

References [1] Coffman, E.G.J. and P.J. Denning: Operating System Theory. Englewood Cliffs, N.J., Prentice-Hall 1 973. [2] Deitel, H.M.: An Introduction to Operating Systems. Addison-Wesley, Massachusetts - A m s t e r d a m - London, 1 984. [3] Kazimierczak, J.: Automaton with Internal Parameter, Report 58/83, ICT, Technical University of Wroclaw, 1983. [4] Kazimierczak, J.: Introduction to Synthesis of the SelfOrganizing Operating System Nucleus, E C A I - 8 4 - Pro-

ceedings of the Sixth European Conference on Artificial Intelligence (Pisa 1984) pp. 750-751. Elsevier Science Publishers B.V. North-Holland, 1984. [5] Kazimierczak, J.: Knowledge Acquisition from User Program by Computer with own Knowledge-Based System, (in): H. Sol et al.: Expert Systems and Artificial lntelligence in Decision Support Systems, pp. 271-292. D. Reidel Publishing Company, Dordrecht, Holland, 1 987. [6] Kazimierczak, J.: Concept and Synthesis of an Operating System Nucleus Implemented in Computer Hardware.

Proceedings of the ACM Computer Science Conference "87, pp. 273-284. ACM Publication, New York, 1 987. [7] Popek, G.J., Kline, C.S.: Issues in Kernel Design, (in): Operating Systems, pp. 209-227. Springer-Verlag, Berlin - New York, 1 979. [8] Shaw, A.C.: The Logical Design of Operating Systems. Prentice-Hall, Inc., Englewood Cliffs, New Jersey 1 974. [9] Tiberghien, J.: New Computer Architectures. Academic Press, London - Orlando, 1984.

Jan K a z i m i e r c z a k received the M.S. degree from the Technical Academy WAT, Warsaw, Poland, in 1961 in communication. He received the M .S. and Ph.D. degrees from the Technical University of Wroc~aw, Poland, in 1967, 1969, respectively, both in computer science. In 1974 he passed the examination on a thesis presented to qualify as the Assistant Professor in computer science and received the Asst. Prof. degree from Technical University of Wroctaw. Since 1969 he has been working at the Technical University of Wroctaw. He is currently Associated Professor in the Institute of Engineering Cybernetics of Technical University of Wroctaw and the Head of the Department of Operating System and Automata in this Institute. His research interests include operating systems, switching theory, automata theory and artificial intelligence. He has published more than 40 papers on the subject of computer science.