Advantages and limitations of MgO as a dielectric for GaN

Advantages and limitations of MgO as a dielectric for GaN

Solid-State Electronics 47 (2003) 2139–2142 www.elsevier.com/locate/sse Advantages and limitations of MgO as a dielectric for GaN B.P. Gila a, J. Kim...

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Solid-State Electronics 47 (2003) 2139–2142 www.elsevier.com/locate/sse

Advantages and limitations of MgO as a dielectric for GaN B.P. Gila a, J. Kim b, B. Luo b, A. Onstine a, W. Johnson b, F. Ren b, C.R. Abernathy a,*, S.J. Pearton a a

Department of Materials Science and Engineering, University of Florida, P.O. Box 116400, 100 Rhines Hall, Gainesville, FL 32606, USA b Department of Chemical Engineering, University of Florida, Gainesville, FL 32606, USA Received 17 November 2002; received in revised form 21 February 2003; accepted 3 March 2003

Abstract MgO and Sc2 O3 were deposited by gas source molecular beam epitaxy on GaN. MgO was found to produce lower interface state densities than Sc2 O3 , 2–3  1011 vs. 9–11  1011 eV 1 cm 2 . The good electrical quality of the interface is believed to be due to the presence of a single crystal epitaxial layer at the GaN surface. By contrast, the MgO was found to be more sensitive to environmental and thermal degradation than the Sc2 O3 . The environmental degradation is believed to be due to interaction with water vapor in the air and was suppressed by capping of the MgO. Annealing at the temperatures needed for implant activation in GaN produced significant roughening of the MgO/GaN interface and an order of magnitude increase in the interface state density. This sensitivity to thermal degradation will require changes in the processing sequence presently envisioned for e-mode devices in order to avoid damaging the interface and increasing the gate leakage in the device. Ó 2003 Elsevier Ltd. All rights reserved. Keywords: MgO; GaN; Dielectric; Interface state density

1. Introduction There are several applications for dielectric materials in GaN device technology. Passivation of high voltage junctions, isolation of devices and interconnects, and gate insulation of field effect transistors are the most important. A successful dielectric must possess a number of characteristics including chemical stability over the life of the device and thermal stability, since many GaN applications require operation at elevated temperatures. For good electrical operation, the material should have immobile charge traps (to avoid shorting), low defect densities (to avoid breakdown at low electric fields), should form a Type I interface to GaN (in order to provide confinement on both bands), and should have a dielectric constant higher than that of the semiconductor

*

Corresponding author. Tel: +1-352-846-1087; fax: +1-352846-1182. E-mail address: [email protected]fl.edu (C.R. Abernathy).

(to avoid generation of high electric fields in the dielectric). This last requirement is the major disadvantage of SiO2 , as shown in Table 1. In addition to the bulk properties, the dielectric/semiconductor interface is also critically important, as leakage at the interface will severely compromise device performance. In general, the interface state density of carrier traps, Dit , must be
0038-1101/$ - see front matter Ó 2003 Elsevier Ltd. All rights reserved. doi:10.1016/S0038-1101(03)00186-2

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Table 1 Candidate dielectrics for use in GaN-based electronic devices Si3 N2 [4]

GGG [5]

Ga2 O3 [11]

Gd2 O3 [6–8]

Sc2 O3 [9]

MgO [10,11]

GaN [12]

Amorphous –

Amorphous –

Amorphous –

Hex./Mono 56

Bixbyite 20

Bixbyite 9.2

NaCl )6.5

2H –

9.0 3.9

5.0 5.0

4.7 14.2

4.4 10–11.4

5.3 11.4

6.3 14

8 9.8

3.39 3.4

1993

2173

2023

2013

2670

2678

3073

2500

intermediate buffer layer for growth of ferroelectric materials on semiconductors [13,14] or as a potential gate dielectric for GaAs [15,16] or Si [14]. While MgO deposition by MBE has been successfully demonstrated by a number of groups, the crystal quality of the films deposited on GaAs and Si has been poor due to the large lattice mismatch between the MgO and the semiconductor substrate. GaN has a smaller lattice constant than GaAs and is thus a much closer match to MgO [17]. An additional advantage of this system is the large bandgap and thus large band offsets that are expected relative to either an n- or p-type semiconductor. Further, the dielectric constant for MgO, 9.8, is substantially higher than for SiO2 . We have previously reported on the feasibility of using MgO as a gate dielectric for GaN [18,19] and as a field passivation dielectric for GaN HFET power devices [20]. In this paper we will discuss the quality and stability of the MgO/GaN interface and contrast its performance with that of Sc2 O3 .

2. Experimental procedure The Sc2 O3 and MgO layers were deposited in a RIBER2300 using elemental Sc and Mg and an oxygen plasma generated by an Oxford RF plasma source. The GaN substrate preparation began with a wet chemical etch of HCl:H2 O (1:1) for 3 min, followed by a DI rinse, for an initial cleaning of the substrate surface. Next, a UV–ozone exposure for 25 min in a UV Cleaner model 42-220 was used to assist in the removal of the carbon contamination. Finally a dip in buffered oxide etch (6:1, ammonium fluoride:hydrofluoric acid) for 5 min was used to remove most of the surface oxide. At room temperature, the surfaces of the substrates were polycrystalline according to reflection high energy electron diffraction (RHEED) images. Upon heating the GaN to 700 °C, a streaky (1  3) pattern appears. This was the starting surface for all the films grown in this study. The Sc2 O3 and MgO were deposited at rates of 2.1 and 2.8 nm/min, respectively. Structural and chemical characterization of the MgO was obtained using RHEED, scanning electron microscopy, cross-sectional transmission electron microscopy (XTEM), and depth profiling

Auger electron spectroscopy. Electrical characterization consisted of I–V and C–V analysis of 80 lm diodes fabricated using Ti/Al/Pt/Au (20/70/40/100 nm) Ohmic contacts and Pt/Au (20/100 nm) Schottky gate contacts.

3. Results and discussion As shown in Fig. 1, the orientation of the MgO is (1 1 1) as expected. The shape of the spectra suggests that the film is not entirely single crystal. This is further supported by HR XTEM where it was found that the first 4 nm of the layer is epitaxial with the remainder of the layer showing a nano-crystalline microstructure. It is most likely this single crystal layer which is responsible for the good C–V behavior observed in this structure, as shown in Fig. 2. No evidence of hysteresis is observed and the interface state density calculated using the AC conductance method is in the low 1011 eV 1 cm 2 . By contrast, Sc2 O3 layers grown under similar conditions show a higher Dit as shown in Table 2. This is presumably due to the higher lattice mismatch in the case of the

GaN (004) 100000

Count/sec.

Structure Mismatch to GaN (%) Bandgap (eV) Dielectric constant, e TMP (K)

SiO2 [2–4]

10000

MgO (222)

1000

100 70

72

74

76

78

80

82

2 theta Fig. 1. XRD spectra of 40 nm MgO layer deposited on GaN at 100 °C showing texturing toward the (1 1 1) orientation. The symmetry of the rock salt (1 1 1) and wurtzite (0 0 0 1) structures are similar thus favoring this orientation relationship.

B.P. Gila et al. / Solid-State Electronics 47 (2003) 2139–2142

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1.0x10 -7

current (A)

8.0x10 -8 6.0x10 -8 4.0x10

as-grown aged w/gate aged w/o gate

-8

2.0x10 -8 0.0 -2.0x10 -8 -4.0

-2.0

0

2

4

voltage (V)

Fig. 3. Current–voltage (I–V ) characteristics of 100 lm MgO/ GaN diodes taken shortly after deposition of the MgO and five months after deposition. For comparison, some diodes were aged with the gate metal in place and some were aged without the gate metal. Diodes with the gate metal in place did not show degradation while those without the metal degraded severely.

Fig. 2. Capacitance–voltage (C–V ) curve (top) taken from 100 lm MgO/GaN diodes of the type shown in the photograph (bottom). The C–V curve contains both forward and reverse traces. The lack of hysteresis between these two traces is further evidence of the quality of the MgO/GaN interface.

Table 2 Electrical characteristics of 100 lm oxide/GaN diodes Dit (eV LT-Sc2 O3 LT-MgO

1

cm 2 )

9–11  1011 2–3  1011

VBD (MV/cm) 1.9 3.8

The Dit was calculated using the AC conductance method. VBD is the voltage required to produce a leakage current of 1 mA/cm2 in the dielectric.

Sc2 O3 which results in a higher defect density. This in turn produces a poorer quality interface as well as a lower breakdown field. These results suggest that the MgO is a better choice for use with GaN. In fact it has recently been shown that the MgO/GaN combination can be used in a gated diode configuration to produce carrier inversion in the GaN surface. This is the major requirement for fabrication of a GaN-based enhancement mode device and thus is quite encouraging. However, the environmental and thermal stability of the MgO/GaN interface remain an

important issue in developing this technology. As shown in Fig. 3, if left unprotected, the MgO layer will degrade significantly resulting in the loss of passivation of the GaN surface. By contrast, similar diodes fabricated using Sc2 O3 show no evidence of degradation with no change in their electrical behavior up to five months after fabrication. The degradation observed in the MgO diodes is believed to be due to the interaction of the MgO with water vapor resulting in the formation of MgOH. Studies reported in the literature have shown that such reactions occur readily in the (1 1 0) face of single crystal MgO, but not on the (1 1 1) face. It is likely that the grain boundaries present in the top polycrystalline layer expose the less stable (1 1 0) face and thus are responsible for the observed degradation. If the MgO layer is capped to prevent the interaction with water, the material, and its electrical properties, remains stable, as shown in Fig. 3. Since most devices are covered with a final capping layer, typically of SiNx , the environmental stability is probably not a major problem. Of greater concern is the thermal stability of the MgO/GaN interface. The preferred processing sequence for a GaN enhancement mode MOSFET requires a high temperature implant activation anneal after the dielectric has been deposited. As shown in Fig. 4, this anneal results in significant roughening of the MgO/GaN interface. In addition, the Dit increases by up to an order of magnitude. Clearly the interface is not stable upon annealing at high temperatures. One possible solution may be to improve the lattice matching of the interface through the addition of alloying agents such as Ca. This may reduce the strain associated with the interface.

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for e-mode devices in order to avoid damaging the interface and increasing the gate leakage in the device.

Acknowledgements The authors acknowledge the US Office of Naval Research for support of this work under grant no. US Navy N00014-98-1-0204 and the US Air Force Office of Scientific Research under grant no. US Air Force 2032972-8451.

References

Fig. 4. X-ray reflectivity curve of MgO/GaN interface before and after RTA annealing at 1000 °C for 2 min. Loss of oscillations and sharper drop in signal indicate severe roughening at the oxide/GaN interface after annealing.

However, even with improved lattice matching it may not be possible to maintain interfacial integrity at high temperatures. If this proves to be the case, then alternative processing sequences will need to be developed in order to incorporate the MgO gate dielectric into an e-mode GaN device technology.

4. Summary MgO has been shown to produce low Dit values on GaN making it a suitable dielectric for use in enhancement mode GaN-based devices. The quality of the interface is believed to be due to the presence of a single crystal epitaxial layer which forms at the GaN surface. However, the MgO layer was found to be sensitive to environmental and thermal conditions which impose limits on how the devices must be processed and packaged. The environmental degradation is believed to be due to interaction with water vapor in the air requiring capping of the MgO. A more difficult issue is the interfacial degradation which occurs when the MgO/GaN interface is annealed at the temperatures needed for implant activation in GaN. This problem will require changes in the processing sequence presently envisioned

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