Materials Science in Semiconductor Processing 2 (1999) 75±85
Al speed ®ll Gerald P. Beyer a,*, Karen Maex a, Stephen Daniels b, Sophia Lee b, Joris Proost a, Hugo Bender a, Moshe Judelewicz a, Nirmalya Maity b a IMEC, Kapeldreef 75, B-3001 Leuven, Belgium Applied Materials, 2901 Patrick Henry Drive, Santa Clara, CA 95054, USA
b
Abstract A novel via ®lling method, combining ionized barrier PVD and conventional Al PVD, has been developed which exploits the surface diusion of Al for the simultaneous ®ll of deep sub 0.5 mm vias and trenches. This speeds up the via ®ll considerably compared with the classical cold/hot approach. The Al is deposited in an all warm 2 step process consisting of the seed layer and the Al ¯ow at a wafer temperature ranging between 425 and 4508C. Instead of avoiding the TiAl3 reaction during the seed layer deposition the reaction is used to spread the Al. This requires a match between the deposition rate and the advancement of the reaction front. As a result the seed layer is formed independent of the aspect ratio of the recess. For the subsequent Al ¯ow a geometrical model is implemented to explain the relationship between the demand and supply of the Al. # 1999 Elsevier Science Ltd. All rights reserved.
1. Introduction As an interconnect engineer one faces new challenges on an almost daily basis. On the one hand the challenges stem from the increasing number of electronic devices on a chip which need to be connected. The interconnect structure is usually realized by plug ®ll and reactive ion etching of the metal layer or by plug and trench ®ll in a dual damascene scheme, whose lateral dimensions tend to decrease with every new device generation. On the other hand there is also the desire to accomplish this task with the existing physical vapor deposition technology. The limitation of conventional PVD in ULSI is due to the line of sight deposition of the sputter ¯ux. In a recess the number of deposited atoms on the sidewall and the bottom is
* Corresponding author. Tel.: +32-16-281343; fax: +32-16281214. E-mail address:
[email protected] (G.P. Beyer)
solely determined by the recess opening. Therefore, the deposited layer is spread thinner in the recess than on a ¯at surface. Furthermore the sputter ¯ux leaves the target with a characteristic angular distribution [1] the randomness of which is enhanced by collisions in the gas phase. This does not represent a problem if the layer is to be deposited on a ¯at surface because the number of atoms averages over a large area. If the layer, however, is to be deposited in a recess, commonly a via or a trench, the limitation of PVD becomes apparent. As a large number of the atoms hits the wafer at an angle from the surface normal many atoms tend to be deposited nearby the opening of the recess, forming an overhang due to the geometry dependent self shadowing eect. The aforementioned issues of aspect ratio dependent sidewall and bottom coverage and overhang aect the PVD deposition of both barrier and conductor alike. To combat these issues several methods have been proposed and implemented. The latest development in the line of barrier deposition is the usage of an ionized
1369-8001/99/$ - see front matter # 1999 Elsevier Science Ltd. All rights reserved. PII: S 1 3 6 9 - 8 0 0 1 ( 9 9 ) 0 0 0 0 2 - 5
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Fig. 1. Principle of curvature-induced surface diusion for sputter-®lling of relatively large (i) and small (ii) features. ri and Ri represent the in-plane and out-of-plane radius of curvature, the latter only being relevant for vias (not for trenches). Due to bridging at the feature opening (iii), surface diusion may be completely suppressed and ®lling only proceeds by bulk diusion.
PVD [2,3], which improves the directionality of the sputter ¯ux and allows the tailoring of the bottom coverage to the needs of high aspect ratio contact holes and vias. In this approach the sputtered atoms are converted into ions as they traverse an RF plasma between the target and the wafer. Upon crossing the plasma sheath the ions experience an electrical ®eld which directs them to the surface of the wafer. Although the same approach has also been attempted for the deposition of the conductor metal, i.e. Al and Cu, technical issues such as a slow deposition rate and the cooling of the plasma at high DC powers [4] have apparently hampered the introduction of ionized conductor PVD beyond the con®nes of the Cu seed layer for electroplating [5]. Instead of increasing the directionality of the sputter ¯ux the preferred approach is to enhance the mobility of the Al atoms on the wafer surface. This is done by heating the substrate to temperatures in the range of 400±5008C. The ¯ow of Al into the recess is then directed by the surface contour of the via or trench [6], where the surface ¯ux between two points on a three-dimensionally curved surface can be approximated as 1 1 1 1 jÿ : ÿ ÿ 1ÿ 42 ÿ 0 r1 r2 R1 R2 Ri and ri are the principal radii of curvature, taken to be positive for convex surfaces. Although being merely qualitative, the relevance of the above equation in describing the driving force for sputter-®lling becomes directly evident from Fig. 1. According to the above equation, a positive J1 4 2 represents a surface ¯ux inside the pattern and therefore induces sputter®lling from bottom to top to bottom. Note that for
vias Ri<0 because of their concave curvature in the third dimension, while for trenches Ri=1. For relatively large feature sizes (i), J1 4 2 will be positive since r1>0>r2. In vias, sputter-®lling will be enhanced relative to trenches because of their additional curvature (R1
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¯ow at an elevated temperature and at a low DC power [8±12]. The purpose of the ®rst Al layer is to provide a seed layer onto which the Al ¯ow can subsequently proceed. Therefore, a conformal deposition is of great importance. Frequently suggested reasons to deposit the seed layer cold and at a high DC power, are to prevent the dewetting of Al at the elevated temperature and to suppress the TiAl3 reaction between the underlying wetting layer and the Al. This approach, however, runs into problems when the aspect ratio of vias exceeds approximately 2:1 due to an insucient step coverage. As a result it is commonly observed that the top of the vias is bridged by Al with creates a void. The via ®ll will consequently proceed from the top to the bottom. This is very undesirable as the predominant ®ll mechanism will switch from the relative fast surface diusion to the slow bulk diusion which in turn relies on crystallographic defects [12,13]. In order to improve the seed layer deposition in high aspect ratio vias either low pressure Al PVD with the aim to have a higher directionality of the ¯ux [14,15] or Al CVD have been implemented [16]. The aim of this work has been twofold . To combine the advantages of ionized barrier PVD with conventional Al PVD . To extend conventional Al PVD to the ®ll of deep sub 0.5 mm vias and trenches in a reliable and fast manner
2. Experimental The experiments have been carried out on an Applied Materials Endura 5500. The wetting layer has been deposited in a full coverage ionized metal plasma chamber (101). A wetting layer consisting of Ti/TiN followed by a so called `TiNx ¯ash' proved to be superior over a single Ti layer and was consequently implemented in the Al speed ®ll process. The wafer temperature in the AlCu(0.5%) chamber, equipped with a high temperature high uniformity chuck, was varied between 425 and 4508C. The via ®ll was initially evaluated on cross-sections prepared by FIB. Vias of a diameter ranging from 0.25 to 0.5 mm were etched into a 1 mm thick silane based plasma enhanced CVD oxide which corresponds to aspect ratios of 4:1 to 2:1. As the FIB samples are tilted at an angle of 458 with respect to the detector the height dimension appears to be smaller by an factor of 0.71. The electrical via resistance was measured on via chains containing 106 vias with a diameter of 0.3 mm. The inter metal dielectric stack consisted of a spin on glass (FOX15 by Dow
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Fig. 2. Cross sections of 0.25 mm vias (aspect ratio 4:1) after the deposition of the cold Al seed layer.
Corning) sandwiched between 2 silane based PECVD layers. As the SOG was not etched back the polymer is exposed at the via sidewalls. The overall dielectric stack thickness was 1 mm on top of the ®rst metal layer. 3. Results and discussion 3.1. The limitation of the classical cold/hot Al process Fig. 2 shows a cross-section, prepared by Focused Ion Beam analysis, of vias with a diameter of 0.25 mm and an aspect ratio of 4:1. A cold Al seed layer of thickness 150 nm had been deposited. Even though the layer is fairly thin an overhang has developed at the entrance of the vias. Fig. 3 displays the vias after the sequential deposition of the cold seed layer and
Fig. 3. Cross section of vias after the sequential deposition of the cold Al seed layer and the 1 kW ¯ow at 4258C.
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another 70 nm of Al at 4258C wafer temperature and 1 kW DC. The total deposition time of the two steps was 31 s. There is hardly any Al at the bottom of the vias visible. Instead there is now a congestion of Al at the opening which leads in the most extreme case to the bridging of the via. The vias are then ®lled by bulk diusion which will increase the ®ll time to around 3±4 min. 3.2. Postulation of a new via ®ll process ± reaction induced wetting Based on the experience gained from the cold/hot process a new, improved Al via ®ll process is proposed. The aim is to ®ll high aspect ratio vias with Al by surface diusion in a standard PVD chamber. If the seed layer cannot be deposited by conventional PVD in a conform and continuous fashion an alternative would be to let the Al ¯ow down the sidewall (indicated by (2) in Fig. 4). This would require to begin the ¯ow of Al as soon as the sputtering starts. This would, however, violate the tenet of the classical cold/hot Al process that the seed layer must be deposited at a temperature as low as possible in order to prevent dewetting and to suppress the TiAl3 reaction. Dewetting occurs when the wafer temperature selected is too high and/or the wetting characteristics of the underlying layer are insucient. It will be shown that in the temperature range described here and with a Ti rich wetting layer dewetting is not an issue. There are various arguments often referred to in order to explain why the TiAl3 formation has to be avoided or suppressed and why a cold Al-containing seed layer is used to accomplish this. Some of these arguments are: Firstly, the TiAl3 reaction is detrimental to the via connection resistance and the line resistance. This problem is not solved by using a cold Al-containing seed layer because the subsequent processing steps such as sintering require elevated temperatures for a prolonged period and hence, the TiAl3 reaction will proceed anyhow. Secondly, the TiAl3 reaction induces an additional overhang on the top of the opening, since the overhang of the Ti layer at that place is magni®ed by a factor of about 4. However, this can be easily overcome by engineering the deposition of the wetting layer to minimize overhang, particularly, by reducing the thickness of the Ti layer and by engineering the shape of the via hole or trench at the top. Thirdly, Al diusion on TiAl3 is more cumbersome than on an Al-containing metal. This is indeed true, but the method of reaction induced wetting will circumvent this issue in an advantageous way by properly controlling the TiAl3 reaction instead of avoiding it. When properly controlled, this reaction
Fig. 4. Proposition of a new via ®ll process based on surface diusion of Al on an Al seed layer. (1) Al sputter ¯ux (2) Al surface diusion (3) lateral growth (4) TiAl3 reaction front.
induces wetting and simultaneously the formation of an Al-containing metal seed layer. For the purpose of explaining this reaction induced wetting and to introduce some necessary de®nitions, some general principles of reaction enhanced wetting of a liquid on a solid are presented. The equilibrium balance of interfacial energies of a liquid on a solid is expressed by gsv=gsl+glv cosy, where y is the contact angle and gsv, gsl, and glv are respectively the solid± vapor, solid±liquid and liquid±vapor interfacial energies. The driving force for wetting or extension of the liquid/solid interface is related to the amount of reduction in energy by the creation of new liquid±solid interfacial area, i.e. spreading. Spreading will occur as long as there is a driving force i.e. as long as gsvÿgsl>glv. Therefore, under non reactive conditions, the driving force for wetting can be de®ned as (gsvÿgsl). When there is a chemical reaction at the interface, the free energy (dG ) of the reaction enhances the driving force for wetting as indicated: ÿdG gsv ÿ gsl : dAdt In this case, it can be stated that the chemical reaction at the interface determines the degree of wetting. Moreover, gsl and y are time dependent. The non-equilibrium driving force for spreading is expressed by glv (cosy ÿ cosyt), where yt is the time dependent contact angle. It is observed that drops spreading under the in¯uence of interfacial chemical reactions obey the following empirical expression: yt ÿ yf Aeÿt=t where yt is the contact angle at time t, yf is the ®nal stable contact angle and t is a time constant character-
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Fig. 5. Cross section of 0.25 mm vias (aspect ratio 4:1) after the deposition of the Al seed layer at 4258C.
Fig. 6. Cross section of 0.4 mm vias (aspect ratio 2.5:1) after the deposition of the Al seed layer at 4258C.
istic of the liquid±solid reactivity. The ®nal contact angle is inversely proportional to the changes in interfacial energies and to the free energy associated with the reaction. Particularly, the reaction induced spreading has been investigated for Al-containing coatings on ceramic substrates. There is currently no rigorous treatment of wetting kinetics in the presence of an interfacial reaction. From the coating studies, there is, however, some experimental data relevant to our work [17]. The time constant t for the contact angle kinetics of the TiAl3 reaction is typically in the range from 5 to 15 s with a ®nal contact angle, yf , in the range from 10 to 208. The penetration depth of the reaction is an unknown factor in the area of coatings, since the ®lms used are much thicker. The reaction depth is estimated to be 2 mm in a Ti ®lm. This is more than two orders of magnitude thicker than the Ti thickness of the wetting employed in the speed ®ll process. The observed spreading rates are in the range from 0.1 to 5 cm/s. The variations in time constant t and in the spreading rate are attributed to dierences in the availability of pure Ti, i.e. dependent on the purity and the thickness of the Ti layer. Even though the TiAl3 reaction is used to spread the Al on the surface, the reaction may not be allowed to take over the process. If the reaction front (Fig. 4(4)) would reach the surface every new Al atom would be consumed and, as TiAl3 does not ¯ow in the temperature regime considered here, would be lost for the via ®ll. The reaction would subsequently continue until the Ti supply were exhausted. Instead the ¯ow (2) down the sidewall must be balanced with the advancement of
the reaction front to enable the Al surface diusion on an Al surface. Furthermore, in order to avoid a congestion of Al at the opening of the via, the Al deposition rate (1) must be matched with the ¯ow rate (2) so that the material is swiftly transported into the via and the lateral growth (3) remains negligible. The hypothesis developed in the previous section was put into practice by sputtering a 150 nm thick Al seed layer at 12 kW DC and a wafer temperature of 4258C. As described in the previous section the DC power of 12 kW was chosen as a compromise between the Al surface diusion and the advancement of the reaction front. Figs. 5 and 6 show the 0.25 and 0.4 mm vias after the deposition of the seed layer. In contrast to the cold seed layer in Fig. 2 there is no overhang observed. Instead the ®ll of the vias has commenced within the ®rst 6 s of sputtering. The Al has ¯own to the bottom of the vias and about 30%, measuring from the bottom of the via, has been ®lled irrespective of the aspect ratio, as indicated by the arrows. Following the seed layer deposition the DC power was lowered to 1 kW to ensure a void free via ®ll. 70 nm of Al were sputtered at 1 kW in the second step which corresponds to 25 s deposition time (Figs. 7 and 8). No bridging has occurred and the ®ll of the via proceeds further from the bottom to the top. In this remarkably short time the Al layer is planarized on top of some of the 0.25 mm vias whereas the ®ll of the 0.4 mm vias lags somewhat behind. These photos show that the Al ¯ow on the surface is the dominant feature in this via ®ll mechanism. Hence this process has been termed `Al speed ®ll'.
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Fig. 7. Cross section of 0.25 mm vias after the sequential deposition of the Al seed layer and the 1 kW ¯ow at 4258C. Total Al deposition time 31 s.
Fig. 8. Cross section of 0.4 mm vias after the sequential deposition of the Al seed layer and the 1 kW ¯ow at 4258C. Total Al deposition time 31 s.
3.3. The seed layer
The Ti signal consists of two peaks separated by a plateau. The left Ti peak represents the wetting layer, the plateau the TiN layer and the right peak the Ti bottom layer. The Ti wetting layer exhibits a sharp interface at the surface. Another constituent of the surface is Al. Fig. 11 displays a second snapshot of the surface after two seconds deposition which corresponds to about 50 nm Al. There is a striking dierence to the previous AFM analysis: a rapid growth of the Al grains in both the lateral and vertical dimension is observed which gives rise to coalescence of the formerly isolated Al
In order to see if the hypothesis of reaction induced wetting can indeed be realized in the via ®ll the evolution of the seed layer was monitored as a function of ®lm thickness. Fig. 9 shows the surface of the wetting layer after the ignition of the plasma measured by atomic force microscopy. Sub micron Al islands are observed to be spread over the surface. The accompanying Auger Electron Spectroscopy depth pro®le (Fig. 10) reveals the composition of the near surface region.
Fig. 9. AFM picture of the surface of the Al seed layer after the ignition of the Al plasma.
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Fig. 10. AES depth pro®le of the Al seed layer and the Ti/ TiN/TiNx wetting layer after the ignition of the Al plasma.
Fig. 12. AES depth pro®le of the Al seed layer and the Ti/ TiN/TiNx wetting layer after the deposition of 50 nm Al.
islands. This is also re¯ected in the AES depth pro®le (Fig. 12). At the surface only a small concentration of Ti is observed. The previously sharp interface has now considerably broadened. The Al signal appears to consist of 2 parts: a near continuous surface layer, followed by a shoulder which coexists with the broadening of the Ti signal. The AES analysis does not yield information on the chemical make-up of the constituents. In reference [18] it has been shown that TiAl3 is the predominant intermetallic phase until the exhaustion of the Al supply. Thus both the broadening of the Ti signal and the Al shoulder are interpreted as an intermixing of Ti and Al and the onset of the intermetallic phase reaction. Further analysis has shown that if more Al is deposited the Al forms a continuous
surface layer and the subsurface shoulder becomes more pronounced. From the AFM measurements the contact angle of the Al grains on the substrate was extracted. Because the samples constitute a multi phase system, which undergoes rapid changes, the values of the contact angle represent the non equilibrium state of the wetting behavior. Immediately from the beginning of the sputter deposition low values of the contact angle were observed which drop further as the sputtering continues (Fig. 13). The contact angle and the AES measurements illustrate the point of reaction induced wetting that the TiAl3 phase formation helps to spread the Al on the surface. On the other hand the premise that the intermetallic phase formation must be kept at
Fig. 11. AFM picture of the surface of the Al seed layer after the deposition of 50 nm Al.
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Fig. 13. Contact angle of the Al grains of the seed layer as a function of deposition time. 12 kW DC Al, wafer temperature 4258C.
bay could be realized, too. After 2±4 s the ¯ow of Al has outrun the TiAl3 reaction. Thus the ¯ow of Al proceeds on Al seed layer. From FIB cross sections the via ®ll, i.e. the height of the Al in the via over the height of the via, has been extracted for two dierent seed layers. The TiNx wetting layer, onto which the Al ¯ow was accomplished was identical for the two conditions. Because the TiNx is sputtered immediately after the Ti/TiN barrier in the same chamber the Ti concentration in the wetting layer will increase towards the surface as the target is denitrided. It is estimated that the TiNx layer corresponds to a thickness of about 20 nm pure Ti. Taking the density of Ti at 4.5 g/cm3 and the molecular weight at 48 g/mol this gives rise to an amount of about
Fig. 14. Via ®ll as a function of Al DC power (12 kW±150 nm and 1 kW±70 nm) and via diameter. Oxide thickness 1 mm. Wafer temperature 4258C.
Fig. 15. Cross section of 0.25 mm vias after the deposition of 70 nm Al in a 1 step process. Wafer temperature 4258C.
1.2 1017 atoms/cm2. One Al seed layer, which has already been described in the previous section, consists of 150 nm Al sputtered at 12 kW for 6 s. This translates into a deposition rate of 25 nm/s or 1.2 1017 atoms/cm2s (density 2.7 g/cm3 and molecular weight 27 g/mol). The other Al seed layer was sputtered at 1 kW for 25 s to a thickness of 70 nm leading to a deposition rate of 2.8 nm/s or 1.5 1016 atoms/cm2s. Fig. 14 displays the via ®ll of the 2 layers as a function of via diameter. The 12 kW layer gives rise to a rather aspect ratio independent via ®ll as is desired. Contrary to the high power seed layer the 1 kW seed layer yields a strongly feature dependent formation of the Al-containing metal seed layer, i.e. dependent on the precise shape and dimensions of the opening. In other words, the amount of Al supplied on the Ti wetting layer in the time frame of the reaction induced wetting and the formation of an Al-containing metal seed layer is insucient. As a comparison the solid line represents the via ®ll if geometrical considerations are applied which will be described in detail in the next section. The ®ll of the large vias in the 1 kW process proceeds slower than expected on geometrical grounds. The retardation of the Al ¯ow is explained as follows: due to the larger via opening more Ti is present on the sidewall. Because the Al is sputtered slowly more time is given to the TiAl3 reaction which leads to an increased consumption of Al. It is still possible to ®ll the vias fast and reliably at 1 kW as the cross section of the 0.25 mm vias in Fig. 15 shows. The question arises here why there is a need to implement a two step process, consisting of the sequence seed layer and via ®ll, if a straight forward one step process at 1 kW suces. The answer is given by Fig. 16 which displays a cross section of an array of 0.25 mm trenches after the same 1 step process as the one represented in Fig. 15. Contrary to the via the trenches hardly ®lled. This phenomenon is not related to the packing density of
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®nd its application in the via ®ll with a speci®ed aspect ratio on the mask level [19,20]. 3.4. The via ®ll ± the geometrical model
Fig. 16. Cross section of 0.25 mm trenches after the deposition of 70 nm Al in a 1 step process. Wafer temperature 4258C.
the trenches as it has been observed on isolated trenches, too. The striking dierence between the via and trench ®ll is attributed to a larger self shadowing eect of the vias during the deposition of the TiNx wetting layer. As the vias have a sidewall all around a disproportional large portion of the Ti resides near the opening. On the other hand trenches are more `open' structures for PVD even though they might have the same aspect ratio. Consequently the distribution of the Ti should be more even down the sidewall in the trenches. As outlined above a low Al deposition rate allows the intermetallic phase reaction to hinder the Al surface diusion by the consumption of Al, provided the wafer temperature is instantaneously suciently high to allow for the intermetallic phase formation. In the case of vias the place where the ¯ow is hindered is mainly at the opening. Further down it appears to be a self limiting reaction due to the exhaustion of the Ti supply. As for the trenches the reaction appears to occur all down the sidewall, therefore delaying the trench ®ll considerably. Because of the insucient seed layer formation in a one step process the Ti wetting layer needs to be optimized for every geometry separately which is, however, not feasible in a dual damascene. Therefore, the one step process will most likely
In Figs. 7 and 8 it was seen that the Al ¯ow on a seed layer requires more time and material for the larger vias. In order to describe this phenomenon it is assumed that the vast majority of the material present in the via has ¯owed over the edge. This is supported by the pictures in Fig. 3 Ð here the ¯ow of Al is suppressed Ð which show hardly any deposition into the via by line of sight sputtering. It is further assumed that the Al surface diusion occurs on an Al seed layer and the surface curvature is the same for all conditions hence the driving force will not change during this experiment. The description of the via ®ll can then be simpli®ed to a general relationship between demand and supply. The demand for Al is given by the volume V of the recess feature. The supply depends on the circumference C of the recess (Fig. 17). If the ratio of supply over demand is made one obtains a 1/dh relationship for the via (with d the via diameter and h the via height) which serves as a scaling factor to compare dierent aspect ratio vias. This relationship emphasizes that the via ®ll is strongly geometry dependent. Whereas the circumference grows linearly with the diameter, the volume is proportional to the diameter by the power of 2 and to the height in a linear fashion. Supply/demand = circumference C/via or trench volume V Via ®ll Trench ®ll C pd V p d2 =4 h
C 2d 2l V dhl
C 1 4 V dh
C 1 2 V dh
2l 2d
The same considerations can be applied to trench ®ll (see Fig. 17). Because the length l of trench is usually much larger than the width d equation can be simpli®ed to the same form as for
Fig. 17. Sketch of the via (left) and trench (right) ®ll by surface diusion of Al.
the the the the
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G.P. Beyer et al. / Materials Science in Semiconductor Processing 2 (1999) 75±85 Table 1 Comparison of the dierent Al via recipes: speed ®ll and super speed ®ll. The duration and the DC power of the process steps is listed
Fig. 18. The via ®ll versus the via diameter for the Al ¯ow at 1 kW on the 12 kW Al seed layer. Wafer temperature 4258C.
via ®ll. The trench ®ll, however, diers from the via that 1/dh is preceded by a factor of 2 instead of 4. This indicates that the supply of Al is twice as large for the via than for the trench. Or in other words a via with the same height and diameter (width in the case of a trench) ®lls twice as fast as a trench. It appears plausible that the via ®ll proceeds faster because the material can ¯ow into the via from all sides whereas the Al can only ¯ow over the two sidewalls of the trench. This is favorable for the dual damascene scheme because the vias, whose opening are level with the bottom of the trench, can be ®lled whereas the trenches remain open. On the other hand, it can be noted that the driving force for curvature-induced ®lling in the case of vias additionally includes a curvature term in the third dimension, which may oppose the one related with the liner pro®le (cf. Fig. 1). Trenches are only
Fig. 19. Trench (width 0.25 mm, aspect ratio 4:1) after the ¯ow of 70 nm Al on the 12 kW Al seed layer.
Process step
Speed ®ll
Super speed ®ll
Al seed Al ¯ow Remainder Total time
6 s, 12 kW 54 s, 1 kW 19 s, 9 kW 79 s
6 s, 12 kW 19 s, 3 kW 19 s, 9 kW 44 s
two-dimensionally curved. This may reduce the factor 2 dierence in ®lling rate relative to vias, as expected from the geometrical model, accordingly. From FIB cross sections values of the via ®ll due to the Al surface diusion were extracted. The ¯ow conditions were 1 kW DC for 25 s on a 12 kW seed layer. The wafer temperature was 4258C. As can be seen in Fig. 18 the via ®ll is in good agreement with the geometrical model indicated by the 1/dh relationship (solid line). Fig. 19 displays a trench with the same aspect ratio of 4:1 as the via in Fig. 7. On both structures the Al speed ®ll process was implemented i.e. a 12 kW seed layer followed by Al surface diusion at 1 kW for 25 s. These photos show that the ®ll of both structures is possible with the same process which is a stringent requirement for dual damascene. To implement the speed ®ll approach in the back end of line process a reliable ®ll of a large number of vias is required. The via yield on chains containing 106 vias with a diameter of 0.3 mm was studied as a function of the ¯ow and the wafer temperature.
Fig. 20. Cumulative plot of the resistance per 0.3 mm via derived from chains of a 106 vias. Speed ®ll: Al ¯ow at 1 kW for 54 s. Super speed ®ll: Al ¯ow at 3 kW for 19 s, Wafer temperature 425 and 4508C, respectively.
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Table 1 lists the Al recipe: the 12 kW seed layer is followed by the deposition of 150 nm Al in the ¯ow step. The DC power was either 1 kW or 3 kW. As the usage of the latter power leads to a shortening of the recipe it has been termed `super speed ®ll'. After the via ®ll the remainder of the metal stack is deposited at 9 kW. The wafer temperature was 425 or 4508C. At 4508C the speed ®ll recipe produces the highest yield (Fig. 20). Either the decrease of the ¯ow step or the lowering of the temperature leads to a drop in yield though the latter appears to be more critical.
4. Conclusion With the speed ®ll approach it is possible to ®ll dierent back end structures with dierent aspect ratios in a fast and reliable manner. The TiAl3 reaction between the Ti wetting and the Al seed layer is employed to spread the Al immediately from the onset of the Al sputter deposition. At the same time care is taken that the Al ¯ow proceeds on an Al surface by matching the deposition rate and the advancement of the reaction front. This makes it possible to extend conventional Al PVD to the ®ll of deep sub 0.5 mm features. The two components of the speed ®ll approach: the reaction induced wetting and the Al surface diusion have been described in qualitative and quantitative terms.
Acknowledgements Parts of this work have been supported by the European project ACE (EP 24115).
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References [1] Wehner GK. J Appl Phys 1955;26:1056. [2] Rossnagel SM, Hopwood J. Appl Phys Lett 1993;63(24):3285. [3] Rossnagel SM, Hopwood J. J Vac Sci Technol B 1994;12(1):449. [4] Hayden DB, Juliano DR, Green KM, Ruzic DN, Weiss CA, Ashtiani KA, Licata TJ. J Vac Sci Technol A 1998;16(2):624. [5] Chiang T, Sun B, Ding P, Hashim I, Pavate V, Iyer S, Chin B, Xu Z, Narasimhan M. Applied Materials Update 1998;5(2):2. [6] Yao G, Chen S, Khurana N, Xu Z, Taoka M, Aruga M. European Semiconductor 1996;2:15. [7] Dixit GA, Hamamoto KH, Jain MK, Ting LM, Havemann RH, Dobson CD, Jeryes AI, Holverson PJ, Rich P, Butler DC, Hems J. Semiconductor International August 1995;79. [8] Ong E. United States Patent 1994; 5,371,042. [9] Xu Z, Kieu H, Yao T, Raaijmakers IJ. Proc VMIC 1994;158. [10] Gn FH, Liu LJ, Guo M. Proc SPIE 1994;2335:98. [11] Barth HJ. Mater Res Soc Symp Proc 1996;427:253. [12] Webster MN, Dirks AG. Microelectronic Engineering 1997;37±38:313. [13] Winterton SS, Smy T, Dew SK, Brett MJ. J Appl Phys 1995;78(6):3572. [14] Zhao B, Biberger MA, Homan V, Wang SQ, Vasudev PK, Seidel TE. Electronics Letters 1997;33(3):247. [15] Wang HG, Ding P, Yao G, Cha C, Lai S, Abburi M, Xu Z. Applied Materials Update 1997;1(1):2. [16] Guo T, Cheu L, Naik M. Applied Materials HP PVD Update 1997;4:6. [17] Weirauch DA, Balaba WM, Perotta AJ. J Mater Res 1995;10(3):640. [18] van Loo FJJ, Rieck GD. Acta metall 1973;21:61. [19] Ono H, Ushiku Y, Yoda T. Proc VMIC 1990;76. [20] Chen KC, Hsia ST, Kuo JN, Yen H, Lee CY, Kuo CJ. Proc VMIC 1994;374.