HfO2 double-layer gate dielectric fabricated at low temperature

HfO2 double-layer gate dielectric fabricated at low temperature

Materials Research Bulletin 47 (2012) 2923–2926 Contents lists available at SciVerse ScienceDirect Materials Research Bulletin journal homepage: www...

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Materials Research Bulletin 47 (2012) 2923–2926

Contents lists available at SciVerse ScienceDirect

Materials Research Bulletin journal homepage: www.elsevier.com/locate/matresbu

Amorphous InGaZnO thin film transistors with SiO2/HfO2 double-layer gate dielectric fabricated at low temperature Ji-Hong Kim a, Jae-Won Kim a, Ji-Hyung Roh a, Kyung-Ju Lee a, Kang-Min Do a, Ju-Hong Shin a, Sang-Mo Koo b,**, Byung-Moo Moon a,* a b

Department of Electrical Engineering, Korea University, 5-1 Anam-dong, Seongbuk-gu, Seoul, 136-713, Republic of Korea Department of Electronic Materials Engineering, Kwangwoon University, 447-1 Wolgye-dong, Nowon-gu, Seoul, 139-701, Republic of Korea

A R T I C L E I N F O

A B S T R A C T

Article history: Available online 26 April 2012

Amorphous InGaZnO (a-IGZO) thin film transistors (TFTs) with double-layer gate dielectric were fabricated at low temperature and characterized. A stacked 150 nm-thick SiO2/50 nm-thick HfO2 dielectric layer was employed to improve the capacitance and leakage characteristics of the gate oxide. The SiO2/HfO2 showed a higher capacitance of 35 nF/cm2 and a lower leakage current density of 4.6 nA/ cm2 than 200 nm-thick SiO2. The obtained saturation mobility (msat), threshold voltage (Vth), and subthreshold swing (S) of the fabricated TFTs were 18.8 cm2 V1 s1, 0.88 V, and 0.48 V/decade, respectively. Furthermore, it was found that oxygen pressure during the IGZO channel layer deposition had a great influence on the performance of the TFTs. ß 2012 Elsevier Ltd. All rights reserved.

Keywords: A. Amorphous materials B. Laser deposition D. Dielectric properties D. Electrical properties

1. Introduction During the last decades, amorphous silicon (a-Si) has been widely used for thin film transistors (TFTs). However, the need for an alternative to a-Si TFTs for next-generation display has increased. In this regard, transparent oxide semiconductor (TOS) has attracted much attention for use in active-matrix liquid-crystal displays (AM-LCDs), organic light-emitting diodes (OLEDs), and transparent flexible displays due to its good electrical properties, low temperature processing, and high transparency [1–3]. In particular, amorphous InGaZnO (a-IGZO) is one of the most promising materials since it has a high mobility of 10 cm2/Vs and large area uniformity [4–6]. The larger ns-orbital of metal cation is one of the suggested origins to explain the high mobility of a-IGZO [7]. However, the TFTs with conventional SiO2 gate dielectric, that has low dielectric constant, require high driving voltage, although they have some advantages such as low gate leakage current and high stability. Therefore, many researchers have attempted to enhance the gate capacitance by employing high-k dielectric films for low-voltage driving [8]. HfO2 is one of the most attractive highk material because of its good thermal stability, high dielectric constant (25), and large band gap (5.68 eV). However, high-k

* Corresponding author. Tel.: +82 2 3290 3689. ** Corresponding author. Tel.: +82 2 940 5763. E-mail addresses: [email protected] (S.-M. Koo), [email protected] (B.-M. Moon). 0025-5408/$ – see front matter ß 2012 Elsevier Ltd. All rights reserved. http://dx.doi.org/10.1016/j.materresbull.2012.04.134

dielectric has some drawbacks such as large leakage current, high defect density, and low stability [9]. In this work, we report a-IGZO TFTs with SiO2/HfO2 doublelayer gate dielectric fabricated at low temperature. A HfO2 layer was deposited by pulsed laser deposition (PLD) at room temperature on SiO2 dielectric. The additional HfO2 dielectric layer can enhance the effective dielectric constant. Furthermore, the HfO2 layer can also protect the SiO2 from the various chemical attacks caused by the following patterning processes and bombardment of the accelerated ions during the IGZO channel deposition by PLD. The bombardment may deteriorate the quality of the SiO2 gate oxide and increase the leakage current. 2. Experimental Fig. 1 shows the cross-sectional schematic of the bottom-gate aIGZO TFT with the SiO2/HfO2 double-layer gate dielectric. An indium tin oxide (ITO) glass was used as a substrate and was subsequently cleaned using acetone, isopropyl alcohol, and deionized (DI) water rinses. A SiO2 gate oxide layer with a thickness of 150 nm was deposited on the ITO glass substrates by plasma enhanced chemical vapor deposition (PECVD) method at below 250 8C. After that, 50 nm-thick HfO2 was deposited on the SiO2 layer for double-layer gate dielectric using a PLD system at room temperature. A Qswitched Nd:YAG laser (Continuum Surelite III) with a wavelength of 355 nm was used to ablate a HfO2 target. An IGZO channel layer was also deposited by PLD at room temperature with an IGZO ceramic target (In2O3:Ga2O3:ZnO = 1:1:1 mol%). To investigate the influence of oxygen partial pressure, the IGZO films were deposited

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Fig. 1. Schematic of the bottom-gate a-IGZO TFT with the SiO2/HfO2 double-layer gate dielectric.

at various oxygen pressures ranging from 20 to 60 mTorr, and the resistivity was measured by 4-point probe method and transmission lime method (TLM). The deposited IGZO channel was patterned by conventional photolithography to have a width and a length of 240 and 30 mm, respectively. The source and drain electrodes were formed with a Ti/Au layer by using e-beam evaporation followed by a lift-off process. The electrical characteristics of the double-layer gate dielectric and fabricated TFTs were measured by a semiconductor parameter analyzer (Keithley 4200) in a dark box at room temperature. The structural and optical properties were also investigated by X-ray diffraction (XRD) and UV–vis spectroscopy, respectively. 3. Results and discussion Fig. 2 shows the XRD u–2u patterns of the HfO2 and IGZO thin films (inset) deposited for the TFTs. As was expected, both of the films show amorphous phase without any detectable sharp Bragg peaks. The amorphous phase of the HfO2 layer is preferred in terms of the suppression of grain-boundary leakage current and uniformity of the films [10]. Fig. 3 presents the optical transmittance spectra of the TFTs with the SiO2 and SiO2/HfO2 gate dielectric. The average transmittances in both the cases are 80% in the visible region, which implies that the fabricated TFTs can be applied to transparent displays. The capacitance–voltage (C–V) and current density–electric field (J–E) characteristics of the SiO2/HfO2 dielectric are shown in Fig. 4. The results of a 200 nm-thick SiO2 layer are also depicted for comparison. As shown in the C–V curve in Fig. 4(a), the SiO2/HfO2 double-layer shows a higher capacitance of 35 nF/cm2 than SiO2, which is attributed to the high dielectric constant of HfO2. The leakage current density can be observed from the J–E characteristics in Fig. 4(b). The SiO2/HfO2 double-layer shows a small

Fig. 3. Optical transmittance spectra of the TFTs with the SiO2 and SiO2/HfO2 double-layer gate dielectric.

Fig. 2. XRD u–2u pattern of the deposited HfO2 films. Inset shows the XRD patterns of the IGZO thin films deposited at 20, 40, and 60 mTorr.

Fig. 4. Plots of (a) C–V and (b) J–E characteristics of the SiO2/HfO2 double-layer gate dielectric.

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Fig. 5. Output characteristics of the TFT with the SiO2/HfO2 dielectric in which the IGZO channel is deposited at 40 mTorr.

Fig. 7. Transfer characteristics of the TFTs with the IGZO channel layers deposited at 20, 40, and 60 mTorr.

leakage current density of 4.6 nA/cm2 at 0.5 MV/cm, which is much lower value compared with that of SiO2 (134 nA/cm2). These results mean that the SiO2/HfO2 double-layer gate dielectric is effective for the suppression of leakage current and the enhancement of capacitance in the IGZO TFTs. The output characteristics of the TFT with the SiO2/HfO2 dielectric and IGZO channel layer deposited at an oxygen partial pressure of 40 mTorr are shown in Fig. 5. The typical characteristics of n-channel enhancement mode TFTs are observed. The drainsource current (IDS) of the TFT increases linearly with the increase in the drain-source voltage (VDS) under the positive gate-source voltage (VGS) and clearly saturates at the pinch-off voltage. A saturated IDS of 0.23 mA is obtained at VDS and VGS = 10 V. Fig. 6 shows the transfer characteristics at VDS = 6 V. For comparison, the transfer curve of the TFT with the SiO2 dielectric is also shown. The on/off current ratio can be obtained from the largest and smallest IDS values in the transfer curve. The fabricated TFT with the SiO2/HfO2 dielectric shows an on/off current ratio of 106. The saturation mobility (msat) and threshold voltage (Vth) of the devices are extracted by linear fitting to the plot of the square root of IDS versus VGS in the saturation region. The operation of the TFTs in the saturation region can be expressed by the following equation:

msat and Vth are 18.8 cm2 V1 s1 and 0.88 V, respectively. The subthreshold swing (S), which is the VGS needed to reduce the IDS by one decade, can be defined as:

IDS ¼



 C i msat W ðV GS  V th Þ2 2L

for

V DS > V GS  V th ;

where Ci is the capacitance per unit area of the gate insulator, W the channel width, and L the channel length, respectively. The obtained



dV GS ; d log IDS

and is calculated to be 0.48 V/decade. However, The TFT with the SiO2 dielectric shows worse performance than that with the SiO2/HfO2 dielectric. The on/off current ratio is smaller than 106, and Vth increases to 2.13 V. The calculated msat and S are 12.4 cm2 V1 s1 and 0.67 V/decade, respectively. These results can be attributed to better electrical properties (higher capacitance and lower leakage current) of the SiO2/HfO2 double-layer gate dielectric as shown in Fig. 4. The influence of oxygen pressure during the IGZO deposition was also studied. The control of the resistivity of the channel layer is very important for IGZO TFTs, and the resistivity is affected by the oxygen partial pressure during the deposition. In this work, the resistivity of the IGZO thin films increased with increasing oxygen pressure. At 20 mTorr and 40 mTorr, the resistivities were 10 and 2  104 Vcm, respectively. The resistivity of the IGZO film deposited at 60 mTorr was not measurable because of its high resistivity. It is well known that IGZO is an n-type semiconductor because of free electrons generated by oxygen vacancies [11]. Therefore, the resistivity of the IGZO thin films can be controlled by varying the oxygen partial pressure during the deposition. As shown in Fig. 7, the TFTs with the IGZO channels fabricated at 20 and 60 mTorr show poor characteristics. It can be seen that the turn-on voltage of the TFT with the IGZO channel deposited at 20 mTorr shifts to negative value. The insufficient oxygen partial pressure during the deposition results in the low resistivity of the channel layer, which causes the TFT not to operate normally [12]. On the other hand, the TFT with the IGZO channel deposited at 60 mTorr has a very high turn-on voltage above 5 V and much smaller IDS than the TFT fabricated at 40 mTorr. This can be explained by the fact that the carriers to form the channel cannot be dragged sufficiently by the gate electrode owing to the too high resistivity of the IGZO layer. From these results, it can be concluded that the electrical properties of the IGZO TFTs depend strongly on the oxygen partial pressure during the IGZO channel deposition. 4. Conclusions

Fig. 6. Transfer characteristics of the TFTs with the SiO2 and SiO2/HfO2 double-layer gate dielectric.

a-IGZO TFTs with the SiO2/HfO2 double-layer gate dielectric were fabricated at low temperature and characterized. A 50 nm-thick

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HfO2 film was deposited at room temperature on a 150 nm-thick SiO2 dielectric layer by using a PLD. The SiO2/HfO2 exhibited a higher capacitance of 35 nF/cm2 and a lower leakage current density of 4.6 nA/cm2 compared to the 200 nm-thick SiO2 gate dielectric. The fabricated IGZO TFTs with the SiO2/HfO2 double-layer gate dielectric showed a msat, a Vth, and a S of 18.8 cm2 V1 s1, 0.88 V, and 0.48 V/decade, respectively. These good results can be attributed to the gate oxide with the low leakage and high capacitance, and the IGZO channel layer with the appropriate resistivity. It was demonstrated that the control of oxygen pressure during the IGZO channel layer deposition had a great influence on the performance of the IGZO TFTs. These results will contribute to the development of the high performance IGZO TFTs for future device applications. Acknowledgement This work was supported by Korea University Grant.

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