An ultra-low power amplifier for wearable and implantable electronic devices

An ultra-low power amplifier for wearable and implantable electronic devices

Microelectronic Engineering 216 (2019) 111054 Contents lists available at ScienceDirect Microelectronic Engineering journal homepage: www.elsevier.c...

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Microelectronic Engineering 216 (2019) 111054

Contents lists available at ScienceDirect

Microelectronic Engineering journal homepage: www.elsevier.com/locate/mee

Research paper

An ultra-low power amplifier for wearable and implantable electronic devices

T

Fatemeh Karami Horestania, Mohammad Eshghia, , Mohammadreza Yazdchib ⁎

a b

Electrical Engineering faculty, Shahid Beheshti University, Tehran, Iran Biomedical Engineering Department, Faculty of Engineering, University of Isfahan, Isfahan, Iran

ARTICLE INFO

ABSTRACT

Keywords: Wearable devices Bio-amplifier Low power On-chip area Current-reuse technique Electrocardiogram

This paper presents an ultra-low-power CMOS amplifier for Low-frequency biosignal recording applications, especially for implantable biosensors and wearable or portable devices such as wearable electrocardiogram (ECG) recording microsystems that power consumption and on-chip area are the critical constraints. The proposed amplifier consists of two stages. In the first stage, a current reuse topology is used to achieve a lower inputreferred voltage noise power density compared to a normal single-ended common source amplifier. In order to reduce the on-chip area, an inverter based amplifier with high output impedance is used at the output stage of the circuit to reduce the area occupied by the large load capacitance, which is required for having low cut off frequency of 200 Hz. Using this technique, the required load capacitance is decreased to about 2.1 pF. To reduce the power consumption, a ± 0.6 V supply voltage is used, and the transistors are pushed toward sub-threshold region to reduce the bias currents to about 260 nA in the first and the second stages. To validate the design, the proposed amplifier is simulated using 0.18 μm TSMC CMOS technology with Cadence in post-layout level. It is shown that the total power consumption of the proposed amplifier is as low as 640 nW. The proposed amplifier benefits from a CMRR > 125 dB, total input-referred noise of 6.1 μVrms in 200 Hz bandwidth for ECG signal recording, and a closed-loop gain of about 35.1 dB. The layout of the circuit occupies a total area of 0.034 mm2.

1. Introduction Low-voltage and low-power integrated circuits are required in many electronic applications, such as portable, implantable and wearable electronic equipment, bioelectronics and biosensors [1,2]. In this area, the mobile internet-based healthcare systems with the purpose of making the patients capable in recording their biosignals and take the advantages of telemedicine using smart phones [3–5] is undergoing a fast developing rate and it has the potential to have an extremely huge market in the near future. With this motivation, recently, many low-voltage and low-power integrated circuits and building blocks are proposed, designed and implemented [6–10]. Long-term personal and family health monitoring has attracted a great attention among scholars and researchers [11–14]. However, the design of such systems with traditional adhesive electrodes would be unworkable. So, wearable and implantable microsystems would be an attractive alternative [15–17]. Implantable microsystems have demonstrated the potential to improve the quality of the human's life [18]. For example, over the past several years, sensors and systems for



electrocardiogram (ECG) measurements have been developed and refined. The front-end of all ECG systems consists of the sensor electrodes and preamplifiers. But the wires and adhesives employed are unsuitable for long term use, even common 24–48 hours Holter monitoring sessions [15]. A typical biological signal monitoring system is shown in Fig. 1. The bio-amplifier is the most important component for a biopotential recording system in terms of functionality. A bioamplifier needs to amplify biosignals in the range of 50 μV - 500 μV with a noise level of 5 μV–10 μV [19–21]. According to the characteristics of typical biosignals, shown in Fig. 2, a high gain amplifier with a high signal-to-noise ratio (SNR) is desirable [22]. As it is seen, these are low frequency signals with very low amplitude so will be affected by flicker noise very much. Note that, the impedance value for the electrode-skin interface not only depends on the size, type, and constituent materials of the utilized electrodes, it also depends on the electrolyte gel and sweat secretion level [23,24]. Therefore, this equivalent impedance has to be considered in the design of the LNA. Alternatively, the LNA should be designed with a very high input impedance (compared to the

Corresponding author. E-mail address: [email protected] (M. Eshghi).

https://doi.org/10.1016/j.mee.2019.111054 Received 19 October 2018; Received in revised form 26 June 2019; Accepted 2 July 2019 Available online 03 July 2019 0167-9317/ © 2019 Elsevier B.V. All rights reserved.

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Fig. 1. A biopotential recording system.

amplifier circuit based on this technique is presented and described in this section. The section also presents a band pass filter for separating the frequency band of ECG signals. The simulated performance of the proposed bio-amplifier is presented in Section 3. Finally, the conclusions of the work are highlighted in Section 4. 2. The proposed low power, low noise bio-amplifier 2.1. Current reuse technique Stacked, current-reusing topologies have been used extensively in RF transceiver circuits [30–39]. For example, in [30] the current between the LNA and mixers is shared. But the current-reuse technique was first proposed for neural recording single-ended open loop amplifier in [40]. The current-reuse technique results in doubling the amplifier's effective transconductance at the same bias current. This strategy significantly improves the noise-power efficiency, and doubles the amplifier's open loop gain, simultaneously [41–42]. Fig. 3-a illustrates the configuration of a conventional single-ended common source amplifier with an active load. As shown in the figure, in this configuration the input signal is injected to the gate of an NMOS transistor, while a PMOS transistor acts as an active load. Therefore, for 4KT 8KT = 3g .Fig. 3-b illustrates the configthis configuration Vin2 , noise = g

Fig. 2. Voltage and frequency ranges of some common physiological signals. EOG, EEG, ECG, EMG, and AAP refer to the electrooculography, the electroencephalography, the electrocardiogram, the electromyography, and the axon action potential, respectively. (Adapted from [20,21]).

impedance of the electrode-skin interface). Using this method, the high input impedance of the LNA reduces the measurement loading effect of the electrodes [20,25]. Power dissipation is a critical constraint for implantable devices. This is due to the limited available power sources, required battery lifetimes, and to avoid thermal damage to tissue [22–26,27,28]. Since the signals of interest are so small, the front-end amplifier often consumes a substantial fraction of the overall power of the system [29]. Therefore, it is also a critical factor dictating the power dissipation of the system. On the other hand, chips that are designed for implantable application should have had very small area. As it is mentioned above, power consumption, bandwidth, input referred noise, gain and some other parameters are important when a biopotential signal is being recorded. Therefore, all these constraints must be considered while designing a bio-amplifier. This paper proposes a bio-amplifier circuit with low power consumption and acceptable low input-referred noise, while it offers a high gain. The proposed circuit also benefits from a compact on-chip area. The design procedure is particularly focused on decreasing the power consumption and on-chip area, as these are the critical constraints for implantable devices. Since there is a tradeoff between reducing the power consumption, increasing the gain, and lowering the input-referred noise, designing a high-gain, low noise and sub-micro watt amplifier is a challenging task. In order to achieve this goal, in this work, a two-stage amplifier is proposed to achieve a high gain, while currentreuse technique is used in the first stage of the amplifier to decrease the noise level. Furthermore, an inverter based amplifier with high output impedance is used to reduce the value and consequently the on-chip area of the load capacitor, which is used to achieve a small cut off frequency. This paper is organized as follows. In Section 2 the current- reuse technique is briefly explained. Then the details of the proposed

mn

mn

uration of a current-reuse amplifier, where both complementary input transistors are driven together. Thus, both transistors act as amplifiers and amplify the input signal to the output. In this configuration, the equivalent gm is doubled of that for the conventional stage: gmeff = gmn + gmp = 2 gm (assuming that the gm for both n-type and p-type MOS transistors are equal, i.e., gmn = gmp). As a result, the input-referred voltage noise power density of the current4KT 8KT = 3(g + g ) , which is half of reuse configuration equals Vin2 , noise = g meff

mn

mp

Fig. 3. Camparison between conventional single-ended common source stage with an active load (a) and current-reuse stage (b). 2

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2 Vin , noise |2nd stage

2(Vn2, th

11

+ Vn2,1/ f

11

) + 2(Vn2, th

13

+ Vn2,1/ f

13

).

2 gm

13

2 gm

11

g 16KT KP 1 KN 1 g = 1 + m13 + 2 . + × . m13 3gm11 gm11 Cox (W L )11 f Cox (W L)13 f gm11

2

(5) Due to the amplifier's high gain, the input-referred voltage noise of the second stage can be neglected. Therefore, the total Input-referred voltage noise of the amplifier can be approximately calculated from Eq. (6).

Vin2 , noise =

16KT + 2(V2n1,1/f + V2n3,1/f ) 3(gmn + gmp )

Fig. 4. The proposed amplifier with a differential current-reuse amplifier in the first stage.

the power used in a conventional single-ended amplifier with the same bias current. In these relations, K is Boltzmann's constant, T is the absolute temperature in Kelvin and γ is the noise excess factor approximately equal 2/3. 2.2. Bio-amplifier design based on current-reuse technique The schematic of the proposed low-noise bio-amplifier based on the current-reuse technique is shown in Fig. 4. It consists of two stages. The first stage is a fully differential current-reuse amplifier, while the second stage is a differential-input single-output amplifier. By driving the gates of both PMOS and NMOS input transistors in the first stage, the effective transconductance of the stage is doubled compared to that of a conventional differential amplifier. As a result, a significant reduction in the input-referred noise is achieved. Another advantage of this configuration is that, instead of providing separate bias for the gate of the complementary input transistors, the gates of the complementary-input pairs, (M1-M3, and M2-M4), are tied together respectively, that saves one bias reference and simplifies the design. The output thermal noise current for the first stage of the circuit, shown in Fig. 4, is expressed as:

io2, noise =

16KT . (gm1 + gm3) 3

16KT . (gmn + gmp) 3

Vn2 , flicker =

2 Vout , th

Av 2

(1)

=

(g mn +g mp)2 . R 2out

16KT 3(gmn + gmp )

16KT 3 gmn

1 f

(7)

The required frequency band for ECG signals is usually between 0.1 Hz to 200 Hz (or sometimes from 0.1 Hz to 160 Hz). Separating the frequency band required for ECG (or other bio-potential signals) can be achieved by using conventional MOS-Pseudo Resistance elements and on-chip capacitances for low cut off frequency [22,48]. For a filter to achieve this very small high cut off frequency a large capacitor, which in turn requires a large on-chip area, is required. In many cases, this

io2, noise . R 2out (2)

(3)

Table 1 Optimized W/L ratio of the MOS transistors of the proposed amplifier.

It is worth mentioning that if a conventional differential amplifier is used, the input-referred voltage noise would be:

Vin2 , th =

×

2.3. Bandpass filter and inverter-based amplifier

So, the thermal Input-referred voltage noise of the first stage is:

Vin2 , th =

Kf Cox W L

V2n3,1/f

Also note that, sweat may have destructive effect on the measured bio signals of wearable electrodes. Various methods, such as those proposed in [45] and [46], or noncontact electrodes [47] can be used to minimize the undesirable effects of sweating. In order to reduce the power consumption a ± 0.6 V supply voltage, and 260 nA bias currents are selected for both the first and the second stages. According to the above mentioned guidelines, the amplifier circuit is designed. The size of the MOS transistors are listed in Table 1.

Therefore,

Vin2 , th =

(6)

and Where, are the flicker noises of M1 and M3 respectively, in the input. As it is already mentioned, bio-signals are low frequency signals. For example, the frequency of ECG signal recording considered below 200 Hz and sometimes below 160 Hz. Therefore, the dominant source of noise affecting the bio-signals is flicker noise. This noise can be modeled as a voltage source in series with the gate of the transistor, and can be roughly calculated from Eq. (7). In this equation, Vn2, flicker is the flicker noise, Kf is the process dependent constant, Cox is the oxide capacitance, W and L are the width and length of the MOSFET, respectively [44]. Note that, this equation shows that flicker noise is inversely proportional to the dimensions of the MOS transistor. Therefore, selecting a large size (WL) for the input transistors reduces the effect of the flicker noise on the amplifier, which in turn reduces the total input-referred noise of the amplifier. On the other hand, to decrease the power consumption, a low bias current is selected, and for operating the MOS transistors in the saturation region, relatively large length L is selected for the MOSFETs to have a small W/ L ratio. V2n1,1/f

(4)

The total Input-referred voltage noise of the second stage at its input can also be approximately expressed by Eq. (5). This term is divided by the gain of the first stage, i.e.(4(gmn + gmp). (ron‖rop)gm11. (ro12‖ro14)), and then is referred to the input of the amplifier [43].

Transistors

W/L Ratio (μm/μm)

M1 - M2

4 20 25 20 1 1 1.5 8

M3 - M4 M11 - M12 M13 - M14

3

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140

CMRR [dB]

130 120 110 100 90 80 0.1

1

10

100

1000

10000

Frequency [Hz] Fig. 8. The simulated CMRR for the designed bandpass amplifier. 40 -

30

Fig. 5. The diagram of the proposed band pass amplifier.

-

20

Phase

Gain [dB]

Gain 40

100

35

0

50

25

0

20 -50

15 10

-10

Phase [deg.]

30

Gain [dB]

10

-20 1.E-02

1.E-01

1.E+00

1.E+01

1.E+02

1.E+03

-150 1.E+04

Frequency [Hz]

1.E+01 1.E+02 Frequency [Hz]

TT

Fig. 6. The schematic of the gain and phase of the proposed band pass amplifier.

1.E+03

1.E+04

SS

FF

SF

FS

40 30 20

Gain [dB]

1.E-10

input-referred voltage noise of the amplifier [v^2/Hz ]

1.E+00

Fig. 9. The gain of the proposed band pass amplifier in typical mode with temperature variation. The graph shows acceptable performance especially in the range of −10 °C to 50 °C.

-100

5 0 1.E-02

1.E-01

1.E-10 8.E-11

10 0 -10 -20

6.E-11

-30

4.E-11

-40 0.01

2.E-11 0.E+00 1.E-01

0.1

1

10

100

1000

10000

Frequency [Hz]

1.E+00

1.E+01

1.E+02

1.E+03

Fig. 10. The performance of the proposed bandpass amplifier in process variations at standard temporaries. TT: Typical mode, SS: Slow nmos Slow pmos, FF: Fast nmos Fast pmos, SF: Slow nmos Fast pmos, and FS: Fast nmos Slow pmos.

1.E+04

Frequency [Hz] Fig. 7. The input-referred voltage noise of the amplifier (V2/Hz).

capacitor is much smaller than the required capacitance in a filter without an inverter-based amplifier. (The required capacitance to achieve a fH = 200 Hz using the same core of this band-pass amplifier without the inverter-based amplifier stage would be as large as a few hundred pF) However, because of the constraint in the chip area, even smaller capacitors are desired. Therefore, the bias current of the inverter-based amplifier is decreased to lower than 2 nA and its

area is even larger than the area of the amplifier itself. In order to address this issue, the circuit was divided in two sections: gm amplifier and inverter-based amplifier with high output resistance. Fig. 5 illustrate the proposed structure. The transconductance gm consists of first and second stages depicted in Fig. 4. Using the proposed structure, the required capacitance for achieving the fH = 200 Hz is 55 pF. This 4

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Vsupply = ± 0.66 V

Vsupply = ± 0.54 V

40

L

=

H

=

1 3Rinc . C2

35

Gain [dB]

30 25 15 10 5 1.E-01

1.E+00

1.E+01

1.E+02

1.E+03

NEF = Vni, rms

Fig. 11. The gain of the proposed band pass amplifier in typical mode with ± 10% supply voltage variation, i.e. for Vsupply = ± 0.66 V and Vsupply = ± 0.54 V is shown.

CL

(10)

Ainvamp

Cf2 Cf1

2 Itot . UT. 4KT. BW

(11)

Where K is Boltzmann constant, UT is the thermal voltage, Vni,rms is the total input-referred noise of the amplifier, Itot is the total supply current, and BW is the −3 dB bandwidth of the amplifier. Using Eq. (11), calculated NEF for the core of the amplifier with 7.1 KHz bandwidth is equal to 1.8. According to Eq. (11), NEF is inversely proportional to BW and since our band-pass amplifier has a relatively small bandwidth (200 Hz for ECG), the achieved NEF is raised to 9.11. Finally, with increasing the load capacitor to 7.4 pF and changing Cf1 to 0.318 pF, the gain will be 40 dB and the bandwidth will be limited to 40 Hz, which is the proper frequency band for EEG signals recording.

transistors are pushed to the subthreshold region. Accordingly, its output impedance is extremely large and the required load capacitor is decreased to 2.1 pF. It is worth mentioning that the reduction in the onchip area is achieved with the cost of slightly higher power consumption and noise. However, since the on-chip area is one of the main constraints in implantable circuit design, this tradeoff is worthwhile. Another advantage of dividing the circuit in two sections and using the inverter-based amplifier is that the dependence among some parameters such as power, noise, and bandwidth is decreased. This makes the process of designing a circuit with the best performances a simpler task. In this work, we set some parameters in the first and second stages to some acceptable values. Then, the required fH is achieved through the third stage. Consequently, because of the high output impedance of the last stage, the CL required for creating small cut off frequency (200 Hz) will be decreased and therefore the on-chip area is significantly reduced. Eqs. (8) to (10) are used to calculate the gain of the proposed bandpass amplifier as well as fL and fH of the circuit. The value of Rinc produced by MOS-Pseudo resistors (Ma-Mf) is about tera-ohm requiring a very small C2 for creating the small fL. The required high cutoff frequency (fH) is produced by CL and the inverter-based amplifier at the output.

C1 , C2

invamp.

1.E+04

Frequency [Hz]

AM

1 Ro

Ro-invamp, is the output resistance of the inverter-based amplifier. In this design C1 = 6 pF, C2 = 0.35 pF, Cf2 = 2 pF, Cf1 = 0.6 pF and CL = 2.1 pF. Therefore, AM ≈ 25 dB, and the total gain is equal to AM × Ainvamp that is 35.1 dB. To compare the power-noise tradeoff among amplifiers, the noise efficiency factor (NEF) reported in [49] is adopted:

20

0 1.E-02

(9)

3. Simulation results The designed amplifier is simulated with 180 nm TSMC CMOS technology with Cadence software in post layout level. The open-loop gain of the amplifier without MOS-Pseudo resistors and capacitors in absence of the inverter-based amplifier is equal to 104 dB. By using the MOS-Pseudo Resistance elements and on-chip capacitances and also employing an inverter-based amplifier at the output stage, the frequency band that is required for ECG (0.1∽200 Hz) is separated with amplification of about 35 dB. Fig. 6 shows the graph of the gain and phase of the proposed bandpass amplifier. Fig. 7 shows the noise simulation result of the designed amplifier. It is expressed input-referred voltage noise power density versus frequency (V2/Hz). The total input-referred voltage noise of the amplifier is calculated by the root square of the integration of this diagram throughout its bandwidth. This results in a total input-referred noise of 6.1 μVrms in 200 Hz bandwidth for ECG signal recording. Note that, in order to have more details in the recorded ECG signal, in this

(8)

Fig. 12. a) THD versus input frequency for input amplitude of 5 mVp-p. b) THD versus the peak-to-peak amplitude of the input signal at 100 Hz. 5

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the PVT analysis is performed and the results of temperature dependence, supply voltage variations, and process variations are demonstrated in Figs. 9 to 11. Using Fourier transform of human ECG signal it has been found that P and T wave frequency generally lie between 0.5 and 10 Hz, and QRS complex frequency ranges between 4 and 20 Hz, and most of power lies in the range of 0–20 Hz in the frequency domain [51]. Therefore, the bandwidth limited to 50 Hz, which is observed in some corners, is also acceptable. Considering this point, the results shown in Fig. 9, shows that the designed band-pass amplifier has good performance especially in temperatures from −10 °C up to 50 °C. Figs. 10 and 11 shows that the designed amplifier has an acceptable performance in all SS, FF, SF and FS process corners at standard temperature and in ± 10% supply voltage variations ( ± 0.66 V, ± 0.54 V) in typical mode. Notice that maximum power consumption of 700 nW belongs to +10% Vsupply variation, i.e. for ± 0.66 V. Because of the large amplitude of ECG signals (maximum of about 5 mVp-p for QRS peak) compared to other biosignals, the gain of the band-pass bio-amplifier is limited to 35 dB. In order to investigate the distortion level of the amplifier, THD (Total Harmonic Distortion) analysis are conducted and two graphs of THD are plotted. Fig. 12-a shows the THD versus the frequency of the input signal, where the input amplitude is set to 5mVp-p for all cases. It is shown that THD range is below 0.8%. The THD degrades for input frequencies greater than 200 Hz, which is the high cut off frequency for ECG signal. Fig. 12-b shows the THD versus peak-to-peak amplitude of the input signal, where the input frequency is set to 100 Hz for all cases. It is shown that the THD range is lower than 0.7% except for for 10 mVpp. Note that the maximum peak-to-peak ECG signal is about 5 mVp-p. As it is seen in Fig. 12 the amplifier shows an acceptable distortion even for amplitudes of 8 mVp-p and 10 mVp-p. It is worth to mention that the existence of this level of distortion in the maximum amplitude of an ECG signal is not an issue for the diagnoses of the Arythmies cardiacs and sickness. The simulation results show a power consumption of 640 nW when the amplifier uses a ± 0.6 V supply voltage and the bias currents of 260 nA in the first and the second stages. To prove the performance of the amplifier, a sample ECG signal through the option of “pwlf source” in ADE of Cadence was imported as

Fig. 13. The output of the proposed bioamplifier when a sample ECG signal imported from physiobank database [52] is used as the input signal.

Fig. 14. The layout of the designed bandpass amplifier that shows the 0.034 mm2 area of the circuit.

work, the required frequency band for ECG signals is considered to be between 0.1 Hz to 200 Hz. However, in most monitoring or even diagnostic applications, recoding the ECG signal from 0.1 to 150 Hz (or even to about 100 Hz) is sufficient [20,25,50]. Therefore, by designing the circuit for a narrower bandwidth, the SNR and NEF of the proposed circuit can be further improved. A worst-case phase margin of about 50° proves the stability of the bandpass amplifier. Simulated CMRR for the designed band pass bio-amplifier is depicted in Fig. 8. The CMRR is over 100 dB for frequencies below 5 KHz and in the frequency range of the ECG signal recording is > 125 dB. In order to prove the good performance of the proposed amplifier,

Table 2 Summary performance of the presented bio-amplifier and comparison with other previous related works. [8]2012

[37]

2014

[53]2013

[54]2015

[55]2017

[56]2013

This work

Process

0.18 μm CMOS

0.13 μm CMOS

90 nm

90 nm

0.18 μm CMOS

0.18 μm CMOS

Supply Voltage Current Gain

1.2 V 2.57 μA 39.25 dB

1V 2.85 μA 58.7 dB

0.4 V 13.7 μA 49 dB

1.8 V 6.1 μA 48/60 dB

Bandwidth

0.8 V 1.52 μA 51 dB (open loop) 49 KHz

0.6 μm BiCMOS 2.8 V 3.65 μA 39.9 dB

Vin,

± 0.6 V 2˟260 nA 35 dB 104 dB (open loop) 7.1 KHz: core of the amplifier 0.1 Hz∽200 Hz: after filtering for ECG recording 5.5 μVrms in 7.1 KHz BW of the core of the amplifier and before adding filter 6.1 μVrms in 200 Hz BW for ECG (after adding filter for separating this frequency band) 1.8 (for the core of the amplifier with BW = 7.1 KHz) 9.11 (for band pass amplifier BW = 200 Hz)

7.4 KHz

0.49–10.5 KHz

13.5 KHz

0.3 ∽ 290 Hz

__

0.12 Hz ~ 7.6 KHz 3.57 μV

3.81 μV

3.04 μV (0.1 Hz to 100 kHz)

__

NEFa

__

2.5

3.23

1.93 (0.1 Hz to 100 kHz)

__

CMRR

65 dB

> 68 dB

> 100 dB

> 45 dB

108 dB

5 μVrms (1 Hz ∽8 KHz) 3 μVrms (1∽290 Hz) 4.6 (BW: 1 Hz ∽8 KHz) 15 (BW: 1∽290 Hz) 48 dB

Area Power

0.057 mm2 1.2 μW

__ > 3 μW

__ > 10 μW

0.137 mm2 2.85 μW

0.023 mm2 5.5 μW

0.065 mm2 11 μW

rms

> 100 dB In the operating frequency range, 0.1–200 Hz: CMRR > 125 dB 0.034 mm2 640 nW

a Comparison with other works in the table, our amplifier has very lower bandwidth (200 Hz for ECG). So according to Eq. (9) that shows NEF is inversely proportional to BW , the NEF of our band pass amplifier with inverter based amplifier at its output has been raised to 9.11. As it is seen for the core of the amplifier with 7.1 KHz bandwidth, NEF is equal to 1.8, which is much lower than that of other works.

6

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an input test from physiobank database [52]. The related output is shown in Fig. 13. The layout of the designed bandpass amplifier is depicted in Fig. 14 showing 0.034 mm2 on-chip area. Finally, this design is compared to previous related works in Table 2. As it is shown in the table, the power of this design is lower than other cited designs, and its total input-referred voltage noise is in the same range, approximately.

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4. Conclusion This paper has presented the design of a new bio-amplifier targeted for biological signal recordings, especially for ECG recording systems. In this design, we apply current-reuse technique for reducing the input referred noise of the amplifier as well as the consumed power. The design procedure is particularly focused on decreasing the power consumption and area, as these are the critical constraints for implantable devices. The proposed amplifier has been designed and simulated in 0.18-μm TSMC CMOS technology. The proposed amplifier benefits from an input-referred noise of 5.8 μV in 200 Hz bandwidth for ECG recording and the CMRR > 125 dB in the frequency range of the ECG signal recording. It has been shown that the designed amplifier offers an open loop gain of 104 dB and final closed loop gain of 35.1 dB, while consumes only 640 nW from a ± 0.6 V power supply. Furthermore, it has been shown that the circuit on-chip area can be reduced by employing an inverter-based amplifier at the output stage of the circuit. The THD versus the frequency of the input signal, while the input amplitude is set to 5 mVp-p is below 0.8%. The THD versus peak-to-peak amplitude of the input signal is approximately lower than 0.7% when the input frequency is set to 100 Hz. In addition, PVT analysis has shown an acceptable performance of the designed amplifier in all corners. Acknowledgment The authors would like to thank Dr. Ali Karami Horestani and Mahmoud Norouzi for their precious help. References [1] J. Guo, X. Huang, Y. Ai, On-demand lensless single cell imaging activated by differential resistive pulse sensing, Anal. Chem. 87 (13) (2015) 6516–6519. [2] J. Guo, X. Ma, Simultaneous monitoring of glucose and uric acid on a single test strip with dual channels, Biosens. Bioelectron. 94 (2017) 415–419. [3] J. Guo, X. Huang, X. Ma, Clinical identification of diabetic ketosis/diabetic ketoacidosis acid by electrochemical dual channel test strip with medical smartphone, Sensors Actuators B Chem. 275 (2018) 446–450. [4] J. Guo, Smartphone-powered electrochemical biosensing dongle for emerging medical IoTs application, IEEE Transact. Indust. Informat. 14 (6) (2017) 2592–2597. [5] J. Guo, Smartphone-powered electrochemical dongle for point-of-care monitoring of blood β-ketone, Anal. Chem. 89 (17) (2017) 8609–8613. [6] S. Baswa, A. Lopez-Martin, R. Carvajal, J. Ramirez-Angulo, Low-voltage power-efficient adaptive biasing for CMOS amplifiers and buffers, Electron. Lett. 40 (4) (2004) 217–219. [7] V. Stornelli, Low voltage low power fully differential buffer, J. Circuit. Syst. Computers 18 (03) (2009) 497–502. [8] M.R.V. Bernal, S. Celma, N. Medrano, B. Calvo, An ultralow-power low-voltage class-AB fully differential OpAmp for long-life autonomous portable equipment, IEEE Transact. Circuit. Syst. II: Express Briefs 59 (10) (2012) 643–647. [9] L. Safari, S. Minaei, A novel resistor-free electronically adjustable current-mode instrumentation amplifier, Circuit. Syst. Signal Process 32 (3) (2013) 1025–1038. [10] H. Li, H. Bai, Q. Xu, T. Xia, Low-power MicroVrms noise neural spike detector for implantable interface microsystem device, Microelectron. Reliab. 55 (5) (2015) 807–814. [11] Y. Fu, J. Guo, Blood cholesterol monitoring with smartphone as miniaturized electrochemical analyzer for cardiovascular disease prevention, IEEE Transact. Biomed. Circ. Syst. 12 (4) (2018) 784–790. [12] J. Wang, X. Huang, S.-Y. Tang, G.M. Shi, X. Ma, J. Guo, Blood triglyceride monitoring with smartphone as electrochemical Analyzer for cardiovascular disease prevention, IEEE J. Biomed. Health Informat. 23 (1) (2018) 66–71. [13] J. Guo, Uric acid monitoring with a smartphone as the electrochemical analyzer, Anal. Chem. 88 (24) (2016) 11986–11989.

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