Analysis and evaluation of TAB bonds

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World Abstracts on Microelectronics and Reliability 2. R E L I A B I L I T Y

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COMPONENTS,

Gate oxide breakdown statistics in wearout tests of metal-oxide-semiconductor structures. J. SUNE, I. PLACENCIA, E. FARRES, N. A. BARNIOL, F. MARTIN and X. AYMERICH. Microelectron. J. 20(6), 27 (1989). Experimental breakdown data of different MOS structures under different wearout tests support the validity of a new physical approach to the breakdown statistics. This model is based on the idea that the dielectric breakdown is intimately related to the previous degradation of the SiO2 network, and particularly, to the generation of neutral electron trapping sites. The main properties of the widely used extreme-value statistical distributions are preserved, and the parameters involved have a natural physical interpretation. Only two parameters have been used to build up the model and to fit the experimental data: the minimum area that has to be degraded for the breakdown to be effective, and the critical number of traps that has to be locally generated to trigger the breakdown. Although the analytical calculations have provided excellent results, the Monte Carlo method has been shown to be a powerful technique to introduce secondorder effects in the study of the breakdown statistics. Safety and environmental problems of cleaning printed circuit assemblies. B. N. ELLIS. Circuit Wld 16(1), 4 (1989). This paper describes the current (April 1989) problems of finding substitutes for chlorofluorocarbon (CFC) solvents which are becoming regulated for environmental reasons. The cleaning products discussed are hydrochlorofluorocarbons, hydrochlorocarbons, chlorocarbons, water, aqueous saponifiers, light hydrocarbons and terpene/surfactant mixtures. These are examined primarily from the points of view of air and water pollution and operator health and safety. Secondarily, the factors of cost and cleaning efficiency are discussed. Investigation of gate oxide breakdown in CMOS integrated circuits. B. PESlC, S. DIMITRIJEV and N. STOJADINOVIC. Microelectron. J. 20(6), 19 (1989). Investigation of gate oxide breakdown in CMOS integrated circuits, aimed at establishing its dependence on substrate doping (type and level) and its acceleration by an electric field, has been performed in this paper. In order to do this, time-zerodielectric-breakdown (ramp-voltage-stressed I-V) and timedependent-dielectric-breakdown (constant-voltage-stressed l - t ) tests were carried out and the gate oxide breakdown histograms and electric field acceleration factor were determined and discussed in detail. Quo Vadis printed (circuit) board? Seeking the most costeffective interconnect solution for electronic equipment. M. WEINHOLD. Circuit WId 16(1), 13 (1989). Printed (circuit) boards have been used in the electronics industry for the past 25 years and more. The technology used to design and manufacture PCBs is well known and accepted. Recently, however, designers of electronic equipment have shown that the use of newer materials and systems, such as flexible and moulded circuits, hybrid circuits, or a combination of these, can significantly improve the cost/performance ratio for electronic interconnects. This paper examines some of the many possibilities open to electronics designers and how these new opportunities can improve the economics and performance of electronic equipment. PCB plated through hole optimisation: a case study in SPC. M. J. HARRY. Circuit Wld 16(1), 33 (1989). This paper addresses two fundamental issues with regard to the production of printed circuit boards (PCBs). First, the paper presents a statistically based, four-phase strategy aimed at better organising and facilitating the characterisation of a manufacturing process. The fact that the case study addresses copper plating thickness of PCBs is secondary to the characterisation strategy. In this sense, the strategy is uni-

TUBES,

TRANSISTORS

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ICs

versal by nature. Second, the paper provided analytical insight into a new statistical methodology aimed at establishing coupon-to-board correlation. The general concepts surrounding these two issues are embodied within the given PCB case study. Essentially, the case analysis systematically progresses through all four phases of the parameter characterisation strategy, highlighting the key aspects of each phase. In addition, the aforementioned technique for assessing coupon-to-board correlation is given substantive discussion. However, it should be pointed out that a thorough narration pertaining to many of the statistical and engineering details of the case analysis has been deilberately omitted for the sake of brevity and reading ease. As a result of such considerations, it is assumed that the reader has a working knowledge of descriptive and inferential statistics, as well as experiment design. The benefit of this approach is simple--focus is easily given to the analytical strategy and order of execution without the usual clouding imposed by mathematical explanations. On the evaluation of ferroelectric nonlinear capacitors for application in power circuits. ADOLF G. K. LUTSCH, JACOBUS DANIEL VAN WYK and JURGENSJOHANNESSCHOEMAN.1EEE Trans. Compon. Hybrids mfg Technol. 12(3), 352 (1989). A method to select ferroelectric capacitors as nonlinear components for application in turn-off snubber circuits for power electronic switches is investigated. By initiating-without destroying--localized "events" in the dielectric layer of a multilayer capacitor, such capacitors can be selected~and some of them also stabilized--by observing the number of events and the rate of events. This is achieved by exposing them to a high field strength by means of the application of a high voltage from a high-impedance source. The observed phenomena confirm that the conduction is mainly by electrons, as previously found by others. An explanation for the instabilities in the steady-state d.c. current under increasing voltage as observed by other authors is proposed. Components which have been selected in this manner allow the usage of these capacitors at extremely high voltages (approximately 4-6 times the rated voltage for linear applications). An apparatus for the selection and stabilization has been developed. The selected capacitors have a ratio of capacitance at zero voltage to that at the maximum operating voltage of approximately 10:1. The criteria for selecting capacitors for nonlinear applications (these applications are at high field strengths) are discussed. Preliminary results are given for applications of these capacitors in power electronic switching circuits. Analysis and evaluation of TAB bonds. T. C. CFIUNG and H. A. MOORE. Circuit Wld 16(1), 8 (1989). Tape automated bonding (TAB) is one technology which is becoming widely adopted for interconnecting integrated circuits to a substrate or package. Both destructive and non-destructive test methods for evaluation of TAB bonds are analysed and criticised. The key parameters and general guidelines of a destructive beampull test set-up are identified and presented. The key features of four different non-destructive test methods are described and discussed. It is found that no universal solution exists for non-destructive evaluation of TAB bonds, although some methods may be more useful than others under certain conditions and constraints. Data and experimental procedure are presented for correlation of scanning laser acoustic microscopy and beampull data. Cracking of solder connections on paper-base--phenolic printed wiring board. SHOJI E. YAMADA.J. Electron. Engng, Jpn, 40 (October 1989). On the paper-base-phenolic printed wiring board, which is nearly exclusively used in consumer electronics, the circuitry is usually printed only on one side