Analysis on optimal heat exchanger size of thermoelectric cooler for electronic cooling applications

Energy Conversion and Management 76 (2013) 685–690

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Energy Conversion and Management journal homepage: www.elsevier.com/locate/enconman

Analysis on optimal heat exchanger size of thermoelectric cooler for electronic cooling applications Lin Zhu, Hongbo Tan, Jianlin Yu ⇑ Department of Refrigeration & Cryogenic Engineering, School of Energy and Power Engineering, Xi’an Jiaotong University, Xi’an 710049, China

a r t i c l e

i n f o

Article history: Received 29 May 2013 Accepted 11 August 2013

Keywords: Thermoelectricity Cooling Optimization Performance Modeling

a b s t r a c t In this paper, the theoretical analyses are conducted to explore the optimization problems of thermoelectric cooler (TEC) systems applied in electronic cooling. The study mainly focuses on the optimal heat exchanger configuration of a TEC system. The effects of total heat transfer area allocation ratio, thermal conductance of the TEC hot and cold side and TEM element material properties on the cooling performance of the TEC are investigated in detailed based on the developed mathematical model. The analysis results indicate that the highest coefficient of performance (COP), highest heat flux pumping capability of the TEC and lowest cold side temperature can be achieved by selecting an optimal heat transfer area allocation ratio. The optimal heat transfer area allocation ratio mainly depends on the relevant objective functions, the hot and cold side thermal conductance, total heat exchanger size and the TEM element material properties. These results reveal that the heat transfer area allocation ratio is an applicable characteristic of optimum design for TEC systems. It is hoped that the considerations and analysis results may provide guides for the design and application of practical thermoelectric cooler system in electronic cooling. Ó 2013 Elsevier Ltd. All rights reserved.

1. Introduction Currently, continued demand for electronic devices with smaller sizes and functionality enhancements has resulted in significant increases in their heat dissipation. The high heat flux generation from electronic devices causes high operating temperatures for them, which dramatically impact on their performances and reliability. Thus, there is a significant need for specific cooling in electronic devices, where passive or active cooling technologies must be applied. In cooling solutions for electronic devices, traditional passive cooling technologies commonly used include forced-air cooling, liquid cooling and heat pipe cooling etc. However, the passive cooling cannot achieve the required cooling performance due to physical limitations principally related to the heat transfer capabilities. In this case, thermoelectric cooling as an active cooling technique for electronic devices could provide efficient heat transfer and dissipation with a better temperature control capability. Thermoelectric cooling also offers other advantages such as good compactness, high reliability, fast thermal response and excellent flexibility. There has been an increased interest in the application of thermoelectric cooling to electronic and photonic devices, and thermoelectric cooling has actually been used in many diverse

⇑ Corresponding author. Tel.: +86 29 82668738; fax: +86 29 82668725. E-mail address: [email protected] (J. Yu). 0196-8904/$ - see front matter Ó 2013 Elsevier Ltd. All rights reserved. http://dx.doi.org/10.1016/j.enconman.2013.08.014

applications for extending the ability of passive air/liquid cooled heat sink solutions [1]. Significant progress has been made in recent years in applying thermoelectric coolers (TECs) to various electronic devices. Many efforts have been devoted to addresses TEC applications in the electronic cooling, including TEC configuration, performance evaluation and characterization. Among them, Chang et al. [2] and Huang et al. [3] investigated the thermoelectric air/watercooling devices for electronic equipment, which showed that a TEC had higher cooling performance than the conventional air/ water-cooling heat sink only in the effective operating range. Cheng and Huang [4] introduced a non-uniform-current model to simulate transient thermal behavior of thermoelectric coolers and found that the numerical predictions results closely agree with the experimental temperature data. Martínez et al. [5] presented a computational model for thermoelectric self-cooling applications in both steady and the transient state of the whole system and found that the computational model is a powerful tool that will play a key role in the design and development of thermoelectric self-cooling applications. Ahiska and Ahiska [6] developed a new method bases on the thermoemf measurement of a working module to investigate all output parameters of a thermoelectric module and proved the advantage of the new method in approximation accuracy. Ahiska and Dislitas [7] presented a new computer controlled test system and analyzed the values of the output parameters of operating real TE modules and systems.

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Nomenclature A At COP I j k K l N q Q tc th t 0c t 0h

area (cm2) cross section area of the thermoelectric element (cm2) coefficient of performance electrical current (A) electrical current density (A cm2) thermal conductivity of TEC module (W K1 cm1) thermal conductance (W K1 cm2) length (cm) thermocouple number heat flux (W cm2) heat transfer rate (W) cold junction temperature (°C) hot junction temperature (°C) electronic chip average temperature (°C) cooling fluid average temperature (°C)

Fraisse et al. [8] presented and compared simplified models and details models and found that improved and Standard simplified model both have good accuracy in TEC. Tan and Fok [9] showed that basic TEC data can be used to approximate and compare the performances of products from different TEC manufacturers and presented a methodology to assist the designer to size and select the TECs. Zhang et al. [10] conducted an analysis of thermoelectric cooler (TEC) performance for high power electronic packages. Based on the TEC module parameters, two sets of analytical solutions for TECs in system constraints were derived for the junction temperature at a fixed cooling power, and for cooling power at a fixed junction temperature, respectively. The results showed that significant thermal enhancements are achievable based on optimized currents and cooling configurations. Zhang [11] presented a general approach in evaluating and optimizing TEC performance, where the optimal TEC performances can be determined in a straightforward manner. Du and Wen [12] conducted experimental investigation and numerical analysis for one-stage thermoelectric cooler (TEC) considering Thomson effect and found that higher current, higher hot side temperature, or lower heat load can increase the temperature difference between the cold and hot sides. David et al. [13] introduced an optimizing method for improving thermoelectric heat pump performance and showed that it is possible to optimize the device by minimization of the entropy generation in the device. Lee [14] conducted the optimum design of TECs in connection with heat sinks using dimensional analysis methods, and found that there exist optimum parameters subject to the feasible mechanical constraints. Russel et al. [15] examined a TEC based thermal management system which was operated under a range

x

total heat transfer area allocation ratio

Greek symbols a Seebeck coefficient (V K1) q electrical resistivity (X cm) Subscripts c cold-side h hot-side max maximum value min minimum value n n-type semiconductor elements opt optimum value p p-type semiconductor elements

of ambient conditions at different heat fluxes, which showed that the design parameters have a significant impact on the performance of the device at off peak conditions. In the design and development of TEC in electronic cooling applications, the purpose of TEC is to maintain the electronic device junction temperature below a safe temperature by removing the heat rejection from the electronic devices. The key design task is to find the configuration of a TEC system with the relevant design constraints. In spite of many efforts for optimum design as mentioned above, appropriate optimum design still remains a greatly challenging to system designers. The objective of the present study is to establish effective model to determine and optimize the TEC performance within the cooling system constraints. In the modeling, the heat transfer area configuration of the heat exchangers of the TEC hot and cold side is considered as an applied engineering optimization problem. The performance and optimum design conditions of the TEC system with heat exchangers are analyzed in detail for different heat load and operating conditions. Special attention will be focused on the development of a methodology that can assist the designers to select and design suitable TECs for cooling electronic devices in this study. 2. Mathematical modeling The schematic of a TEC system consisting of a thermoelectric module (TEM), a hot side heat exchanger (HHX), a cold side heat exchanger (CHX) and an electronic chip is shown in Fig. 1. It should be noted that we do not select a real electronic chip for the modeling, which is only represented by a schematic cooled object with

Fig. 1. Schematic of a TEC system.

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certain heat load or temperature. In the TEM, a large number of p-type and n-type semiconductor elements are connected electrically in series and thermally in parallel, and then are sandwiched between two ceramic plates. In the HHX (i.e. heat sink), air cooling, liquid cooling or other cooling methods could be the solution to dissipate heat flux from the TEM. In order to pump the heat load from electronic chips, a cold plate (heat spreader) is usually employed as the CHX. The TEC system is modeled using the basic one-dimensional steady method which was carried out in the majority of previous literatures. The basic assumptions made in the modeling include: (a) the material properties of the n-type and p-type semiconductor elements are identical, (b) the material properties of TEM are assumed constant within the operating temperature range, (c) the Thomson effect is neglected and (d) heat losses are ignored. Based on these assumptions, the basic equations for the TEM with two heat exchangers are given by:

"

2

kAt ql I Q c ¼ 2N atc I  ðt h  tc Þ  At 2 l "

where A is the total area of the cold- and hot-side heat exchangers. Note that A is taken as a given value, i.e. it implies that the ‘‘constant’’ is also a design parameter. The constraint may be expressed in terms of an area allocation fraction x:

Ac ¼ xA Ah ¼ ð1  xÞA;

ð10Þ

By combining Eqs. (10) and (5)–(8), we may derive the following expression for the heat flux pumping capability qc, the dissipated heat flux at TEC hot side qh and the TEC coefficient of performance (COP):

8h ih i9 j2 > 2kNAt 0 0 k 0 > t < 1  AKajNA = þ a t j  ðt  t Þ  q l c h c l lAK h ð1xÞ 2 h ð1xÞ h i 2 > > t :  lAK2kNA ; at0h j  kl ðt0h  t0c Þ  ql j2 h ð1xÞ   i q c ¼ h 2 jNAt tÞ t t t þ 2kNA þ lAK2kNA 1  AKajNA  xl2 A4ðkNA 1 þ axAK 2 lxAK c ð1xÞ ð1xÞ c K K ð1xÞ h

kAt ql I 2 Q h ¼ 2N ath I  ðth  tc Þ þ At 2 l

ð1Þ # ð2Þ

COP ¼ Q h ¼ K h Ah ðth 

ð4Þ

where N is the number of TEC thermocouples, a, k and q are the absolute Seebeck coefficients, thermal conductivity and electric resistivity for the n- or p-type thermoelectric materials, respectively; At and l are the cross section area and the length of the thermoelectric element; Ac and Ah are heat transfer area of two heat exchangers CHX and HHX, respectively; Kc is the thermal conductance between the TEC cold junction and the CHX surface, and Kh is the thermal conductance between the TEC hot junction and the HHX surface; Qc and Qh are the heat flow through two heat exchangers, respectively; t0c and t 0h are the average temperatures of the electronic chip and cooling fluid, respectively. tc is the cold junction temperature of the TEM, and th is the hot junction temperature of the TEM; I is electrical current. In the above equations, the number of thermocouples and thermoelectric element dimensions can be directly available from the commercial TEM, and thus these thermal balance equations for the TEC system can be transformed in terms of the TEM parameters. When the two sides are both divided by 2NAt, thermal balance Eqs. (1)–(4) can be rewritten as follows: 2

k j qc ¼ at c j  ðth  tc Þ  ql l 2

ð5Þ

2

k j qh ¼ at h j  ðth  tc Þ þ ql l 2

ð6Þ

qc ¼

K c Ac 0 ðt  t c Þ 2NAt c

ð7Þ

qh ¼

K h Ah ðt h  t 0h Þ 2NAt

ð8Þ

where qc represents the heat flux pumping capability of the TEC, qh is the dissipated heat flux at TEC hot side, j is the electrical current density. Since Ac and Ah describe the physical sizes of the CHX and HHX, we complete the model with the size constraint:

A ¼ Ac þ Ah

ðConstantÞ

h

8h ih i9 2 jNAt > t < 1 þ axAK = þ 2kNA at0h j  kl ðt0h  t0c Þ  ql j2 > xlAK c c h i 2 > > t :  2kNA ; at0c j  kl ðt0h  t0c Þ  ql j2 xlAK c   i q h ¼ h jNAt ajNAt 4ðkNAt Þ2 2kNAt 2kNAt þ þ 1   1 þ axAK 2 2 lxAK AK ð1xÞ lAK ð1xÞ c c xl A K K ð1xÞ

ð3Þ

t0h Þ

c

ð11Þ

h

Q c ¼ K c Ac ðt 0c  tc Þ

h

#

ð9Þ

h

qc qh  qc

c

ð12Þ

h

ð13Þ

Eqs. (5)–(13) constitute the theoretical model of the TEC system based on the total heat transfer area constraint, and introduce x as a design parameter. This model may be used for the analytical optimization of the TEC performance in the case where the fraction x varies as Ac and Ah change while the total area A remains constant. The following section will present several examples of the optimization for TEC. 3. Simulation results and discussion In the following simulations, the commercial Bi2Te3-based semiconductors are selected as TEM element material and the material thermoelectric properties are assumed to be: jan j ¼ jap j ¼ 2:03  104 V K1 ; kn ¼ kp ¼ 0:0176 W cm1 K1 and qn = qp = 9.37  104 X cm. For the geometry dimensions of a TEM unit, the detailed parameters such as the element crosssectional area, length and thermocouple number are obtained directly from the commercial TEC module CP2-127-06L (i.e. Module A) that are summarized in Table 1 [16,17]. The total thermal conductance of the cold side Kc is set to be in the range of 0.12–0.18 W K1 cm2, including the heat spreaders, the ceramic substrate and the thermal grease. The total thermal conductance for the hot sides Kh is set to be in the range of 0.0174–0.2874 W K1 cm2, representing different cooling

Table 1 Thermoelectric parameters of the semiconductor material. Parameters

Module A [16]

Module B [17]

Dimension (mm3) Pellet size (mm3) Imax ðAÞ U max ðVÞ Q max ðWÞ DT max (°C) a (V K1) k (W cm1 K1) q (X cm) Z (K1)

62  62  4.6 2.0  2.0  1.42 14.0 15.4 140.5 67 4.06  104 0.0352 1.874  103 2.51  103

62  62  4.6 2.0  2.0  1.42 16.4 17 194.4 85 4.46  104 0.03286 1.6478  103 3.67  103

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conditions [18]. Finally, the average temperature of the cooling fluid (at the hot side of the TEC system) is set at t 0h ¼ 50  C and the average temperature of the electronic chip (at the cold side of the TEC system, i.e. the cooled object) is set at t0c ¼ 25  C in the following calculations. As well known, there are always maximum performances COPmax and qc,max under the optimum electrical current density, respectively, if other parameters are fixed. In the case of maximum performances, the constraint optimization problem for the heat exchanger sizes has been further solved. The goal is to estimate the optimal area allocation fraction x which gives the best COPmax and qc,max. Fig. 2 shows the variations of COPmax with x for different total heat transfer area A (70–110 cm2). We can see in Fig. 2, the best COPmax can be achieved at an approximate same xopt value (0.40– 0.42) for different A. Although the optimal area allocation ratio xopt is not sensitive to A,COPmax increases with an increase of A. The main reason is that rising A also means an increase in the heat transfer area of both two heat exchangers; thereby this contributes to the reduction of temperature difference across the two heat exchangers, as shown in Fig. 3. In Fig. 3, the changes of the resultant temperature differences (Dt c ¼ t 0c  tc and Dt h ¼ th  t0h ) with x are compared under different A. It can be seen that the two temperature differences have opposite variation tendencies with x. However, the two opposite trends of Dtc and Dth in response to area allocation ratio x lead to an optimum xopt to achieve the best value of COPmax under each A as the results in Fig. 2. This is one of the most important optimum processes in design of a TEC system.

Fig. 2. The variations of maximum COPmax with x for different A.

Fig. 3. The effects of x on Dtc and Dth at different A in the case of COPmax.

The heat transfer performance of the heat sink is also mainly dependent on the type of cooling conditions such as air or liquid cooling. The thermal conductance of the heat sink with different cooling conditions could change the temperature difference across it for a given hot side temperature. This, in turn, could cause a variation in the COPmax of the TEC system. We also consider the hot side thermal conductance as a design parameter to examine its effects on the COPmax, which is shown in Fig. 4. It can be seen that the best COPmax and corresponding xopt are strongly affected by Kh. For the TEC system with the selected Module A, when Kh varies from 0.12 W K1 cm2 to 0.24 W K1 cm2, the best COPmax can be achieved from 0.659 to 0.802, while the xopt also increases from 0.38 to 0.47. As expected, the best COPmax increases with the increase of Kh due to a reduction of the temperature difference across the heat sink. On the other hand, when Kh increases the Ah will be decreased properly to keep the balance between KhAh and KcAc which produces the best COPmax. Hence, the value of the optimum area allocation ratio depends on the cooling conditions of the heat sink. Similar performance tendency can be also found for the TEC system with the selected Module B, as shown in Fig. 4. Obviously, the material properties of TEM element could affect the COPmax of the TEC system. This figure also shows that although the material properties affect the COPmax, the optimum xopt corresponding the best COPmax are not sensitive to the material properties. As well known, improvements in the COPmax can be achieved by raising the figure of merit of thermoelectric materials. Thus, the material properties should be considered as a condition for the optimization design of a TEC system. In fact, thermal conductance of the TEC cold side is not always a practical figure and has a great impact over the performance. Thus, in Fig. 5, we also simulate the cold side thermal conductance as a design parameter to examine its effects on the COPmax. It can be observed that when Kc varies from 0.12 W K1 cm2 to 0.18 W K1 cm2, the best COPmax can be achieved from 0.676 to 0.737, while the xopt decreases from 0.43 to 0.39. The reason is that when Kc increases, Ac will be decreased properly to keep the balance between KhAh and KcAc which produces the best COPmax. Besides, the best COPmax increases with the increase of Kc due to the similar reason for increasing Kh, as explained in Fig. 4. As mentioned above, the maximum performance qc,max can be achieved by modulating the electrical current density at an optimum value. The cases of the qc,max with respect to the area allocation ratio are also considered here. It should be noted that realizing qc,max requires larger A, and thus its value has to be changed to the range of ð320  360Þcm2 to ensure the reasonable temperature difference across the two heat exchangers for the TEC system. The effects of x on qc,max with different A is shown in Fig. 6. The results show that the best qc,max tends to increase as the A increases, correspondingly

Fig. 4. The variations of COPmax with x for different Kh and material properties.

L. Zhu et al. / Energy Conversion and Management 76 (2013) 685–690

Fig. 5. The variations of COPmax with x for different Kc.

Fig. 6. The effects of x on qc,max with different A and Kh.

the xopt almost keeps at the same value (about xopt = 0.39). This is due to the fact that increasing A gives the small temperature differences in the two heat exchangers, which results in the higher qc,max, similar to the results presented in Figs. 2 and 3. In addition, the simulation results in Fig. 6 indicate that the best qc,max is also affected by the Kh, which is proportional to the hot side thermal conductance. Correspondingly, when the Kh increases from 0.12 W K1 cm2 to 0.24 W K1 cm2, the xopt increases from 0.36 to 0.45 at the A of 340 cm2. It is known that TEC systems are used to reduce electronic chip (i.e. cooled object) temperatures in electronic cooling applications. For the specified heat load of electronic chip, careful design to configure the heat exchanger size is required to keep the temperature at the cold side of the TEC system as low as possible. Thus, the simulations based on the above developed model are carried out to evaluate the attainable minimum cold side temperature t0c for a case with a fixed heat load demand. It is worthy note that the optimization problem is handled by minimizing the t0c ; and the optimization variable are the electrical current density j and the area allocation fraction x. First, optimization for a given heat load of electronic chip qc is handled with objective function t0c; min and optimization variable j, i.e. j is searched to achieve the t 0c; min when A and x are fixed. Then, the complete optimization including the x as a complementary optimization variable of the TEC system is handled. Fig. 7 illustrates the variations of t 0c; min with x for different total heat transfer area A when qc is specified to 8 W cm2. The optimization

689

Fig. 7. The variations of t0c; min and corresponding j with x for different A.

results show that whatever the A, x and the optimal value of j corresponds to the t0c; min . It is also shown that the larger the A, the lower the temperature t 0c; min is. In addition, the t 0c; min shows a lowest value corresponding to an optimal xopt of about 0.38–0.39 (for the case considered). Thus, the optimization for given heat load shows that there exists an optimal electrical current density and an optimal configuration of the heat exchanger sizes for the hot and cold sides which leading to the lowest cold side temperature of the TEC system. As explained above, the hot side thermal conductance Kh has an effect on the best performances COPmax and qc,max as well as the correspondent optimal xopt. Similarly, it also affects the optimum design conditions of the TEC system with two heat exchangers to obtain the temperature t 0c; min under a constant heat load and a constant A. In Fig. 8, the change of t 0c; min with x is depicted for different Kh. From this figure, it can be seen that t0c; min decreases with an increase of Kh, and there exists an optimal xopt where the TEC system produces the lowest t 0c; min at a given A. The optimal allocation ratio xopt varies from 0.36–0.44 when Kh increases from 0.12 W K1 cm2 to 0.24 W K1 cm2. Thus, there is an optimum configuration of TEC heat exchanger for a given electronic cooling application, which will depend on the acceptable operating temperature, the heat dissipation from the electronic chip, the material properties of the TEM element, the hot and cold side thermal conductance and total heat exchanger size.

Fig. 8. The variations of t 0c; min with x for different Kh.

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4. Conclusions Theoretical analyses have been conducted to explore the optimization problems of TEC system with respect to the heat exchanger configuration. The total heat transfer area of the heat exchangers is considered as a constraint condition, and the optimum design conditions of the heat exchangers have been presented in cases of the TEC maximum performances COPmax and qc,max as well as minimum cold side temperature t0c . It is found that there exists an optimum heat transfer area allocation ratio for achieving the highest COPmax and qc,max as well as the lowest t0c;min , respectively, which may change with regard to the different objective functions and thermal design conditions including the material properties of TEM element, operating temperature, the heat dissipation from the electronic chip, the hot and cold side thermal conductance and total heat exchanger size. From the results of the above theoretical studies, it is summarized that the heat transfer area allocation ratio is an applicable characteristic of optimum design. Thus, the information of the optimal heat transfer area allocation ratio is particularly important in design of TEC systems. It is hoped that the considerations and analysis results may provide guides for the design and application of practical thermoelectric cooler system in electronic cooling. Acknowledgements This study is financially supported by the National Natural Science Foundation of China (NSFC) under the Grant No. 51276135. The authors would like to thank NSFC for the sponsorship. References [1] Chen MA, Jeffrey Snyder G. Analytical and numerical parameter extraction for compact modeling of thermoelectric coolers. Int J Heat Mass Trans 2013:689–99.

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