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And then there is flanders
61
INTEGRATION News
H o o p s . . . Loops The participants of the Canadian Society for 5th generation research have recently received the steering committee's draft plan, that summarizes the proposals of numerous Canadian researchers. It is widely believed, that Canada cannot afford to do computer hardware research and should therefore concentrate only on software. The director of the Computer Architecture Laboratory at Waterloo blames this opinion to be partially responsible for Canada's poor showing on the international 'high tech' scene. "The Japanese have recognised, that the major component of 5th generation systems is architectural. One will not build 5th generation systems on 4th or 3rd generation hardware. Rather, one has to build complete systems, and building either state-of-the-art software or stateof-the-art hardware without considering them together is likely to be catastrophic". The seven proposals from Waterloo University therefore span the entire range from software to hardware development. Beside a sequential one, the projects aim to construct a parallel Prolog processor based on WaterLoops, called the LogicLoop. The WaterLoop V2/64 is an existing 64-cell prototype--each cell comprising an 8086/8087 processor with 64 kbytes of RAM and 16 kbytes of EPROM--with an Intelsystem 330 for a host. The principal difference between LogicLoop and the existing machine is the amount of primary and secondary memory. The new 64-cell system will be based on the Intel iSBC286/10 processor board and the iSBC020CX 2-Mbyte memoryboard. As a result a computing power in the region of a Cray-1 is predicted. Further developments are expected from the Systems on Silicon Group headed by Seviora, producing VLSI circuits to support logic programming machines.
And then there is Flanders In the field of microelectronics, the ESAT laboratory of Leuven University--not to be confused with Silvar-Lisco--easily ranks between the leading European institutions. Now, the Flanders' government has extended on ESAT in creating the Interuniversity Microelectronics Center (IMEC). It realised itself, that the North-Holland INTEGRATION, the VLSI journal 3 (1985) 61-63 0167-9260/85/$3.30 O 1985, ElsevierScience Publishers B.V. (North-Holland)
62
Integration News
introduction of microelectronics in industry brings revolutionary costs improvement and presents various new prospects for industrial activity. Two centers were started: IMEC and INVENTIVE SYSTEMS. IMEC starts in Leuven, where more than 250 researchers and staff will be accommodated from January 1986 on. The main activities are: - the development of submicron technology and connecting techniques supporting the next generation of VLSI chips, opto-electronic components, surface acoustic wave devices, sensors, convertors... ; - the development of design methodologies for VLSI systems; a support to universities in the training of VLSI designers. It will strengthen the research potential of the three Flemish universities, but IMEC also intends to collaborate with similar laboratories outside Belgium, on large projects or on projects, where the complementary know-how of other laboratories is required. Guest researchers will be invited on an exchange basis. -
Alvey shapes the future of CAD for VLSI The infrastructure requirements of the Alvey CAD Programme have been sketched in the CISP report. During 5 month staff from 15 organisations worked on a part-time basis in 5 groups to identify areas of weakness in generation and interfacing of electronic CAD software so that inter and intra company collaborative developments could be improved and third party software could be incorporated more easily. The CISP report recommends: (1) to establish X-25 datalinks between collaborating companies; (2) to consolidate PASCAL as the CAD tool development language allowing for proper extensions later on; (3) to setup a project to produce an operating system independent 'Conceptual Machine' interface. The Conceptual Machine interface provides a machineindependent foundation upon which portable software can be built; (4) to set up a project to recommend and to develop facilities at the 'Conceptual File Manager' level, to be built on top of the Conceptual Machine. This project would define powerful and portable means of carrying out many of the functions usually offered (nonportably) by operating system file handling facilities; (5) to create data models covering as many aspects of VLSI CAD data as possible; (6) to produce a suitable parser generator to assist in the generation of translators; (7) to extend on the CIF interchange format;
INTEGRATION News
H o o p s . . . Loops The participants of the Canadian Society for 5th generation research have recently received the steering committee's draft plan, that summarizes the proposals of numerous Canadian researchers. It is widely believed, that Canada cannot afford to do computer hardware research and should therefore concentrate only on software. The director of the Computer Architecture Laboratory at Waterloo blames this opinion to be partially responsible for Canada's poor showing on the international 'high tech' scene. "The Japanese have recognised, that the major component of 5th generation systems is architectural. One will not build 5th generation systems on 4th or 3rd generation hardware. Rather, one has to build complete systems, and building either state-of-the-art software or stateof-the-art hardware without considering them together is likely to be catastrophic". The seven proposals from Waterloo University therefore span the entire range from software to hardware development. Beside a sequential one, the projects aim to construct a parallel Prolog processor based on WaterLoops, called the LogicLoop. The WaterLoop V2/64 is an existing 64-cell prototype--each cell comprising an 8086/8087 processor with 64 kbytes of RAM and 16 kbytes of EPROM--with an Intelsystem 330 for a host. The principal difference between LogicLoop and the existing machine is the amount of primary and secondary memory. The new 64-cell system will be based on the Intel iSBC286/10 processor board and the iSBC020CX 2-Mbyte memoryboard. As a result a computing power in the region of a Cray-1 is predicted. Further developments are expected from the Systems on Silicon Group headed by Seviora, producing VLSI circuits to support logic programming machines.
And then there is Flanders In the field of microelectronics, the ESAT laboratory of Leuven University--not to be confused with Silvar-Lisco--easily ranks between the leading European institutions. Now, the Flanders' government has extended on ESAT in creating the Interuniversity Microelectronics Center (IMEC). It realised itself, that the North-Holland INTEGRATION, the VLSI journal 3 (1985) 61-63 0167-9260/85/$3.30 O 1985, ElsevierScience Publishers B.V. (North-Holland)
62
Integration News
introduction of microelectronics in industry brings revolutionary costs improvement and presents various new prospects for industrial activity. Two centers were started: IMEC and INVENTIVE SYSTEMS. IMEC starts in Leuven, where more than 250 researchers and staff will be accommodated from January 1986 on. The main activities are: - the development of submicron technology and connecting techniques supporting the next generation of VLSI chips, opto-electronic components, surface acoustic wave devices, sensors, convertors... ; - the development of design methodologies for VLSI systems; a support to universities in the training of VLSI designers. It will strengthen the research potential of the three Flemish universities, but IMEC also intends to collaborate with similar laboratories outside Belgium, on large projects or on projects, where the complementary know-how of other laboratories is required. Guest researchers will be invited on an exchange basis. -
Alvey shapes the future of CAD for VLSI The infrastructure requirements of the Alvey CAD Programme have been sketched in the CISP report. During 5 month staff from 15 organisations worked on a part-time basis in 5 groups to identify areas of weakness in generation and interfacing of electronic CAD software so that inter and intra company collaborative developments could be improved and third party software could be incorporated more easily. The CISP report recommends: (1) to establish X-25 datalinks between collaborating companies; (2) to consolidate PASCAL as the CAD tool development language allowing for proper extensions later on; (3) to setup a project to produce an operating system independent 'Conceptual Machine' interface. The Conceptual Machine interface provides a machineindependent foundation upon which portable software can be built; (4) to set up a project to recommend and to develop facilities at the 'Conceptual File Manager' level, to be built on top of the Conceptual Machine. This project would define powerful and portable means of carrying out many of the functions usually offered (nonportably) by operating system file handling facilities; (5) to create data models covering as many aspects of VLSI CAD data as possible; (6) to produce a suitable parser generator to assist in the generation of translators; (7) to extend on the CIF interchange format;