Application of epitaxial crystal growth on silicon radiation detectors

Nuclear Instruments and Methods 196 (1982) 131-136 North-Holland Publishing Company

131

APPLICATION OF EPITAXIAL CRYSTAL GROWTH ON SILICON RADIATION DETECTORS K. H U S I M I , S. O H K A W A Institute for Nuclear Study, University of Tokyo, Tanashi, Tokyo 188, Japan C. K I M Department of Electronics Engineering, Korea University, Kodaira, Tokyo 187, Japan S. O S A D A Faculty of Education, Yamanashi University, Kofu, Yamanashi 400, Japan and F. S H I R A I S H I Institute for Atomic Energy, Rikkyo University, Yokohama, Kanagawa 241, Japan

Silicon radiation detectors produced by application of epitaxial crystal growth are reviewed. The epitaxial crystal growth technique is well developed and widely used in semiconductor industries. Therefore, the thickness and the resistivity of the epitaxial silicon layer are well controlled with good uniformities and reproducibilities. The very thin d E epitaxial silicon detector and the integrated E - d E detector are developed based on the uniformity of the thickness of the silicon layer. The epitaxial silicon position sensitive detector is also produced based not only on the uniformity but also on the controllability of resistivity of the epitaxial silicon layer.

1. Introduction The first report of application of the epitaxial crystal growth technique on fabrication of a silicon detector was published in 1977 by Ponpon et al. [1]. They tried to produce a thin silicon detector using the epitaxial layer obtained from the epitaxial silicon wafer by etching off the substrate. After the report, many contributions have been made on this new field of work [4,5,7,8]. In the pre-history of this epitaxial silicon detector, there was much work done concerning the application of the thin silicon layer produced by means of the epitaxial technique on silicon vidicons, integrated circuits and so on [2]. For this purpose, the electrochemical etching method was investigated-by many authors [3] as the basic technique of removing the substrate. This method has the advantage that the substrate is not always required to have a very low resistivity, because chemical dissolution of the substrate is accelerated by the anodic oxidation caused by an electrolytic current. However, distribution of the electrolytic current on the substrate depends upon the electric field in the etching solution. Therefore, the area of the window and the uniformity in thickness of the layer are seriously influenced by the shape of the electrode used. The work done by groups at Saclay [1] and Los Alamos [4] was 0029-554X/82/0000-0000/$02.75 © 1982 North-Holland

performed using this electrochemical etching technique. Meanwhile, the pure chemical preferential etching technique was reported by Muraoka and his group in 1972 [6]. This method is very attractive compared with the conventional electrochemical etching technique. However, in order to apply this technique to the production of thin silicon detectors, good silicon wafers which have high resistivity epitaxial layers grown on heavily doped substrate are required. The result of producing a thin detector by means of this method was obtained after a long delay [7,8], because it took a long time to produce epitaxial silicon wafers suitable for chemical preferential etching. For this silicon wafer, the difference of impurity concentration between the epitaxial layer and the substrate was required to be very large and the so-called autodoping was a serious problem in the production process. During this work, however, it was found that the uniformity of thickness of the epitaxial layer is good particularly in the direction perpendicular to the source gas flow in the process of epitaxial crystal growth. The epitaxial silicon position sensitive detector is based on this observation [10]. The epitaxial integrated E - d E silicon detector is also based on the idea that it is better to use the substrate as the E detector instead of etching it off [l l]. IIl. SOLID STATE DETECTORS

132

Ix Itu.wmi ~,[ M.

errs/a/growd

f:'pilawul

2. Thin epitaxial silicon detector [7.8]

j! Growth

In the chemical preferential etching technique, it has been reported that the etchant composed of I HF. 3 HNO3 and 8 CHsCOOH has an etching rate of 0.7 to 3 # m / m i n for silicon with a resistivity less than 0.015 ~cm, while no appreciable etching is observed for samples with resistivities higher than 0.068 £cm. Therefore, in order to apply this chemical etching technique to the fabrication of thin silicon detectors, good silicon wafers which have high resistivity epitaxial layers grown on heavily doped substrates are required. When the resistivity of the substrate is less than 0.001 f2cm and that of the epitaxial layer is 100 £cm, the resistivity ratio of two layers is more than l0 s and autodoping becomes a serious problem for obtaining good quality wafers. The techniques applied to produce epitaxial wafers suitable for detector use are: 1) Low temperature epitaxial regrowth using monosilane as the source gas. 2) Substrate back-sealing by coating the surface with pure polycrystalline silicon or silicon dioxide. 3) Susceptor sealing with pure polycrystalline silicon coating. 4) Heat treatment of the substrate. 5) Two-step epitaxial regrowth [9]. It is very important to decrease the temperature in the process of epitaxial crystal growth, because vaporization and diffusion of the impurity are seriously dependent on the temperature. Impurities evaporated from the substrate and the susceptor are suppressed by sealing coated with polycrystalline silicon layers. The thermal diffusion of the impurity from the mirror finished surface of the substrate into the epitaxial layer is minimized by heat treatment of the substrate and the twostep epitaxial growth technique [8]. Fig. 1 shows the impurity profiles of the epitaxial silicon wafers measured by using the Impurity Profile Plotter *, which measured the impurity distribution from capacitance versus voltage characteristics of a surface barrier diode made on the epitaxial silicon layer. Though the differences of impurity between epitaxial layers and substrates are very large, the widths of the interfaces between the epitaxial layer and the substrate are 2 #zm for the As substrate and 1 tzm for the Sb substrate and are considerably narrow. The uniformity in thickness of the layer depends upon many factors such as the flow rate of the source gas, the dimensions of the susceptor, the inclination of the susceptor and the temperature of the crystal growth. The thickness of the epitaxial silicon layer measured by using the Film Thickness Gauge ** is shown in fig. 2.

Sill4 1030"c o6~./min

- Temperature Growi'h R a t e

©O

l /,.j!

1

[E

~4!

uJ

P

/

Z

oC)

b

I--

r

Substrate

Layer

E: ~ IOt~ ~_-- Sb dopep
P=IOe ~'lcrn, t=12/z ( Nd • 4 7 x IO t3 ) P= 95 ,('Icrn , t = 10.2~ ( Nd=~.3 X 1013) I

t~ 12

]

L

I0

8

[ _____LA Y

6

4

~

2

B S TRATE

U

0

DISTANCE FROM SUBSTRATE (MICRONS)

Fig. I. Impurity profile of the epitaxial layer grown on Sb-doped and As-doped substrates.

The uniformity in thickness is good in the direction perpendicular to the source gas flow in the process of epitaxial regrowth, while it is not good in the direction parallel with the gas flow. The thickness variation of the layer can be reduced to -+ 2.5% within the whole area by optimizing the conditions of epitaxial crystal growth. We have produced epitaxial silicon layers with thicknesses of 3, 5, 10 and 20 #zm. The thin layer with a thickness of 3 #m is fragile and is broken even by the surface tension of water. From this result, a thin silicon detector with a thickness less than 3/~m will only be available in the form of an integrated E - d E detector.

Direction of measurement

3 -- ..0_

Parl~lel with th= gas flow

--0--

niu

r

e

2 I

g a V-

-2

-Thicknesi

at thl center 10,35pro

--3 --

¢

i

I

I

I

1

t

.l

t

20

is

13

5

o center

5

ro

15

2O edgo

edge

* Product of Southern Instruments Ltd.. England. ** Product of Digilab Inc., U.S.A,

Condition

* Method

I O 15'

DISTANCE (ram)

Fig. 2. Uniformities in thickness of the epitaxial layers,

133

K. Husimi et a L / Epitaxial c~. stal growth

An epitaxial silicon layer thicker than 10 ~m has enough strength for producing a silicon film having a large diameter. We have produced an epitaxial silicon film with a thickness of 20 #m and a diameter of 40 mm by means of the chemical preferential etching technique. These large area silicon films will have useful applications in nuclear radiation measurements.

250

--

-- 25

~J 2 0 0

--

20

Z

z 0

E

"

150

i

I00

15

I0 J

o

3. Epitaxial silicon position sensitive detector [10]

I

50

5

0

0 250

The profile of resistivity of the epitaxial silicon wafer used for fabrication of position sensitive detectors is shown in fig. 3. Resistivities of the epitaxial layer and the substrate are 3.4 ~2cm and 4kflcm, respectively. The epitaxial regrowth technique applied is conventional, but precautions are necessary to keep the uniformity of thickness and to control the resistivity of the epitaxial silicon layer. A strip of the silicon crystal is cut away from the wafer. The ohmic contacts are produced by evaporation of aluminium onto both ends of the strip of the epitaxial layer. The surface barrier electrode is also made by evaporation of gold onto the opposite side of the strip. The resistance of the dividing resistor is measured as 42 k~2 between two ohmic contacts. The spectrum and the linearity curve for a particles from 24RAmcollimated with a mask containing 12 holes are shown in fig. 4. The intrinsic position resolution of this detector is estimated .to be better than 0.22 mm (fwhm). The nonlinearity of this position sensitive detector is also esti-

I

7 ~ I0

6

I //

q

I0

,

o v z < It/)

500

CHANNEL

NUMBER

Fig. 4. Spectrum and linearity curve of the epitaxial position sensitive detector for a particles from 241Am.

mated to be less than 1%. the low resistive epitaxial silicon layer not only prevents a carrier injection from ohmic contacts when the detector is totally depleted but also brings good ohmic contacts with evaporated aluminium layers. The epitaxial crystal regrowth technique has many advantages in producing position sensitive detectors compared with the ion implantation technique, for example, easiness of fabrication. The most important advantage is the fact that the epitaxial silicon layer is free from crystallographic defects. On the other hand, the resistive layer produced by the ion implantation technique contains many crystal defects even after thermal annealing. These crystal defects may trap and release carriers during lateral diffusions of carriers to both sides of the dividing resistor and this would result in an unfavourable effect on the characteristics of the position sensitive detector. In fact, it has been reported that unknown noises are observed in position sensitive detectors produced by the ion implantation technique [11]. Therefore, from the viewpoint of crystal defect, the epitaxial regrowth technique is considered to have the essential superiority in producing position sensitive detectors compared with the conventional ion implantation technique.

5 10

--

4. Epitaxial integrated E - d E silicon detector [12]

n tO

4

,jo

io

EPITAXIAL

LAYER

Z 7-

// ~UBSTRATE

I 0

I0

DISTANCE

I // 20 FROM THE

30q SURFACE

(pro)

Fig. 3. Profile of the spreading resistance of the epitaxial wafer for producing the position sensitive detector.

The epitaxial silicon wafer used for producing the integrated E - d E detector has a N - N + - N structure. The low resistive N + layer is produced on the high resistive substrate by the thermal diffusion of Sb. The epitaxial silicon layer is grown on this Sb-doped layer. The profile of the spreading resistance of the epitaxial silicon wafer is shown in fig. 5. Resistivities of the epitaxial layer and the substrate are estimated to be 80 f~cm and 4 kflcm, respectively. The minimum resistivity of the buried N ÷ layer is also estimated to be 0.015 III. SOLID STATE DETECTORS

134

h. llusimt et a/. . t:~ita.vla/ ~rv,stal grm~th

swept away into E and d E depletion regions by built-in fields which are the results of a large difference of impurity concentration in the buried layer. The built-in potential difference V of two points in a semiconductor, where the impurity concentrations are N,..... and Nmin, is expressed as follows.

I Oi' f --- !Q)

I

LIJ

zl©

I

u')

~ LtJ I 3:

V ....

J

04

I

z © c~ k~J

2

EL CO

5,u.m

©

I

EP[TAXIAL LAYER

SUBSTRATE

THICKNESS

Fig. 5. Profile of resistivity of the silicon wafer used for producing the integrated E-d E detector.

flcm. The thickness of the epitaxial silicon layer of this wafer is 10 #m. Spectra of energy losses in E and d E detectors for particles from 241Am are shown in fig. 6. In this measurement, the bias voltages of E and d E detectors are 200 V and 20 V, respectively. The spectrum of the energy loss (E + d E ) obtained by the analog summation of E and d E signals is 5.26 MeV. The energy of a particles from 241Am is 5.48 MeV, therefore, the energy loss in the dead layer caused by the buried layer is supposed to be 0.22 MeV. The thickness of the dead layer estimated from this value is 1.15 ffm and is much smaller than that of the buried layer. This is due to the fact that free carriers produced in the buried layer are

Room Temperuture bJ 5OO Z Z 250 I 0 200 co k- 150 Z 0 I00 (D 50

,&E 1.68 MeV

E 3.64 MeV

E÷AE 5.26 MeV

5oo

t~

t'

4OO .~..~ , ~ FWHM ~ 102 keV .~ ,, ~ FWHM .[" ? t, 114 keV~-

260 280 300

I

500 ~' , "~k

~

200

FWH M

37.8 keY

I00

580 600 620

840 860 880

CHANNEL NUMBER

Fig. 6. Spectra of E, dE and (E+dE) signals of the detector whose thickness of the dE part is 10 #m.

E-dE

(kT/q).ln(N,,i,/N

'..... ).

From this equation, the built-in electric fields in the buried layer are estimated to be 520 V/cm and 514 V / c m at the sides of E and d E detectors, respectively. As seen from the result, the built-in fields are so high that the dead layer is confined to a narrow portion of the buried layer where the impurity distribution has a flat top. Fig. 7 shows the spectra of energy losses in E and d E parts of another integrated E - d E detector, whose d E detector has a thickness of 5 ~m. The capacitance of the d E detector is about 800 pF and is so high that the electric noise in the output of the preamplifier is large. However, the energy resolution of the d E detector is still less than 100 keV (fwhm). It is interesting to see that a spurious E signal peak is observed in the (E + d E) spectrum. This spurious peak disappears from the (E + d E) spectrum when the analog summation is performed in the coincidence mode of E and d E signals. From this fact, the spurious E peak must be caused by events in which a particles fall upon the outside of the d E electrode, as shown in fig. 8. In this case, carriers created by irradiation of a particles can not be collected into the side of d E detector but into the E side only. The energy difference of the spurious E peak and the real E peak is 140 keV. The reason why this difference occurs is clearly seen in fig. 9, which shows the profile of resistivity of the epitaxial silicon wafer of fig. 5 in an exaggerated form. The buried low resistive layer is divided into threc parts, two drift regions at the E and d E sides and a diffusion region between these drift regions. In the drift regions, free carriers created by incident charged particles are swept away into E and d E sides by built-in fields. In the diffusion region, however, free carriers are collected in E and d E sides by diffusion of carriers. In the normal case that a particles fall upon the d E electrode and there are charge collections into both sides of E and d E detectors, the charge dividing border line is nearly at the middle of this diffusion region. However, in the abnormal case that a particles fall on the outside of the d E electrode and there is no charge collection in the side of the d E detector, free carriers in the diffusion region are collected only into the E detector. Therefore, the charge dividing border line shifts to the side of the d E detector by an amount of 76 tzm, which corresponds to the energy difference of 140 MeV of the spurious E peak and the real E peak. The peak energy of the (E + d E ) spectrum is 5.40

K. Husimi et al.

/ Epitaxial c~stal growth E'tdE

Integrated E-dE Silicon Detector I 200

dE

: 5/Jm, Z S . 3 m m 2 E : 200Jum, 38.5mm Z

dE 1 0 0 0

5.4MsV

E 4.SMeV

dE Pulser

903keV

.-I UJ

135

Z

Z ,< "I"

800 - 59.7keY FWHM

O 89.6ksV

CO I-Z 4OO o o 2OO

86,3ksV " - FWHM

45. I keY FWHM

FWHM

spurious E psak

I

//

0 5O

I O0

350

CHANNEL

,,,,P

I 450

400

NUMBER

Fig. 7. Spectra of E, d E and ( E ÷ d E) signals of the E - d E detector whose thickness of the d E part is 5/xm. A

B

MeV, so that the energy loss due to the dead layer is 80 keV. The thickness of the dead layer estimated from this value is 0.35 #m and nearly half of the shift length of the charge dividing border line. This looks like a r e a . sonable result, because free carriers in the diffusion region are swept away into E and d E sides of the detector in the normal case.

/ E ~

A : normal event B : false event

Fig. 8. Events passing through the d E detector outside of the electrode which produces the spurious E peak.

charge dividing line

Ca+120

N

MeVNe

dE MoV 20

• • .-...~,~'CI ,,~y...

15

~0

~:.--- : :~:y' ,:-~ff.',:., : ' . N= .:- yr. ~.~..... d,'.~.~=~-.~ . . • . .

•

built-in field

\ /

.

..:.

I I I I 0.68pro

."

.

.:~ No

: i i, ....~'-.. 77"-.]]." o

5

0

dE side

. , . .

' "".." '" '.~'~"~'~g~,r.;:,~."

drift region~ built-in field

.

~.~.~,p~~# :.~,;~,~..,, :..- .,,.;.... ~. 4; ~J'.'.;i.~ti'..: -, -e~r~.; Mg

drift region

I

I

I

I

I

I

I

I0

20

30

40

50

60

70

I 80 (MoV)

E+dE Fig. 10. Two-dimensional plots of ( E + d E) and d E signals.

E side

( I 40keV)

diffuoion region

Fig. 9. Schematic diagram showing the behavior of free carriers in the diffusion region of the buried layer. III. SOLID STATE DETECTORS

136

K. tlum,ti et al. / t'2pitawal cS'stat gro~th

In fig. 10 is shown the two-dimensional plot of d E and ( E + d E) signals of the integrated E d E detector for reaction products from a 12C target bombarded by an 80 MeV Ne beam. Heavy ions are separated clearly on this two-dimensional plot up to A1 ions. In this figure, vertical lines caused by channeling effects are also observed at the end of lines of Ne and O ions.

dE[ epitaxial layer

±

T

5. Conclusion Fig. 11. Epitaxial integrated dE d E silicon detector. The epitaxial regrowth method is a well-developed technique for producing integrated circuits and other devices in the semiconductor industry. At present, we can obtain many kinds of epitaxial silicon wafer, which cover a wide range of layer thickness and resistivity with a controlled uniform quality. The lifetime degradation of the substrate caused by a temperature rise in the process of epitaxial regrowth is prevented by means of the "damage gettering" technique. The epitaxial regrowth method has brought to the silicon detector technology a new aspect, the multi-layer structure, which is seen to be useful, for instance, in the integrated E - d E detector. As a modification of this integrated E - d E detector, we will be able to make the integrated d E - d E silicon detector as shown in fig. 11 based on the integrated E - d E detector combined with the chemical preferential etching technique. This detector will be useful for eliminating events seriously affected by the above mentioned channeling effect in identification of heavy ions. This work was performed by collaboration of the Institute for Nuclear Study University of Tokyo, Yamanashi University, Korea University and Rikkyo University. The special epitaxial silicon wafers were kindly supplied by silicon manufacturers. The authors would like to express their thanks to Y. Abe, N. Samizo, S. Takamizawa and K. Kikuchi of Shin-etsu Semicon-

ductor Co. and to R. Takiguchi of Komatsu Electronic Metals Co. for their valuable contributions in producing high quality epitaxial silicon wafers. Thanks are also due to Y. Fuchi of the Institute for Nuclear Study, University of Tokyo for his co-operation. A part of this work is done with support of a grant of scientific research 1980, the Ministry of Education.

References [1] [2] [3] [4]

L.P. Ponpon et al., Nucl. Instr, and Meth. 112 (1973) 465, T. Miyazaki, Japanese Patent Appl. no. 47-10167 (1967). H.J.A. van Dijk et al., J, Electrochem. Soc. 117 11977) 533. C.J. Maggiore et al., IEEE Trans. Nucl. Sci. NS-24 (1977) 104.

[5] C.R. Gruhn, IEEE Trans. Nucl. Sci. NS-24 (19771 99. [6] Y. Sumitomo et al., Electrochem Soc. Spring Meeting, Abstract No. 25 (1972). [7] S. Osada et al., Nucl. Instr. and Meth. 144 (1977) 353. [8] S. Osada et al., IEEE Trans. Nucl. Sci. NS-25 (1978) 371. [9] T. Ishii et al., J. Electrochem. Soc. 122 (1975) 1523. [10] F. Shiraishi et al,, IEEE Trans. Nucl. Sci. NS-28 (1981) 554. [1 t] E. Elad et al., IEEE Trans. Nucl. Sci. NS-25 (1974) 75. [121 C. Kim et al., IEEE Trans. Nucl. Sci. NS-27 (198(t) 258.