- Email: [email protected]
Author index to volume 40 (1994)
Micr0pr0cessing and Micr0pr0gramming Microprocessing and Microprogramming 40 (1994) 943 947
ELSEVIER
Author index to volume 40 (1 994) Aartsen, H.van., s e e Nijhuis, J, Abraham, J.A., s e e Chang, H. Adamides, E.D., Ph.G. Tsalides and A. Thanailakis, Bit-serial VLSl sorter with high reliability specifications Adamis, G., Automatic protocol implementation - Generating C++ code from SDL/PR specifications Agarwal, A., s e e Saleh, K. Alexandres, S., s e e Fern&ndez, J.M. Allen, W.D., R.J. Fornaro, K.P. Garrad and L.W. Taylor, A high performance embedded machine tool controller Antola, A., F. Distante and A. Marchese, High level architectural synthesis: Precedence analysis and automatic cycle detection in data flow graphs Antonakopoulos, T. and N. Kanopoulos, Mutliple boundary scan-paths for minimizing circuitboard test-application time Bailey, C. and R. Sotudeh, HII enhancement for stack based processors Barakova, E., s e e Nijhuis, J. Bartolucci, M. and G.R. Sechi, Rounding error in the computation of opposite sign floating point number parametric addition: A case study Basu, A., s e e Sarker, S. Birbas, M.K., s e e Mariatos, E.P. Blazek, Z., Multiprocessor flight data acquisition system Bonnin, P., E.E. Pissaloux and T. Dillon, Towards a definition of benchmarks for parallel computers dedicated to image processing/understanding Branis, G., s e e Dre, C. Britton, C., s e e Mayes, A. Elsevier Science B.V.
697-702 913-918
523 536
719-722 427-438 825-828
179-191
693-696
377-386
685-688 697-702
833-840 553 576 817 820 871-874
783-790 927 930 811-816
Brudto, P. and H. Krawczyk, A concept of a fully distributed processing strategy oriented for Unix 723-728 Local Area Networks Cawte, H., s e e Sanders, D.A. Centro, S., E.W. Davis, R.A.F. Heaton, P. Ni, D. Pascoli and G. Urso, Real-time parallel processing in high energy physics: architecture of the Blitzen data acquisition system Chandrasekharam, R., V.V. Vinod and S. Subramanian, Genetic algorithm for embedding a complete graph in a hypercube with a VLSI application Chang, C.-J., S. Vassiliadis and J.G. DelgadoFrias, An investigation of binary CLA and ripple CMOS adder designs Chang, H and J.A. Abraham, An efficient critical path tracing algorithm for sequential circuits Charlton, C.C., P.E. Dunne, P.H. Leng, J. Little and M.R. Woodward, Distributing quality-controlled software via the Internet Cheng, B,C., s e e Stoyenko, A.D. Cho, H.R. and S. Moon, Specification and coordination of long-running design activities for CAD environments Christmansson, J., Z. Kalbarczyk and J. Torin, Dependable flight control system by data diversity and self-checking components Chung, I.S. and Y.R. Kwon, An approach to partitioning programs on the functional basis and applications Chung, J.-H., H. Yoon and S.R. Maeng, A new deadlock prevention scheme for nonminimal adaptive wormhole routing Ciccarella, G. and F. Patricelli, Performance evaluation of a distributed system architecture Clark, J . , s e e Tindell, K.
867 870
167-178
537--552
1
21
913-918
861-866 135-150
449-464
207-222
315-326
465-486 803-806 117-134
944
Author
Index/ Microprocessing
and Microprogramming
Clematis, A., Fault tolerant programming for net765-768 work based parallel computing Collins, R and G. Steven, An explicitly declared delayed-branch mechanism for a superscalar 677-680 architecture D'Antone, I., A parallel neural network implementation in a distributed fault diagnosis system Danielopoulos, S.D., see Nikolopoulos, S.D. Davis, E.W., s e e Centro, S. de Amorim, C.L., s e e Fernandes, E.S.T. Delgado-Frias, J.G., s e e Chang, C.-J. Dickerson, B., s e e Mayes, A. DietmOller, PIR., Virus protection using dynamic linking Dillon, T., s e e Bonnin, P. Distante, F., s e e Antola, A. Dre, C., G. Branis and C. Goutis, Image coding using vector quantization of wavelet coefficients Dung, T.M., s e e Miskolczi, J. Dunne, P.E., s e e Charlton, C.C.
305-313 487-497 167-178 689-692 1- 21 811-816 599-604 783-790 693-696 927-930 703-706 861-866
Economopoulos, N.M., s e e Economou, G.-P.K. Economou, G.-P.K., N.M. Economopoulos, D. Lymberopoulos and C.E. Goutis, Experiences accumulated working towards medical decision support systems Edwards, M.D., A generic hardware architecture to support the system level synthesis of digital systems Er~nyi, I and Z. Fazekas, Morphological evaluation of embryo viability
883-886
Fay, D.Q.M., Internet and the electronic classroom Fazekas, K., Multiresolution image decomposition with wavelet transform Fazekas, Z., s e e Erenyi, I. Femminella, A. and A. Omodeo, PVM-based parallel computing: A case study on power plant simulation Fenske, O., s e e Sanders, D.A. Fern&ndez M., s e e Mecha, H. Fernandez, J.M., F. Moreno, S. Alexandres and J. Meneses, A flexible VLSI-based hardware system for medium-large-vocabulary real-time speech recognition Fernandes, E.S.T., A.D. Santos and C.L. de Amorim, Conditional execution: An approach for eliminating the basic block barriers
847-850
40 (1994)
943-947
Ferrandi, F., Reduction of fault detection costs through a BDD formalism 841-846 Fornaro, R.J., see Allen, W.D. 179-191 Garrard, K.P., see Allen, W.D. Ghazfan, D., M. Nolan and B. Srinivasan, Distribution algorithms for document allocation in multiprocessor information retrieval systems Ghose, K., The architecture of response-pipelined content addressable memories Gianuzzi, V., Coupling algorithms for replicated objects and processes Gimenez, D., s e e Verd~. Gopal, B. and S. Manohar, VLSI architecture for the Winograd Fourier Transform algorithm Gopi, M.S. and S. Manohar, VLSI architectures for the computation of uniform B-spline curves Goutis, C., s e e Dre, C. Goutis, C., s e e Taksaki, A. Goutis, C.E., s e e Economou, G.-P.K. Gu~tin, V. and J. Virant, Pattern recognition with fuzzy neural network Gu~,tin, V., Realization of a fuzzy Boolean neural network classifier Gy~rk~s, J., Measurements in software requirements specification process
179-191
327-354 387 410 799-802 919-922 605-616 617-626 927-930 829-832 883-886 935-938 23
31
893-896
883-886
225-240 931-934
923-926 931-934
875-878 867-870 821-824
825-828
689-692
Han, K., s e e Jung, I. Heaton, R.A.F., s e e Centro, S. Hermida, R., s e e Mecha, H. Hudson, A.D., s e e Sanders, D.A. Hwang, B. and S. Moon, Design and evaluation of access method for multi-dimensional objects in spatial databases
755-758 167-178 821-824 867-870
627 650
Ignatius, P.P. and C.S.R. Murthy, Optimal scheduling of independent jobs in multiprocessor sys651-672 tems 261-274 Inglett, S.R., see Miller, L.L. Jain, K.K. and V. Rajaraman, Parallelism meausres of task graphs for multiprocessors Jansen, W., s e e Nijhuis, J. Janssens, G.K., Delay time computation for an active star topology local area network Josifovski, V., s e e Savnik, I. Jubb, M.J. and A. Purvis, Analysis of network protocol performance in the context of multiworkstation parallel distributed applications
249-259 697-702 241-248 905-908
807-810
Author
Index/ Microprocessing
and Microprogramming
Jung, I., K. Han and S. Moon, Middleware transaction manager in multidatabase management systems 755-758 Kalbarczyk, Z., s e e Christmansson, J. Kameas, A.D., s e e Zaharakis, I.D. Kandus, G., s e e Novak, R. Kandus, G., s e e Pu~ko, M Kang, S., s e e Sohn, Y. Kanopoulos, N., s e e Antonakopoulos, T. Kapus-Kolar, M., s e e Pu~ko, M. Karshmer, A I., J.N. Thomas and N Krivokapic, On implementing computer networking on existing cable TV plants: Some interesting proposals Khalid, H., s e e Obaidat, M.S. Kim, C.S., s e e Lee, M. Kim, G-C., s e e Park, Y-K. Kim, K., J. Lee and S. Moon, Scheduling cooperative transactions in distributed database systems Kim, K., K. Kwon and S. Moon, Development of object-oriented database management system: OOIM King, G.A., s e e Wardak, A.A. Kodres, U.R., s e e Mota, G.F. Krawczyk H, s e e Brud|o, P. Krivokapic, N., s e e Karshmer, A.I. Kwon H. and S. Moon, Reverse serializability as a correctness criterion for optimistic concurrency control Kwon, K., s e e Kim, K. Kwon, Y R, s e e Chung, I.S. Larsson, M., Towards amalgamating high-level synthesis and proof systems Lawson, H.W., Parallel processing in embedded real-time systems Lee, J., s e e Kim, K. Lee, M., S.L. Min and C.S. Kim, A worst case timing analysis technique for instruction prefetch buffers Lee, Y. and S. Moon, Cost-optimal dynamic data replication for distributed database systems: DYVO Lee, Y.J., s e e Seo, S.K Legat, P., s e e Sv6da, M Leng, P.H., s e e Charlton, C.C. Lins, R.D., M.G. Neto, LF. Neto and L.G. Rosa, An environment for processing images of historical documents
40 (1994)
943-947
Little, J. s e e Charlton, C.C. Lymberopoulos, D., s e e Economou, G.-P.K.
747 750 751 754 879-882 861 866
MacGlashan, S, M J Taylor and R Rada, A hypermedia data model for public space and computer aided learning Maeng, S.R., s e e Chung, J.-H. Mahmud, S.M., Models of asynchronous packetswitched multiple and partial multiple bus systems Majumdar, A.K., s e e Sarkar, S. Majumdar, A.K., s e e Sarkar, S. Mall, R and L M Patnaik, Automatic verification of distributed logic specifications Manohar, S., s e e Gopal, B. Manohar, S., s e e Gopi, M.S. Marchese, A., s e e Antola, A. Mariatos, E.P, P Merakos, M.K. Birbas and A.N. Birbas, Hardware programming using C + + Mayes, A., B. Dickerson and C. Britton, Implementing associations between objects McConnell, R K, s e e Quill, J C Mecha, H., M. Fernandez, R. Hermida, D Mozos and K. Birbas, A.N., s e e Mariatos, E P Meneses, J., s e e Ferandez, J.M. Merakos, P., s e e Mariatos, E.P. Miller, L.L. and S.R. Inglett, Enhancing performance in a parallel file system Milligan, P., s e e Quill, J C. Min, S.L, s e e Lee, M. Miskolczi, J, T.M. Dung, K. Tarnay and J Szabo, Conformance testing of X.25 packet level Mohori~:, T., s e e Savnik, I. Moon, S., s e e Jung, I. Moon, S., s e e Kim, K. Moon, S., s e e Kim, K. Moon, S., s e e Kwon, H. Moon, S., s e e Lee, Y. Moon, S, s e e Sohn, Y Moon, S., s e e Cho, H.R. Moon, S., s e e Hwang, B. Moon, S., s e e Yoon, Y Moreno, F., s e e Fernandez, J.M. Mota, G.F., M.L. Nelson and U.R. Kodres, Objectoriented decomposition for distributed systems Mozos, D, s e e Mecha, H Murthy, C.S.R., s e e Ignatius, P.P.
939-942
Nelson, M.L., s e e Mota, G.F. Neto, L F, s e e Lins, R D
207 222 855 860 795-798 707 710 733 736 377 386 707 710
355 373 411 426 681-684 737 742
743-746
729 732 65- 75 91-102 723-728 355-373
759-764 729 732 315-326
909-912 83- 90 743 746
681 684
945 861-866 883 886
851 854 465-486
33- 42 499 520 553 576 43 56 605-616 617 626 693-696 817 820 811 816 773 776 817 -820 825-828 817 820 261 -274 773 776 681 684 703 706 905--908 755 758 729-732 743-746 759 764 747-750 733 736 449-464 627 650 151 166 825-828 91-102 821 824 651 672 91-102 939 942
946
Author
Index/Microprocessing
Neto, M.G., s e e Lins, R.D. Ni, P., see Centro, S. Nijhuis, J., H.van, Aartsen, E. Barakova, W. Jansen and B. Spaanenburg, On the optimal mapping of fuzzy rules on standard micro-controllers Nikolopoulos, S.D. and S.D. Danielopoulos, Oddeven, compare-exchange parallel sorting Nolan, M., s e e Ghazfan, D. Novak, R. and G. Kandus, Adaptive Steiner tree balancing in distributed algorithm for multicast connection setup Obaidat, M.S., H. Khalid and K. Sadiq, A methodology for evaluating the performance of CISC computer systems under single and two-level cache environments Oh, Y. and S.H. Son, Scheduling hard real-time tasks with tolerance of multiple failures Olcoz, Clock cycle estimation based on dead time and control unit area minimization Olcoz, K., s e e Mecha, H. Omodeo, A., s e e Femminella, A. Paek, Y.-K., J. Seo and G.-C. Kim, Constructing a domain dependent case-base for database schema design with case-based reasoning Pascoli, D., see Centro, S. Patnaik, L.M., see Mall, R. Patricelli, F., s e e Ciccarella, G. Petrou, L., see Samoladas, V. Pintelas, P.E., s e e Zaharakis, I.D. Pissaloux, E.E., s e e Bonnin, P. Poland, G.A., s e e Sanders, D.A. Ponce, A.M., Documenting the process of conformance testing Pu~ko, M., M. Kapus- Kolar and G. Kandus, Automated derivation of protocols implementing intelligent network services Purvis A., s e e Jubb, M.J. Pyssysalo, T., Proving properties of a new high speed data bus with predicate/transition nets
and Microprogramming
939-942 167-178
697-702 487-497 327-354
795-798
411 426 193-206 821-824 821-824 875 878
737-742 167-178 43- 56 803-806 275-289 855-860 783-79O 867-870 715-718
707-710 807-810 791-794
Quill, J.C., P. Milligan and R.K. McConnell, A knowledge based approach to loop restructur773-776 ing Rada, R., s e e MacGlashan, S. Rajaraman, V., see Jain, K.K.
851-854 249-259
40 (1994)
943-947
Rhodes, R.L., s e e Wardak, A.A. 65- 75 Romanovsky, A., The problems of designing a conversation scheme for concurrent object oriented languages 897-900 Rosa, L.G., s e e Lins, R.D. 939-942 Rykowski, J. and W. Wieczerzycki, Using versioned object-oriented data in programming languages 901-904
Sv~da, M., An implementation-directed design method for microcontroller software 291-301 ,~veda, M., Design and development of industrial measurement system ~ architecture and software 887-892 Sv~da, M., R. Vrba., P. Leg&t and F. Zezulka, ASI instrumentation 879-882 S~nchez, J.J., s e e Verd~. 919 922 Sadiq, K., s e e Obaidat, M.S. 411-426 Saleh, K. and A. Agarwal, Efficient checkpointing procedures for fault tolerant distributed systems 427-438 Samoladas, V. and L. Petrou, Special-purpose architectures for fuzzy logic controllers 275 289 Sanders, D.A., A.D. Hudson, H. Cawte, O. Fenske, G.A. Poland and G.E, Tewkesbury, Computer modelling of single sludge systems for the computer aided design and control of activated sludge processes 867-870 Santos, A.D., s e e Fernandes, E.S.T. 689-692 Sarkar, S., A.K. Majumdar and A. Basu, Interface design and controller synthesis of digital systems in an object oriented environment 553-576 Sarkar, S., A.K. Majumdar and R.K. Sen, Enhanced systolic array implementations of some graph problems 499-520 Savnik, I., T. MohoriE and V. Josifovski, Extending database programming language with declarative querying facilities 905-908 Schhnbauer, F., Database cache requirements calculation using near-line data access traces in a user transaction system 769-772 Sechi, G.R., s e e Bartolucci, M. 833-840 Sen, R.K., see Sarkar, S. 499-520 Seo, J., s e e Paek, Y-K. 737 742 Seo, S.K. and Y.J. Lee, Optimal evaluation of path predicates in object-oriented queries 751 754 Seppanen, V., Euromicro's close encounter of the arctic circle-in real time 77- 80 Shen, H., Efficient message routing in ~ - n e t w o r k 57 64
Author
Index / Microprocessing
Sohn, Y., S. Kang and S. Moon, Concurrency control scheme in Multi-level secure database management systems Son, S.H., see Oh, Y. Song, X., An efficient DM switchbox router Sotudeh, R., s e e Bailey, C. Spaanenburg, B., s e e Nijhuis, J. Srikant, Y.N., s e e Venugopal, V. Srinivasan, B., s e e Ghazfan, D. Steven, G., s e e Collins, R. Stoyenko, A.D., L.R. Welch and B.C. Cheng, Response time prediction in object-based, parallel embedded systems Subramanian, S., see Chandrasekharam, R. Szabo, J., s e e Miskolczi, J. Tarnay, K., s e e Miskolczi, J. Tasalides, Ph.G., see Adamides, E.D. Tatsaki, A. and C. Goutis, A bit-serial VLSI architecture for the 2-D discrete cosine transform Taylor, L.W., see Allen, W.D. Taylor, M.J., s e e MacGlashan S. Tewkesbury, G.E., s e e Sanders, D.A. Thanailkis, A., see Adamides, E.D. Thomas, J.N., see Karshmer, A.I. Thor, M., HP-FLEXAR: A reconfigurable multi-unit heterogeneous topology architecture for time critical applications Tindell, K. and J. Clark, Holistic schedulability analysis for distributed hard real-time systems T~ro, M. and G. Ziegler, Validation of abstract test suites with use of SDL Torin, J., see Christmansson, J.
and Microprogramming
Urso, G., 733-736 193-206 439 446 685-688 697 702 577 596 327-354 677 680
135 150 537-552 703-706 703-706 523-536 829-832 179-191 851-854 867-870 523-536 355 373
777-782 117-134 711 714 207-222
see
40 (1994)
947
943-947
Centro, S.
Vassiliadis, S., see Chang, C.-J. Venugopal, R. and Y.N. Srikant, Scheduling expression trees with register variables on delayed-load architectures Verd(J, I., D. Gim6nez and J.J. Sanchez, Three dimensional image synthesis in transputers Verhulst, E., Virtuoso: A virtual single processor programming system for distributed real-time applications Vinod, V.V., see Chandrasekharam, R. Virant, J., s e e Gu~tin, V. Vrba, R., s e e ~;v~da, M.
167 178 1
21
577 596 919-922
103 115 537 552 935 938 879-882
Wardak, A.A,, G.A. King and R.L. Rhodes, A microprogram-based 3-D image generation system using the Am29300 family 65- 75 Welch, L.R., see Stoyenko, A.D. 135-150 Wieczerzycki, W., s e e Rykowshi, J. 901 904 Woodward, M.R., s e e Charlton, C.C. 861-866 Yoon, H., see Chung, J.-H. 465-486 Yoon, Y. and S. Moon, Integrated commitment protocol for parallel transaction processing in real-time systems 151-166 Zaharakis, I,D., A.D. Kameas and P.E. Pintelas, MeT: The expert methodology tutor of GENITOR 855-860 Zezulka, F., s e e Sv~da, M. 879-882 Ziegler, G., see T6ro, M. 711-714
ELSEVIER
Author index to volume 40 (1 994) Aartsen, H.van., s e e Nijhuis, J, Abraham, J.A., s e e Chang, H. Adamides, E.D., Ph.G. Tsalides and A. Thanailakis, Bit-serial VLSl sorter with high reliability specifications Adamis, G., Automatic protocol implementation - Generating C++ code from SDL/PR specifications Agarwal, A., s e e Saleh, K. Alexandres, S., s e e Fern&ndez, J.M. Allen, W.D., R.J. Fornaro, K.P. Garrad and L.W. Taylor, A high performance embedded machine tool controller Antola, A., F. Distante and A. Marchese, High level architectural synthesis: Precedence analysis and automatic cycle detection in data flow graphs Antonakopoulos, T. and N. Kanopoulos, Mutliple boundary scan-paths for minimizing circuitboard test-application time Bailey, C. and R. Sotudeh, HII enhancement for stack based processors Barakova, E., s e e Nijhuis, J. Bartolucci, M. and G.R. Sechi, Rounding error in the computation of opposite sign floating point number parametric addition: A case study Basu, A., s e e Sarker, S. Birbas, M.K., s e e Mariatos, E.P. Blazek, Z., Multiprocessor flight data acquisition system Bonnin, P., E.E. Pissaloux and T. Dillon, Towards a definition of benchmarks for parallel computers dedicated to image processing/understanding Branis, G., s e e Dre, C. Britton, C., s e e Mayes, A. Elsevier Science B.V.
697-702 913-918
523 536
719-722 427-438 825-828
179-191
693-696
377-386
685-688 697-702
833-840 553 576 817 820 871-874
783-790 927 930 811-816
Brudto, P. and H. Krawczyk, A concept of a fully distributed processing strategy oriented for Unix 723-728 Local Area Networks Cawte, H., s e e Sanders, D.A. Centro, S., E.W. Davis, R.A.F. Heaton, P. Ni, D. Pascoli and G. Urso, Real-time parallel processing in high energy physics: architecture of the Blitzen data acquisition system Chandrasekharam, R., V.V. Vinod and S. Subramanian, Genetic algorithm for embedding a complete graph in a hypercube with a VLSI application Chang, C.-J., S. Vassiliadis and J.G. DelgadoFrias, An investigation of binary CLA and ripple CMOS adder designs Chang, H and J.A. Abraham, An efficient critical path tracing algorithm for sequential circuits Charlton, C.C., P.E. Dunne, P.H. Leng, J. Little and M.R. Woodward, Distributing quality-controlled software via the Internet Cheng, B,C., s e e Stoyenko, A.D. Cho, H.R. and S. Moon, Specification and coordination of long-running design activities for CAD environments Christmansson, J., Z. Kalbarczyk and J. Torin, Dependable flight control system by data diversity and self-checking components Chung, I.S. and Y.R. Kwon, An approach to partitioning programs on the functional basis and applications Chung, J.-H., H. Yoon and S.R. Maeng, A new deadlock prevention scheme for nonminimal adaptive wormhole routing Ciccarella, G. and F. Patricelli, Performance evaluation of a distributed system architecture Clark, J . , s e e Tindell, K.
867 870
167-178
537--552
1
21
913-918
861-866 135-150
449-464
207-222
315-326
465-486 803-806 117-134
944
Author
Index/ Microprocessing
and Microprogramming
Clematis, A., Fault tolerant programming for net765-768 work based parallel computing Collins, R and G. Steven, An explicitly declared delayed-branch mechanism for a superscalar 677-680 architecture D'Antone, I., A parallel neural network implementation in a distributed fault diagnosis system Danielopoulos, S.D., see Nikolopoulos, S.D. Davis, E.W., s e e Centro, S. de Amorim, C.L., s e e Fernandes, E.S.T. Delgado-Frias, J.G., s e e Chang, C.-J. Dickerson, B., s e e Mayes, A. DietmOller, PIR., Virus protection using dynamic linking Dillon, T., s e e Bonnin, P. Distante, F., s e e Antola, A. Dre, C., G. Branis and C. Goutis, Image coding using vector quantization of wavelet coefficients Dung, T.M., s e e Miskolczi, J. Dunne, P.E., s e e Charlton, C.C.
305-313 487-497 167-178 689-692 1- 21 811-816 599-604 783-790 693-696 927-930 703-706 861-866
Economopoulos, N.M., s e e Economou, G.-P.K. Economou, G.-P.K., N.M. Economopoulos, D. Lymberopoulos and C.E. Goutis, Experiences accumulated working towards medical decision support systems Edwards, M.D., A generic hardware architecture to support the system level synthesis of digital systems Er~nyi, I and Z. Fazekas, Morphological evaluation of embryo viability
883-886
Fay, D.Q.M., Internet and the electronic classroom Fazekas, K., Multiresolution image decomposition with wavelet transform Fazekas, Z., s e e Erenyi, I. Femminella, A. and A. Omodeo, PVM-based parallel computing: A case study on power plant simulation Fenske, O., s e e Sanders, D.A. Fern&ndez M., s e e Mecha, H. Fernandez, J.M., F. Moreno, S. Alexandres and J. Meneses, A flexible VLSI-based hardware system for medium-large-vocabulary real-time speech recognition Fernandes, E.S.T., A.D. Santos and C.L. de Amorim, Conditional execution: An approach for eliminating the basic block barriers
847-850
40 (1994)
943-947
Ferrandi, F., Reduction of fault detection costs through a BDD formalism 841-846 Fornaro, R.J., see Allen, W.D. 179-191 Garrard, K.P., see Allen, W.D. Ghazfan, D., M. Nolan and B. Srinivasan, Distribution algorithms for document allocation in multiprocessor information retrieval systems Ghose, K., The architecture of response-pipelined content addressable memories Gianuzzi, V., Coupling algorithms for replicated objects and processes Gimenez, D., s e e Verd~. Gopal, B. and S. Manohar, VLSI architecture for the Winograd Fourier Transform algorithm Gopi, M.S. and S. Manohar, VLSI architectures for the computation of uniform B-spline curves Goutis, C., s e e Dre, C. Goutis, C., s e e Taksaki, A. Goutis, C.E., s e e Economou, G.-P.K. Gu~tin, V. and J. Virant, Pattern recognition with fuzzy neural network Gu~,tin, V., Realization of a fuzzy Boolean neural network classifier Gy~rk~s, J., Measurements in software requirements specification process
179-191
327-354 387 410 799-802 919-922 605-616 617-626 927-930 829-832 883-886 935-938 23
31
893-896
883-886
225-240 931-934
923-926 931-934
875-878 867-870 821-824
825-828
689-692
Han, K., s e e Jung, I. Heaton, R.A.F., s e e Centro, S. Hermida, R., s e e Mecha, H. Hudson, A.D., s e e Sanders, D.A. Hwang, B. and S. Moon, Design and evaluation of access method for multi-dimensional objects in spatial databases
755-758 167-178 821-824 867-870
627 650
Ignatius, P.P. and C.S.R. Murthy, Optimal scheduling of independent jobs in multiprocessor sys651-672 tems 261-274 Inglett, S.R., see Miller, L.L. Jain, K.K. and V. Rajaraman, Parallelism meausres of task graphs for multiprocessors Jansen, W., s e e Nijhuis, J. Janssens, G.K., Delay time computation for an active star topology local area network Josifovski, V., s e e Savnik, I. Jubb, M.J. and A. Purvis, Analysis of network protocol performance in the context of multiworkstation parallel distributed applications
249-259 697-702 241-248 905-908
807-810
Author
Index/ Microprocessing
and Microprogramming
Jung, I., K. Han and S. Moon, Middleware transaction manager in multidatabase management systems 755-758 Kalbarczyk, Z., s e e Christmansson, J. Kameas, A.D., s e e Zaharakis, I.D. Kandus, G., s e e Novak, R. Kandus, G., s e e Pu~ko, M Kang, S., s e e Sohn, Y. Kanopoulos, N., s e e Antonakopoulos, T. Kapus-Kolar, M., s e e Pu~ko, M. Karshmer, A I., J.N. Thomas and N Krivokapic, On implementing computer networking on existing cable TV plants: Some interesting proposals Khalid, H., s e e Obaidat, M.S. Kim, C.S., s e e Lee, M. Kim, G-C., s e e Park, Y-K. Kim, K., J. Lee and S. Moon, Scheduling cooperative transactions in distributed database systems Kim, K., K. Kwon and S. Moon, Development of object-oriented database management system: OOIM King, G.A., s e e Wardak, A.A. Kodres, U.R., s e e Mota, G.F. Krawczyk H, s e e Brud|o, P. Krivokapic, N., s e e Karshmer, A.I. Kwon H. and S. Moon, Reverse serializability as a correctness criterion for optimistic concurrency control Kwon, K., s e e Kim, K. Kwon, Y R, s e e Chung, I.S. Larsson, M., Towards amalgamating high-level synthesis and proof systems Lawson, H.W., Parallel processing in embedded real-time systems Lee, J., s e e Kim, K. Lee, M., S.L. Min and C.S. Kim, A worst case timing analysis technique for instruction prefetch buffers Lee, Y. and S. Moon, Cost-optimal dynamic data replication for distributed database systems: DYVO Lee, Y.J., s e e Seo, S.K Legat, P., s e e Sv6da, M Leng, P.H., s e e Charlton, C.C. Lins, R.D., M.G. Neto, LF. Neto and L.G. Rosa, An environment for processing images of historical documents
40 (1994)
943-947
Little, J. s e e Charlton, C.C. Lymberopoulos, D., s e e Economou, G.-P.K.
747 750 751 754 879-882 861 866
MacGlashan, S, M J Taylor and R Rada, A hypermedia data model for public space and computer aided learning Maeng, S.R., s e e Chung, J.-H. Mahmud, S.M., Models of asynchronous packetswitched multiple and partial multiple bus systems Majumdar, A.K., s e e Sarkar, S. Majumdar, A.K., s e e Sarkar, S. Mall, R and L M Patnaik, Automatic verification of distributed logic specifications Manohar, S., s e e Gopal, B. Manohar, S., s e e Gopi, M.S. Marchese, A., s e e Antola, A. Mariatos, E.P, P Merakos, M.K. Birbas and A.N. Birbas, Hardware programming using C + + Mayes, A., B. Dickerson and C. Britton, Implementing associations between objects McConnell, R K, s e e Quill, J C Mecha, H., M. Fernandez, R. Hermida, D Mozos and K. Birbas, A.N., s e e Mariatos, E P Meneses, J., s e e Ferandez, J.M. Merakos, P., s e e Mariatos, E.P. Miller, L.L. and S.R. Inglett, Enhancing performance in a parallel file system Milligan, P., s e e Quill, J C. Min, S.L, s e e Lee, M. Miskolczi, J, T.M. Dung, K. Tarnay and J Szabo, Conformance testing of X.25 packet level Mohori~:, T., s e e Savnik, I. Moon, S., s e e Jung, I. Moon, S., s e e Kim, K. Moon, S., s e e Kim, K. Moon, S., s e e Kwon, H. Moon, S., s e e Lee, Y. Moon, S, s e e Sohn, Y Moon, S., s e e Cho, H.R. Moon, S., s e e Hwang, B. Moon, S., s e e Yoon, Y Moreno, F., s e e Fernandez, J.M. Mota, G.F., M.L. Nelson and U.R. Kodres, Objectoriented decomposition for distributed systems Mozos, D, s e e Mecha, H Murthy, C.S.R., s e e Ignatius, P.P.
939-942
Nelson, M.L., s e e Mota, G.F. Neto, L F, s e e Lins, R D
207 222 855 860 795-798 707 710 733 736 377 386 707 710
355 373 411 426 681-684 737 742
743-746
729 732 65- 75 91-102 723-728 355-373
759-764 729 732 315-326
909-912 83- 90 743 746
681 684
945 861-866 883 886
851 854 465-486
33- 42 499 520 553 576 43 56 605-616 617 626 693-696 817 820 811 816 773 776 817 -820 825-828 817 820 261 -274 773 776 681 684 703 706 905--908 755 758 729-732 743-746 759 764 747-750 733 736 449-464 627 650 151 166 825-828 91-102 821 824 651 672 91-102 939 942
946
Author
Index/Microprocessing
Neto, M.G., s e e Lins, R.D. Ni, P., see Centro, S. Nijhuis, J., H.van, Aartsen, E. Barakova, W. Jansen and B. Spaanenburg, On the optimal mapping of fuzzy rules on standard micro-controllers Nikolopoulos, S.D. and S.D. Danielopoulos, Oddeven, compare-exchange parallel sorting Nolan, M., s e e Ghazfan, D. Novak, R. and G. Kandus, Adaptive Steiner tree balancing in distributed algorithm for multicast connection setup Obaidat, M.S., H. Khalid and K. Sadiq, A methodology for evaluating the performance of CISC computer systems under single and two-level cache environments Oh, Y. and S.H. Son, Scheduling hard real-time tasks with tolerance of multiple failures Olcoz, Clock cycle estimation based on dead time and control unit area minimization Olcoz, K., s e e Mecha, H. Omodeo, A., s e e Femminella, A. Paek, Y.-K., J. Seo and G.-C. Kim, Constructing a domain dependent case-base for database schema design with case-based reasoning Pascoli, D., see Centro, S. Patnaik, L.M., see Mall, R. Patricelli, F., s e e Ciccarella, G. Petrou, L., see Samoladas, V. Pintelas, P.E., s e e Zaharakis, I.D. Pissaloux, E.E., s e e Bonnin, P. Poland, G.A., s e e Sanders, D.A. Ponce, A.M., Documenting the process of conformance testing Pu~ko, M., M. Kapus- Kolar and G. Kandus, Automated derivation of protocols implementing intelligent network services Purvis A., s e e Jubb, M.J. Pyssysalo, T., Proving properties of a new high speed data bus with predicate/transition nets
and Microprogramming
939-942 167-178
697-702 487-497 327-354
795-798
411 426 193-206 821-824 821-824 875 878
737-742 167-178 43- 56 803-806 275-289 855-860 783-79O 867-870 715-718
707-710 807-810 791-794
Quill, J.C., P. Milligan and R.K. McConnell, A knowledge based approach to loop restructur773-776 ing Rada, R., s e e MacGlashan, S. Rajaraman, V., see Jain, K.K.
851-854 249-259
40 (1994)
943-947
Rhodes, R.L., s e e Wardak, A.A. 65- 75 Romanovsky, A., The problems of designing a conversation scheme for concurrent object oriented languages 897-900 Rosa, L.G., s e e Lins, R.D. 939-942 Rykowski, J. and W. Wieczerzycki, Using versioned object-oriented data in programming languages 901-904
Sv~da, M., An implementation-directed design method for microcontroller software 291-301 ,~veda, M., Design and development of industrial measurement system ~ architecture and software 887-892 Sv~da, M., R. Vrba., P. Leg&t and F. Zezulka, ASI instrumentation 879-882 S~nchez, J.J., s e e Verd~. 919 922 Sadiq, K., s e e Obaidat, M.S. 411-426 Saleh, K. and A. Agarwal, Efficient checkpointing procedures for fault tolerant distributed systems 427-438 Samoladas, V. and L. Petrou, Special-purpose architectures for fuzzy logic controllers 275 289 Sanders, D.A., A.D. Hudson, H. Cawte, O. Fenske, G.A. Poland and G.E, Tewkesbury, Computer modelling of single sludge systems for the computer aided design and control of activated sludge processes 867-870 Santos, A.D., s e e Fernandes, E.S.T. 689-692 Sarkar, S., A.K. Majumdar and A. Basu, Interface design and controller synthesis of digital systems in an object oriented environment 553-576 Sarkar, S., A.K. Majumdar and R.K. Sen, Enhanced systolic array implementations of some graph problems 499-520 Savnik, I., T. MohoriE and V. Josifovski, Extending database programming language with declarative querying facilities 905-908 Schhnbauer, F., Database cache requirements calculation using near-line data access traces in a user transaction system 769-772 Sechi, G.R., s e e Bartolucci, M. 833-840 Sen, R.K., see Sarkar, S. 499-520 Seo, J., s e e Paek, Y-K. 737 742 Seo, S.K. and Y.J. Lee, Optimal evaluation of path predicates in object-oriented queries 751 754 Seppanen, V., Euromicro's close encounter of the arctic circle-in real time 77- 80 Shen, H., Efficient message routing in ~ - n e t w o r k 57 64
Author
Index / Microprocessing
Sohn, Y., S. Kang and S. Moon, Concurrency control scheme in Multi-level secure database management systems Son, S.H., see Oh, Y. Song, X., An efficient DM switchbox router Sotudeh, R., s e e Bailey, C. Spaanenburg, B., s e e Nijhuis, J. Srikant, Y.N., s e e Venugopal, V. Srinivasan, B., s e e Ghazfan, D. Steven, G., s e e Collins, R. Stoyenko, A.D., L.R. Welch and B.C. Cheng, Response time prediction in object-based, parallel embedded systems Subramanian, S., see Chandrasekharam, R. Szabo, J., s e e Miskolczi, J. Tarnay, K., s e e Miskolczi, J. Tasalides, Ph.G., see Adamides, E.D. Tatsaki, A. and C. Goutis, A bit-serial VLSI architecture for the 2-D discrete cosine transform Taylor, L.W., see Allen, W.D. Taylor, M.J., s e e MacGlashan S. Tewkesbury, G.E., s e e Sanders, D.A. Thanailkis, A., see Adamides, E.D. Thomas, J.N., see Karshmer, A.I. Thor, M., HP-FLEXAR: A reconfigurable multi-unit heterogeneous topology architecture for time critical applications Tindell, K. and J. Clark, Holistic schedulability analysis for distributed hard real-time systems T~ro, M. and G. Ziegler, Validation of abstract test suites with use of SDL Torin, J., see Christmansson, J.
and Microprogramming
Urso, G., 733-736 193-206 439 446 685-688 697 702 577 596 327-354 677 680
135 150 537-552 703-706 703-706 523-536 829-832 179-191 851-854 867-870 523-536 355 373
777-782 117-134 711 714 207-222
see
40 (1994)
947
943-947
Centro, S.
Vassiliadis, S., see Chang, C.-J. Venugopal, R. and Y.N. Srikant, Scheduling expression trees with register variables on delayed-load architectures Verd(J, I., D. Gim6nez and J.J. Sanchez, Three dimensional image synthesis in transputers Verhulst, E., Virtuoso: A virtual single processor programming system for distributed real-time applications Vinod, V.V., see Chandrasekharam, R. Virant, J., s e e Gu~tin, V. Vrba, R., s e e ~;v~da, M.
167 178 1
21
577 596 919-922
103 115 537 552 935 938 879-882
Wardak, A.A,, G.A. King and R.L. Rhodes, A microprogram-based 3-D image generation system using the Am29300 family 65- 75 Welch, L.R., see Stoyenko, A.D. 135-150 Wieczerzycki, W., s e e Rykowshi, J. 901 904 Woodward, M.R., s e e Charlton, C.C. 861-866 Yoon, H., see Chung, J.-H. 465-486 Yoon, Y. and S. Moon, Integrated commitment protocol for parallel transaction processing in real-time systems 151-166 Zaharakis, I,D., A.D. Kameas and P.E. Pintelas, MeT: The expert methodology tutor of GENITOR 855-860 Zezulka, F., s e e Sv~da, M. 879-882 Ziegler, G., see T6ro, M. 711-714