Bayes computation for life testing and reliability estimation

Bayes computation for life testing and reliability estimation

World Abstracts on Microelectronics and Reliability fixed n) and n (for fixed k ), which minimize the mean total cost of k-out-of-n : G subsystems. A ...

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World Abstracts on Microelectronics and Reliability fixed n) and n (for fixed k ), which minimize the mean total cost of k-out-of-n : G subsystems. A numerical example illustrates the results. A high-density and low-power charge-based Hamming network. YUPING HE et al. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 1(1), 56 (1993). A charge-based programmable Hamming neural network circuit is proposed. It utilizes capacitive comparators as processing elements in the feedforward layer, and a multiport chargesensing amplifier as the M A X N E T (or Winner-TakeAll (WTA)) circuit. The CMOS prototype chip contains 10 x 10 fully interconnected processing elements with the capability of encoding 10 exemplar patterns. The whole circuit occupies a silicon area of 0.414mm 2 fabricated in a 2-pm CMOS technology. The low-silicon area and low-power dissipation are the fundamental properties of the proposed implementation. The experimental results from a prototype chip show robust retrieval and excellent classification properties as theoretically predicted. A modularity methodology and how to extend the prototype chip to VLSI system level integration are examined. Bayes computation for life testing and reliability estimarion. DIPAK K. DEY and TAI-MING LEE. IEEE Transactions on Reliability, 41(4), 621 (1992). This paper deals with powerful computational techniques to estimate the parameters and the reliability function of complex life distributions, using Bayes methods, from complete and type-II censored samples. The Gibbs sampler approach brings considerable conceptual and computational simplicity to the calculation of the posterior marginals and reliability. Considering constrained parameter and truncated data problems in multivariate life distributions, the Gibbs sampler procedure is easy to implement for sets of simulated data.

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Computational and experimental environments for fuzzy logic and control. M. JAMSHIDI,D. BARAK,S. BAUGH and N. VADIEE. Computers and Electrical Engineering, 19(4), 289 (1993). Fuzzy logic and fuzzy expert control systems have been one of the most active research and development areas of artificial intelligence in recent years. Thanks to tremendous technical advances and many industrial applications in Japan, fuzzy logic enjoys an unprecedented popularity. An equally important issue is the educational need for training the students of engineering and science for both theory and experiments with fuzzy logic. In this paper one such educational experience is described. The paper is organized as follows: Section 2 will provide some computational and simulation experience, while the experimental experiences for real-time fuzzy control will be given in the next section. Conclusions and future work will be given next. A number of examples will be given to illustrate the efforts. SIGMA: a VLSI systolic array implementation of a Galois Field [GF(2)m)] based multiplication and division algorithm. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 1(1), 22 (1993). Finite or Galois fields are used in numerous applications like error correcting codes, digital signal processing and cryptography. The design of efficient methods for Galois field arithmetic such as multiplication and division is critical for these applications. In this paper, we present a new algorithm based on a pattern matching technique for computing multiplication and division in GF(2'~). An efficient systolic architecture is described for implementing the algorithm which can produce a new result every clock cycle and the multiplication and division operations can be interleaved. The architecture has been implemented using 2-/~m CMOS technology. The chip yields a computational rate of 33.3 million multiplications/divisions per second.

4. MICROELECTRONICS--GENERAL Functional flexibility keeps ASICs in demand. JEE (Japan), 66 (January 1993). Although the ASIC market in Japan remains dull, exports of ASICs to the United States and Southeast Asia have recovered since the beginning of 1992. Each ASIC maker expects double-digit sales growth. In the midst of a sluggish computer industry and a recession, ASIC manufacturers are lining up new products that feature high speed, excellent integration, low voltage and short turnaround time. In particular, non-Japanese makers are developing new products such as programmable logic devices (PLDs) and field programmable gate arrays (FPGAs). The worldwide demand for ASICs will be about ¥700 billion in 1992.

Review. A survey of the present status of vacuum microelectronics. S. IANNAZZO. Solid-State Electronics, 36(3), 301 (1993). "Vacuum state" technology appears ready for a comeback in microelectronics form, after years of domination of solid state devices. It will do so, however, based on the developments fostered by solid state technology, which has made available, during 30 years of uninterrupted progress, very sophisticated micromachining techniques, in a large variety of materials, that can be used to advantage for the new developments. Central to "vacuum state" microelectronics is the availability of efficient "cold cathodes", i.e. of electron sources that do away with thermionic electron generation, which would be incompatible in many ways (temperature, power