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Boat heat-up in diffusion furnaces
250
A B S T R A C T S ON M I C R O E L E C T R O N I C S AND R E L I A B I L I T Y
nucleation. A simple relationship is derived that permits making an estimate of the critical size nucleus without detailed experimentation, thereby permitting a choice to be made among available nucleation theories prior to seeking detailed agreement. Barrier energies in metal-silicon dioxide-silicon structures. B. E. DEAL, E. H. SNOW and C. A. MEAD, 97. Phys. Chem. Solids 27 (1966), p. 1873. Metal-silicon dioxide barrier energies have been determined for six metals, Ag, A1, Au, Cu, Mg and Ni, deposited on thermally oxidized silicon. Results obtained by two different measurement methods, the photoemission technique and the MOS capacitance-voltage technique, are in excellent agreement with one another. Values of the barrier energy 9,~ range from 2-3 eV for Mg to 4.2 eV for Ag and are roughly proportional to the electronegativities of the metals. The silicon-silicon dioxide barrier energy (measured from the silicon valence band) has also been determined and was found to be 4.35 eV independent of silicon orientation or type. Boat heat-up in diffusion furnaces. WILLIAM S. MONTGOMERY,SCP and Solid State Technology, October (1966), p. 45. The problem of "boat heat-up" is treated as one of the important considerations in diffusion and deposition processes. A distinction is made betaveen the terms "boat heat-up" and "furnace recovery". Both the speed of heat-up and "fiat" heating are dealt with. The location of control thermocouples, initial advance of control set-points and temporary shorting of thermocouples are discussed as possible approaches for solving problems of overshoot and undershoot. Integrated circuit mask fabrication. T. G. MAPLE,SCP and Solid State Technology, August (1966), p. 23. The limitations of present mask-making equipment and materials for integrated circuit mask fabrication are discussed with an end to identifying areas where further improvement may be expected. Additionally, the evaluation of the probability that half micron geometry will become a production reality within the next t-wo or three years is made. Dislocation-induced deviation of phosphorus-diffusion profiles in silicon. M. J. JosHI and S. DASH, IBM~., November (1966), p. 446. Deviation of phosphorus-impurity profiles in silicon from ideal ones under the diffusion condition of high surface concentrations is well known. Diffusion of high concentrations of phosphorus is also known to cause generation of dislocations with edge character in silicon wafer surfaces. A major cause of the deviation of the phosphorus profile is shown to be solute accumulation at these dislocations. The dislocation-precipitated profile is calculated for the ideal complementary error-function diffusion profile of phosphorus with 1081 atoms/cm 3 of surface concentration, using Ham's model of stress-assisted precipitation on dislocations. The results are shown to account for most of the major features of the experimental diffusion profiles. G a l l i u m a r s e n i d e p l a n a r technology. W. VONMi]NCH, IBMff. 10, No. 6, November (1966), p. 438. Some of the main problems of the gallium arsenide planar technology are discussed. The most suitable starting material used has been obtained by vapor growth. Methods of zinc and tin diffusion have been studied in connection with masking by pyrolytic SIO2/P205 layers. An alternative technique using doped silicon dioxide for the production of planar devices has been developed. The latter method features complete surface protection and easy control of the impurity concentration. The application of both methods to the production of npn, pnp, and four-layer devices is described. Using an epitaxial etch-refill technique it is possible to obtain electrically isolated devices on a common semi-insulating GaAs substrate. Support materials for semiconductor devices. JOHN C. Kosco, SCP and Solid State Technology, January (1967), p. 20. The mechanical, electrical, thermal and chemical properties of various materials are compared from the point of view of their adequacy as support materials for semiconductor devices. It is shown that tungsten and molybdenum and their alloys are most suitable for this purpose. Surface finishing and bonding techniques are discussed. Surface states at steam-grown silicon-silicon dioxide interfaces. C. N. BERGLUND,IEEE Trans. ED-13, No. 10, October (1966), p. 701. A method of determining the energy distribution of surface states at silicon-silicon dioxide interfaces by using low-frequency differential capacitance
A B S T R A C T S ON M I C R O E L E C T R O N I C S AND R E L I A B I L I T Y
nucleation. A simple relationship is derived that permits making an estimate of the critical size nucleus without detailed experimentation, thereby permitting a choice to be made among available nucleation theories prior to seeking detailed agreement. Barrier energies in metal-silicon dioxide-silicon structures. B. E. DEAL, E. H. SNOW and C. A. MEAD, 97. Phys. Chem. Solids 27 (1966), p. 1873. Metal-silicon dioxide barrier energies have been determined for six metals, Ag, A1, Au, Cu, Mg and Ni, deposited on thermally oxidized silicon. Results obtained by two different measurement methods, the photoemission technique and the MOS capacitance-voltage technique, are in excellent agreement with one another. Values of the barrier energy 9,~ range from 2-3 eV for Mg to 4.2 eV for Ag and are roughly proportional to the electronegativities of the metals. The silicon-silicon dioxide barrier energy (measured from the silicon valence band) has also been determined and was found to be 4.35 eV independent of silicon orientation or type. Boat heat-up in diffusion furnaces. WILLIAM S. MONTGOMERY,SCP and Solid State Technology, October (1966), p. 45. The problem of "boat heat-up" is treated as one of the important considerations in diffusion and deposition processes. A distinction is made betaveen the terms "boat heat-up" and "furnace recovery". Both the speed of heat-up and "fiat" heating are dealt with. The location of control thermocouples, initial advance of control set-points and temporary shorting of thermocouples are discussed as possible approaches for solving problems of overshoot and undershoot. Integrated circuit mask fabrication. T. G. MAPLE,SCP and Solid State Technology, August (1966), p. 23. The limitations of present mask-making equipment and materials for integrated circuit mask fabrication are discussed with an end to identifying areas where further improvement may be expected. Additionally, the evaluation of the probability that half micron geometry will become a production reality within the next t-wo or three years is made. Dislocation-induced deviation of phosphorus-diffusion profiles in silicon. M. J. JosHI and S. DASH, IBM~., November (1966), p. 446. Deviation of phosphorus-impurity profiles in silicon from ideal ones under the diffusion condition of high surface concentrations is well known. Diffusion of high concentrations of phosphorus is also known to cause generation of dislocations with edge character in silicon wafer surfaces. A major cause of the deviation of the phosphorus profile is shown to be solute accumulation at these dislocations. The dislocation-precipitated profile is calculated for the ideal complementary error-function diffusion profile of phosphorus with 1081 atoms/cm 3 of surface concentration, using Ham's model of stress-assisted precipitation on dislocations. The results are shown to account for most of the major features of the experimental diffusion profiles. G a l l i u m a r s e n i d e p l a n a r technology. W. VONMi]NCH, IBMff. 10, No. 6, November (1966), p. 438. Some of the main problems of the gallium arsenide planar technology are discussed. The most suitable starting material used has been obtained by vapor growth. Methods of zinc and tin diffusion have been studied in connection with masking by pyrolytic SIO2/P205 layers. An alternative technique using doped silicon dioxide for the production of planar devices has been developed. The latter method features complete surface protection and easy control of the impurity concentration. The application of both methods to the production of npn, pnp, and four-layer devices is described. Using an epitaxial etch-refill technique it is possible to obtain electrically isolated devices on a common semi-insulating GaAs substrate. Support materials for semiconductor devices. JOHN C. Kosco, SCP and Solid State Technology, January (1967), p. 20. The mechanical, electrical, thermal and chemical properties of various materials are compared from the point of view of their adequacy as support materials for semiconductor devices. It is shown that tungsten and molybdenum and their alloys are most suitable for this purpose. Surface finishing and bonding techniques are discussed. Surface states at steam-grown silicon-silicon dioxide interfaces. C. N. BERGLUND,IEEE Trans. ED-13, No. 10, October (1966), p. 701. A method of determining the energy distribution of surface states at silicon-silicon dioxide interfaces by using low-frequency differential capacitance